^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2014, Sony Mobile Communications AB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-msm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct pinctrl_pin_desc apq8064_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) PINCTRL_PIN(0, "GPIO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) PINCTRL_PIN(1, "GPIO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) PINCTRL_PIN(2, "GPIO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) PINCTRL_PIN(3, "GPIO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PINCTRL_PIN(4, "GPIO_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) PINCTRL_PIN(5, "GPIO_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PINCTRL_PIN(6, "GPIO_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) PINCTRL_PIN(7, "GPIO_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) PINCTRL_PIN(8, "GPIO_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) PINCTRL_PIN(9, "GPIO_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) PINCTRL_PIN(10, "GPIO_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) PINCTRL_PIN(11, "GPIO_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) PINCTRL_PIN(12, "GPIO_12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PINCTRL_PIN(13, "GPIO_13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) PINCTRL_PIN(14, "GPIO_14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) PINCTRL_PIN(15, "GPIO_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) PINCTRL_PIN(16, "GPIO_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PINCTRL_PIN(17, "GPIO_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PINCTRL_PIN(18, "GPIO_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PINCTRL_PIN(19, "GPIO_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PINCTRL_PIN(20, "GPIO_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PINCTRL_PIN(21, "GPIO_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PINCTRL_PIN(22, "GPIO_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) PINCTRL_PIN(23, "GPIO_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) PINCTRL_PIN(24, "GPIO_24"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) PINCTRL_PIN(25, "GPIO_25"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) PINCTRL_PIN(26, "GPIO_26"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) PINCTRL_PIN(27, "GPIO_27"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) PINCTRL_PIN(28, "GPIO_28"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) PINCTRL_PIN(29, "GPIO_29"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) PINCTRL_PIN(30, "GPIO_30"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) PINCTRL_PIN(31, "GPIO_31"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) PINCTRL_PIN(32, "GPIO_32"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PINCTRL_PIN(33, "GPIO_33"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PINCTRL_PIN(34, "GPIO_34"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PINCTRL_PIN(35, "GPIO_35"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PINCTRL_PIN(36, "GPIO_36"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PINCTRL_PIN(37, "GPIO_37"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PINCTRL_PIN(38, "GPIO_38"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PINCTRL_PIN(39, "GPIO_39"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINCTRL_PIN(40, "GPIO_40"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PINCTRL_PIN(41, "GPIO_41"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_PIN(42, "GPIO_42"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_PIN(43, "GPIO_43"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PINCTRL_PIN(44, "GPIO_44"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PINCTRL_PIN(45, "GPIO_45"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PINCTRL_PIN(46, "GPIO_46"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PINCTRL_PIN(47, "GPIO_47"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(48, "GPIO_48"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(49, "GPIO_49"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(50, "GPIO_50"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(51, "GPIO_51"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PINCTRL_PIN(52, "GPIO_52"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(53, "GPIO_53"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PINCTRL_PIN(54, "GPIO_54"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(55, "GPIO_55"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(56, "GPIO_56"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_PIN(57, "GPIO_57"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(58, "GPIO_58"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_PIN(59, "GPIO_59"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(60, "GPIO_60"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(61, "GPIO_61"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINCTRL_PIN(62, "GPIO_62"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PINCTRL_PIN(63, "GPIO_63"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_PIN(64, "GPIO_64"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINCTRL_PIN(65, "GPIO_65"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_PIN(66, "GPIO_66"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_PIN(67, "GPIO_67"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PINCTRL_PIN(68, "GPIO_68"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PINCTRL_PIN(69, "GPIO_69"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(70, "GPIO_70"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(71, "GPIO_71"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(72, "GPIO_72"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(73, "GPIO_73"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(74, "GPIO_74"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(75, "GPIO_75"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(76, "GPIO_76"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(77, "GPIO_77"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(78, "GPIO_78"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(79, "GPIO_79"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(80, "GPIO_80"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(81, "GPIO_81"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(82, "GPIO_82"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(83, "GPIO_83"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(84, "GPIO_84"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(85, "GPIO_85"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(86, "GPIO_86"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(87, "GPIO_87"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(88, "GPIO_88"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(89, "GPIO_89"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(90, "SDC1_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(91, "SDC1_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(92, "SDC1_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(93, "SDC3_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(94, "SDC3_CMD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(95, "SDC3_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) DECLARE_APQ_GPIO_PINS(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) DECLARE_APQ_GPIO_PINS(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) DECLARE_APQ_GPIO_PINS(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) DECLARE_APQ_GPIO_PINS(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) DECLARE_APQ_GPIO_PINS(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) DECLARE_APQ_GPIO_PINS(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) DECLARE_APQ_GPIO_PINS(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) DECLARE_APQ_GPIO_PINS(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) DECLARE_APQ_GPIO_PINS(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) DECLARE_APQ_GPIO_PINS(9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) DECLARE_APQ_GPIO_PINS(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DECLARE_APQ_GPIO_PINS(11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) DECLARE_APQ_GPIO_PINS(12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) DECLARE_APQ_GPIO_PINS(13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) DECLARE_APQ_GPIO_PINS(14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) DECLARE_APQ_GPIO_PINS(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) DECLARE_APQ_GPIO_PINS(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) DECLARE_APQ_GPIO_PINS(17);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) DECLARE_APQ_GPIO_PINS(18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) DECLARE_APQ_GPIO_PINS(19);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) DECLARE_APQ_GPIO_PINS(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) DECLARE_APQ_GPIO_PINS(21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) DECLARE_APQ_GPIO_PINS(22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) DECLARE_APQ_GPIO_PINS(23);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) DECLARE_APQ_GPIO_PINS(24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) DECLARE_APQ_GPIO_PINS(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) DECLARE_APQ_GPIO_PINS(26);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) DECLARE_APQ_GPIO_PINS(27);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) DECLARE_APQ_GPIO_PINS(28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) DECLARE_APQ_GPIO_PINS(29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) DECLARE_APQ_GPIO_PINS(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) DECLARE_APQ_GPIO_PINS(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) DECLARE_APQ_GPIO_PINS(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) DECLARE_APQ_GPIO_PINS(33);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) DECLARE_APQ_GPIO_PINS(34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) DECLARE_APQ_GPIO_PINS(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) DECLARE_APQ_GPIO_PINS(36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) DECLARE_APQ_GPIO_PINS(37);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) DECLARE_APQ_GPIO_PINS(38);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DECLARE_APQ_GPIO_PINS(39);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) DECLARE_APQ_GPIO_PINS(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DECLARE_APQ_GPIO_PINS(41);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DECLARE_APQ_GPIO_PINS(42);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) DECLARE_APQ_GPIO_PINS(43);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) DECLARE_APQ_GPIO_PINS(44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DECLARE_APQ_GPIO_PINS(45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DECLARE_APQ_GPIO_PINS(46);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DECLARE_APQ_GPIO_PINS(47);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DECLARE_APQ_GPIO_PINS(48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) DECLARE_APQ_GPIO_PINS(49);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) DECLARE_APQ_GPIO_PINS(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DECLARE_APQ_GPIO_PINS(51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) DECLARE_APQ_GPIO_PINS(52);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) DECLARE_APQ_GPIO_PINS(53);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) DECLARE_APQ_GPIO_PINS(54);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) DECLARE_APQ_GPIO_PINS(55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DECLARE_APQ_GPIO_PINS(56);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) DECLARE_APQ_GPIO_PINS(57);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) DECLARE_APQ_GPIO_PINS(58);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) DECLARE_APQ_GPIO_PINS(59);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) DECLARE_APQ_GPIO_PINS(60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) DECLARE_APQ_GPIO_PINS(61);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) DECLARE_APQ_GPIO_PINS(62);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) DECLARE_APQ_GPIO_PINS(63);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) DECLARE_APQ_GPIO_PINS(64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) DECLARE_APQ_GPIO_PINS(65);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DECLARE_APQ_GPIO_PINS(66);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) DECLARE_APQ_GPIO_PINS(67);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) DECLARE_APQ_GPIO_PINS(68);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) DECLARE_APQ_GPIO_PINS(69);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) DECLARE_APQ_GPIO_PINS(70);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) DECLARE_APQ_GPIO_PINS(71);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) DECLARE_APQ_GPIO_PINS(72);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) DECLARE_APQ_GPIO_PINS(73);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) DECLARE_APQ_GPIO_PINS(74);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DECLARE_APQ_GPIO_PINS(75);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DECLARE_APQ_GPIO_PINS(76);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DECLARE_APQ_GPIO_PINS(77);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DECLARE_APQ_GPIO_PINS(78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) DECLARE_APQ_GPIO_PINS(79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) DECLARE_APQ_GPIO_PINS(80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DECLARE_APQ_GPIO_PINS(81);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) DECLARE_APQ_GPIO_PINS(82);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) DECLARE_APQ_GPIO_PINS(83);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DECLARE_APQ_GPIO_PINS(84);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DECLARE_APQ_GPIO_PINS(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DECLARE_APQ_GPIO_PINS(86);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) DECLARE_APQ_GPIO_PINS(87);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DECLARE_APQ_GPIO_PINS(88);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DECLARE_APQ_GPIO_PINS(89);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static const unsigned int sdc1_clk_pins[] = { 90 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const unsigned int sdc1_cmd_pins[] = { 91 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const unsigned int sdc1_data_pins[] = { 92 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const unsigned int sdc3_clk_pins[] = { 93 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const unsigned int sdc3_cmd_pins[] = { 94 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const unsigned int sdc3_data_pins[] = { 95 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [APQ_MUX_##fname] = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .name = "gpio" #id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .pins = gpio##id##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .npins = ARRAY_SIZE(gpio##id##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .funcs = (int[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) APQ_MUX_gpio, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) APQ_MUX_##f1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) APQ_MUX_##f2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) APQ_MUX_##f3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) APQ_MUX_##f4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) APQ_MUX_##f5, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) APQ_MUX_##f6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) APQ_MUX_##f7, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) APQ_MUX_##f8, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) APQ_MUX_##f9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) APQ_MUX_##f10, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .nfuncs = 11, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .ctl_reg = 0x1000 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .io_reg = 0x1004 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .intr_cfg_reg = 0x1008 + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .intr_status_reg = 0x100c + 0x10 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .intr_target_reg = 0x400 + 0x4 * id, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .mux_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .pull_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .drv_bit = 6, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .oe_bit = 9, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .in_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .out_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .intr_enable_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .intr_status_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .intr_ack_high = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .intr_target_bit = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .intr_target_kpss_val = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .intr_raw_status_bit = 3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .intr_polarity_bit = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .intr_detection_bit = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .intr_detection_width = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define SDC_PINGROUP(pg_name, ctl, pull, drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .name = #pg_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .pins = pg_name##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .npins = ARRAY_SIZE(pg_name##_pins), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .ctl_reg = ctl, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .io_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .intr_cfg_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .intr_status_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .intr_target_reg = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .mux_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .pull_bit = pull, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .drv_bit = drv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .oe_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .in_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .out_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .intr_enable_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .intr_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .intr_target_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .intr_target_kpss_val = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .intr_raw_status_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .intr_polarity_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .intr_detection_bit = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .intr_detection_width = -1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) enum apq8064_functions {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) APQ_MUX_cam_mclk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) APQ_MUX_codec_mic_i2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) APQ_MUX_codec_spkr_i2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) APQ_MUX_gp_clk_0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) APQ_MUX_gp_clk_0b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) APQ_MUX_gp_clk_1a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) APQ_MUX_gp_clk_1b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) APQ_MUX_gp_clk_2a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) APQ_MUX_gp_clk_2b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) APQ_MUX_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) APQ_MUX_gsbi1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) APQ_MUX_gsbi2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) APQ_MUX_gsbi3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) APQ_MUX_gsbi4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) APQ_MUX_gsbi4_cam_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) APQ_MUX_gsbi5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) APQ_MUX_gsbi5_spi_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) APQ_MUX_gsbi5_spi_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) APQ_MUX_gsbi5_spi_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) APQ_MUX_gsbi6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) APQ_MUX_gsbi6_spi_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) APQ_MUX_gsbi6_spi_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) APQ_MUX_gsbi6_spi_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) APQ_MUX_gsbi7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) APQ_MUX_gsbi7_spi_cs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) APQ_MUX_gsbi7_spi_cs2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) APQ_MUX_gsbi7_spi_cs3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) APQ_MUX_gsbi_cam_i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) APQ_MUX_hdmi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) APQ_MUX_mi2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) APQ_MUX_riva_bt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) APQ_MUX_riva_fm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) APQ_MUX_riva_wlan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) APQ_MUX_sdc2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) APQ_MUX_sdc4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) APQ_MUX_slimbus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) APQ_MUX_spkr_i2s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) APQ_MUX_tsif1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) APQ_MUX_tsif2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) APQ_MUX_usb2_hsic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) APQ_MUX_ps_hold,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) APQ_MUX_NA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const char * const cam_mclk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) "gpio4" "gpio5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const char * const codec_mic_i2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) "gpio34", "gpio35", "gpio36", "gpio37", "gpio38"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static const char * const codec_spkr_i2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) "gpio39", "gpio40", "gpio41", "gpio42"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static const char * const gpio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) "gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static const char * const gp_clk_0a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) "gpio3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static const char * const gp_clk_0b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) "gpio34"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static const char * const gp_clk_1a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) "gpio4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static const char * const gp_clk_1b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) "gpio50"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const char * const gp_clk_2a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) "gpio32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static const char * const gp_clk_2b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) "gpio25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static const char * const ps_hold_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) "gpio78"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static const char * const gsbi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) "gpio18", "gpio19", "gpio20", "gpio21"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static const char * const gsbi2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) "gpio22", "gpio23", "gpio24", "gpio25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static const char * const gsbi3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) "gpio6", "gpio7", "gpio8", "gpio9"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static const char * const gsbi4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) "gpio10", "gpio11", "gpio12", "gpio13"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static const char * const gsbi4_cam_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) "gpio10", "gpio11", "gpio12", "gpio13"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static const char * const gsbi5_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) "gpio51", "gpio52", "gpio53", "gpio54"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const char * const gsbi5_spi_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) "gpio47"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const char * const gsbi5_spi_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) "gpio31"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const char * const gsbi5_spi_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) "gpio32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const char * const gsbi6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) "gpio14", "gpio15", "gpio16", "gpio17"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static const char * const gsbi6_spi_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) "gpio47"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static const char * const gsbi6_spi_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) "gpio31"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static const char * const gsbi6_spi_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) "gpio32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const char * const gsbi7_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) "gpio82", "gpio83", "gpio84", "gpio85"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const char * const gsbi7_spi_cs1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) "gpio47"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static const char * const gsbi7_spi_cs2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) "gpio31"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static const char * const gsbi7_spi_cs3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) "gpio32"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const char * const gsbi_cam_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "gpio10", "gpio11", "gpio12", "gpio13"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static const char * const hdmi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) "gpio69", "gpio70", "gpio71", "gpio72"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const char * const mi2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static const char * const riva_bt_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) "gpio16", "gpio17"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static const char * const riva_fm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) "gpio14", "gpio15"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static const char * const riva_wlan_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static const char * const sdc2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static const char * const sdc4_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static const char * const slimbus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) "gpio40", "gpio41"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static const char * const spkr_i2s_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) "gpio47", "gpio48", "gpio49", "gpio50"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static const char * const tsif1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) "gpio55", "gpio56", "gpio57"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static const char * const tsif2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) "gpio58", "gpio59", "gpio60"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static const char * const usb2_hsic_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) "gpio88", "gpio89"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static const struct msm_function apq8064_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) FUNCTION(cam_mclk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) FUNCTION(codec_mic_i2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) FUNCTION(codec_spkr_i2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) FUNCTION(gp_clk_0a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) FUNCTION(gp_clk_0b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) FUNCTION(gp_clk_1a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) FUNCTION(gp_clk_1b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) FUNCTION(gp_clk_2a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) FUNCTION(gp_clk_2b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) FUNCTION(gsbi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) FUNCTION(gsbi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) FUNCTION(gsbi3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) FUNCTION(gsbi4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) FUNCTION(gsbi4_cam_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) FUNCTION(gsbi5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) FUNCTION(gsbi5_spi_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) FUNCTION(gsbi5_spi_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) FUNCTION(gsbi5_spi_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) FUNCTION(gsbi6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) FUNCTION(gsbi6_spi_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) FUNCTION(gsbi6_spi_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) FUNCTION(gsbi6_spi_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) FUNCTION(gsbi7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) FUNCTION(gsbi7_spi_cs1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) FUNCTION(gsbi7_spi_cs2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) FUNCTION(gsbi7_spi_cs3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) FUNCTION(gsbi_cam_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) FUNCTION(hdmi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) FUNCTION(mi2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) FUNCTION(riva_bt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) FUNCTION(riva_fm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) FUNCTION(riva_wlan),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) FUNCTION(sdc2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) FUNCTION(sdc4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) FUNCTION(slimbus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) FUNCTION(spkr_i2s),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) FUNCTION(tsif1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) FUNCTION(tsif2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) FUNCTION(usb2_hsic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) FUNCTION(ps_hold),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const struct msm_pingroup apq8064_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) PINGROUP(10, gsbi4, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) PINGROUP(11, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, gsbi4_cam_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) PINGROUP(12, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) PINGROUP(13, gsbi4, NA, NA, NA, NA, gsbi4_cam_i2c, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) PINGROUP(14, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) PINGROUP(15, riva_fm, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PINGROUP(16, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PINGROUP(17, riva_bt, gsbi6, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) PINGROUP(18, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PINGROUP(19, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) PINGROUP(20, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PINGROUP(21, gsbi1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PINGROUP(25, gsbi2, gp_clk_2b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) PINGROUP(32, mi2s, gp_clk_2a, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PINGROUP(34, codec_mic_i2s, gp_clk_0b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) PINGROUP(38, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PINGROUP(39, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) PINGROUP(40, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PINGROUP(41, slimbus, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PINGROUP(42, codec_spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PINGROUP(50, spkr_i2s, gp_clk_1b, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) PINGROUP(54, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PINGROUP(55, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) PINGROUP(56, tsif1, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PINGROUP(57, tsif1, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) PINGROUP(58, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) PINGROUP(59, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PINGROUP(60, tsif2, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PINGROUP(61, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) PINGROUP(62, NA, sdc2, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PINGROUP(63, NA, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PINGROUP(64, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PINGROUP(65, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) PINGROUP(66, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PINGROUP(67, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PINGROUP(68, riva_wlan, sdc4, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PINGROUP(69, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PINGROUP(70, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PINGROUP(71, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) PINGROUP(72, hdmi, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PINGROUP(82, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PINGROUP(83, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) PINGROUP(84, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PINGROUP(85, NA, NA, gsbi7, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #define NUM_GPIO_PINGROUPS 90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static const struct msm_pinctrl_soc_data apq8064_pinctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) .pins = apq8064_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .npins = ARRAY_SIZE(apq8064_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .functions = apq8064_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .nfunctions = ARRAY_SIZE(apq8064_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .groups = apq8064_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .ngroups = ARRAY_SIZE(apq8064_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .ngpios = NUM_GPIO_PINGROUPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static int apq8064_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return msm_pinctrl_probe(pdev, &apq8064_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static const struct of_device_id apq8064_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) { .compatible = "qcom,apq8064-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static struct platform_driver apq8064_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .name = "apq8064-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .of_match_table = apq8064_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .probe = apq8064_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .remove = msm_pinctrl_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static int __init apq8064_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) return platform_driver_register(&apq8064_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) arch_initcall(apq8064_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static void __exit apq8064_pinctrl_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) platform_driver_unregister(&apq8064_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) module_exit(apq8064_pinctrl_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) MODULE_DESCRIPTION("Qualcomm APQ8064 pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) MODULE_DEVICE_TABLE(of, apq8064_pinctrl_of_match);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags