^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PIC32 pinctrl driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Joshua Henderson, <joshua.henderson@microchip.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pinctrl/pinconf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pinctrl/pinconf-generic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/pinctrl/pinmux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach-pic32/pic32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "pinctrl-utils.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "pinctrl-pic32.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PINS_PER_BANK 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PIC32_CNCON_EDGE 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PIC32_CNCON_ON 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PIN_CONFIG_MICROCHIP_DIGITAL (PIN_CONFIG_END + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PIN_CONFIG_MICROCHIP_ANALOG (PIN_CONFIG_END + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static const struct pinconf_generic_params pic32_mpp_bindings[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {"microchip,digital", PIN_CONFIG_MICROCHIP_DIGITAL, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {"microchip,analog", PIN_CONFIG_MICROCHIP_ANALOG, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct pic32_function {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const char * const *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct pic32_pin_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct pic32_desc_function *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct pic32_desc_function {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 muxreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 muxval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct pic32_gpio_bank {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void __iomem *reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct gpio_chip gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct irq_chip irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct pic32_pinctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void __iomem *reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct pinctrl_dev *pctldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) const struct pinctrl_pin_desc *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) const struct pic32_function *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int nfunctions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) const struct pic32_pin_group *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct pic32_gpio_bank *gpio_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned int nbanks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const struct pinctrl_pin_desc pic32_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(0, "A0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(1, "A1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(2, "A2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(3, "A3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(4, "A4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(5, "A5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(6, "A6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(7, "A7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(8, "A8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PINCTRL_PIN(9, "A9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(10, "A10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(11, "A11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(12, "A12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(13, "A13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(14, "A14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(15, "A15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(16, "B0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(17, "B1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(18, "B2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(19, "B3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(20, "B4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(21, "B5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(22, "B6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(23, "B7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(24, "B8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(25, "B9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(26, "B10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(27, "B11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(28, "B12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(29, "B13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(30, "B14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) PINCTRL_PIN(31, "B15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(33, "C1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(34, "C2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(35, "C3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(36, "C4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(44, "C12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(45, "C13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(46, "C14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(47, "C15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(48, "D0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(49, "D1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(50, "D2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(51, "D3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(52, "D4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(53, "D5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(54, "D6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(55, "D7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(57, "D9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(58, "D10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(59, "D11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(60, "D12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(61, "D13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(62, "D14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) PINCTRL_PIN(63, "D15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(64, "E0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(65, "E1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(66, "E2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(67, "E3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(68, "E4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(69, "E5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(70, "E6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(71, "E7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(72, "E8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(73, "E9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(80, "F0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(81, "F1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(82, "F2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(83, "F3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(84, "F4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(85, "F5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(88, "F8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(92, "F12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(93, "F13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(96, "G0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(97, "G1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(102, "G6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(103, "G7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(104, "G8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) PINCTRL_PIN(105, "G9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(108, "G12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(109, "G13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(110, "G14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(111, "G15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(112, "H0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(113, "H1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(114, "H2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(115, "H3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(116, "H4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(117, "H5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(118, "H6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(119, "H7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(120, "H8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(121, "H9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(122, "H10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(123, "H11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(124, "H12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(125, "H13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(126, "H14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(127, "H15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(128, "J0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(129, "J1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(130, "J2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(131, "J3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) PINCTRL_PIN(132, "J4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(133, "J5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(134, "J6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(135, "J7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(136, "J8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(137, "J9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(138, "J10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(139, "J11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(140, "J12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(141, "J13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(142, "J14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PINCTRL_PIN(143, "J15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(144, "K0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(145, "K1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(146, "K2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(147, "K3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(148, "K4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(149, "K5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(150, "K6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(151, "K7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const char * const pic32_input0_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) "D2", "G8", "F4", "F1", "B9", "B10", "C14", "B5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) "C1", "D14", "G1", "A14", "D6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static const char * const pic32_input1_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "B3", "C4", "G0", "A15", "D7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const char * const pic32_input2_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) "D9", "G6", "B8", "B15", "D4", "B0", "E3", "B7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) "F12", "D12", "F8", "C3", "E9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const char * const pic32_input3_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) "F2", "C2", "E8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const char * const pic32_output0_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) "D2", "G8", "F4", "D10", "F1", "B9", "B10", "C14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) "B5", "C1", "D14", "G1", "A14", "D6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const char * const pic32_output0_1_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) "D2", "G8", "F4", "D10", "F1", "B9", "B10", "C14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) "B5", "C1", "D14", "G1", "A14", "D6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) "B3", "C4", "D15", "G0", "A15", "D7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const char *const pic32_output1_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) "B3", "C4", "D15", "G0", "A15", "D7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const char *const pic32_output1_3_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "D3", "G7", "F5", "D11", "F0", "B1", "E5", "C13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) "B3", "C4", "D15", "G0", "A15", "D7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) "C2", "E8", "F2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const char * const pic32_output2_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "D9", "G6", "B8", "B15", "D4", "B0", "E3", "B7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) "F12", "D12", "F8", "C3", "E9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static const char * const pic32_output2_3_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) "D9", "G6", "B8", "B15", "D4", "B0", "E3", "B7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) "F12", "D12", "F8", "C3", "E9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) "C2", "E8", "F2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static const char * const pic32_output3_group[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) "C2", "E8", "F2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define FUNCTION(_name, _gr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .groups = pic32_##_gr##_group, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .ngroups = ARRAY_SIZE(pic32_##_gr##_group), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const struct pic32_function pic32_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) FUNCTION(INT3, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) FUNCTION(T2CK, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) FUNCTION(T6CK, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) FUNCTION(IC3, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) FUNCTION(IC7, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) FUNCTION(U1RX, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) FUNCTION(U2CTS, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) FUNCTION(U5RX, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) FUNCTION(U6CTS, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) FUNCTION(SDI1, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) FUNCTION(SDI3, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) FUNCTION(SDI5, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) FUNCTION(SS6IN, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) FUNCTION(REFCLKI1, input0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) FUNCTION(INT4, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) FUNCTION(T5CK, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) FUNCTION(T7CK, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) FUNCTION(IC4, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) FUNCTION(IC8, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) FUNCTION(U3RX, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) FUNCTION(U4CTS, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) FUNCTION(SDI2, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) FUNCTION(SDI4, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) FUNCTION(C1RX, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) FUNCTION(REFCLKI4, input1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) FUNCTION(INT2, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) FUNCTION(T3CK, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) FUNCTION(T8CK, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) FUNCTION(IC2, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) FUNCTION(IC5, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) FUNCTION(IC9, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) FUNCTION(U1CTS, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) FUNCTION(U2RX, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) FUNCTION(U5CTS, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) FUNCTION(SS1IN, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) FUNCTION(SS3IN, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) FUNCTION(SS4IN, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) FUNCTION(SS5IN, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) FUNCTION(C2RX, input2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) FUNCTION(INT1, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) FUNCTION(T4CK, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) FUNCTION(T9CK, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) FUNCTION(IC1, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) FUNCTION(IC6, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) FUNCTION(U3CTS, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) FUNCTION(U4RX, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) FUNCTION(U6RX, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) FUNCTION(SS2IN, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) FUNCTION(SDI6, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) FUNCTION(OCFA, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) FUNCTION(REFCLKI3, input3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) FUNCTION(U3TX, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) FUNCTION(U4RTS, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) FUNCTION(SDO1, output0_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) FUNCTION(SDO2, output0_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) FUNCTION(SDO3, output0_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) FUNCTION(SDO5, output0_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) FUNCTION(SS6OUT, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) FUNCTION(OC3, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) FUNCTION(OC6, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) FUNCTION(REFCLKO4, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) FUNCTION(C2OUT, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) FUNCTION(C1TX, output0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) FUNCTION(U1TX, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) FUNCTION(U2RTS, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) FUNCTION(U5TX, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) FUNCTION(U6RTS, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) FUNCTION(SDO4, output1_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) FUNCTION(OC4, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) FUNCTION(OC7, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) FUNCTION(REFCLKO1, output1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) FUNCTION(U3RTS, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) FUNCTION(U4TX, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) FUNCTION(U6TX, output2_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) FUNCTION(SS1OUT, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) FUNCTION(SS3OUT, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) FUNCTION(SS4OUT, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) FUNCTION(SS5OUT, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) FUNCTION(SDO6, output2_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) FUNCTION(OC5, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) FUNCTION(OC8, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) FUNCTION(C1OUT, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) FUNCTION(REFCLKO3, output2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) FUNCTION(U1RTS, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) FUNCTION(U2TX, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) FUNCTION(U5RTS, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) FUNCTION(SS2OUT, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) FUNCTION(OC2, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) FUNCTION(OC1, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) FUNCTION(OC9, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) FUNCTION(C2TX, output3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define PIC32_PINCTRL_GROUP(_pin, _name, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .pin = _pin, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .functions = (struct pic32_desc_function[]){ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) __VA_ARGS__, { } }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #define PIC32_PINCTRL_FUNCTION(_name, _muxreg, _muxval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .name = #_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .muxreg = _muxreg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .muxval = _muxval, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static const struct pic32_pin_group pic32_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) PIC32_PINCTRL_GROUP(14, A14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) PIC32_PINCTRL_FUNCTION(U3TX, RPA14R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) PIC32_PINCTRL_FUNCTION(U4RTS, RPA14R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) PIC32_PINCTRL_FUNCTION(SDO1, RPA14R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) PIC32_PINCTRL_FUNCTION(SDO2, RPA14R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) PIC32_PINCTRL_FUNCTION(SDO3, RPA14R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) PIC32_PINCTRL_FUNCTION(SDO5, RPA14R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) PIC32_PINCTRL_FUNCTION(SS6OUT, RPA14R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) PIC32_PINCTRL_FUNCTION(OC3, RPA14R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) PIC32_PINCTRL_FUNCTION(OC6, RPA14R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPA14R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) PIC32_PINCTRL_FUNCTION(C2OUT, RPA14R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) PIC32_PINCTRL_FUNCTION(C1TX, RPA14R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) PIC32_PINCTRL_GROUP(15, A15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) PIC32_PINCTRL_FUNCTION(U1TX, RPA15R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) PIC32_PINCTRL_FUNCTION(U2RTS, RPA15R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) PIC32_PINCTRL_FUNCTION(U5TX, RPA15R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) PIC32_PINCTRL_FUNCTION(U6RTS, RPA15R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) PIC32_PINCTRL_FUNCTION(SDO1, RPA15R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) PIC32_PINCTRL_FUNCTION(SDO2, RPA15R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) PIC32_PINCTRL_FUNCTION(SDO3, RPA15R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) PIC32_PINCTRL_FUNCTION(SDO4, RPA15R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) PIC32_PINCTRL_FUNCTION(SDO5, RPA15R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) PIC32_PINCTRL_FUNCTION(OC4, RPA15R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) PIC32_PINCTRL_FUNCTION(OC7, RPA15R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPA15R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) PIC32_PINCTRL_GROUP(16, B0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) PIC32_PINCTRL_FUNCTION(U3RTS, RPB0R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) PIC32_PINCTRL_FUNCTION(U4TX, RPB0R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) PIC32_PINCTRL_FUNCTION(U6TX, RPB0R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) PIC32_PINCTRL_FUNCTION(SS1OUT, RPB0R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) PIC32_PINCTRL_FUNCTION(SS3OUT, RPB0R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) PIC32_PINCTRL_FUNCTION(SS4OUT, RPB0R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) PIC32_PINCTRL_FUNCTION(SS5OUT, RPB0R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) PIC32_PINCTRL_FUNCTION(SDO6, RPB0R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) PIC32_PINCTRL_FUNCTION(OC5, RPB0R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) PIC32_PINCTRL_FUNCTION(OC8, RPB0R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) PIC32_PINCTRL_FUNCTION(C1OUT, RPB0R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPB0R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) PIC32_PINCTRL_GROUP(17, B1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) PIC32_PINCTRL_FUNCTION(U1TX, RPB1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) PIC32_PINCTRL_FUNCTION(U2RTS, RPB1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PIC32_PINCTRL_FUNCTION(U5TX, RPB1R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PIC32_PINCTRL_FUNCTION(U6RTS, RPB1R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PIC32_PINCTRL_FUNCTION(SDO1, RPB1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) PIC32_PINCTRL_FUNCTION(SDO2, RPB1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) PIC32_PINCTRL_FUNCTION(SDO3, RPB1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PIC32_PINCTRL_FUNCTION(SDO4, RPB1R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PIC32_PINCTRL_FUNCTION(SDO5, RPB1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) PIC32_PINCTRL_FUNCTION(OC4, RPB1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) PIC32_PINCTRL_FUNCTION(OC7, RPB1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPB1R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) PIC32_PINCTRL_GROUP(18, B2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) PIC32_PINCTRL_FUNCTION(U1RTS, RPB2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PIC32_PINCTRL_FUNCTION(U2TX, RPB2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) PIC32_PINCTRL_FUNCTION(U5RTS, RPB2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) PIC32_PINCTRL_FUNCTION(U6TX, RPB2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) PIC32_PINCTRL_FUNCTION(SS2OUT, RPB2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) PIC32_PINCTRL_FUNCTION(SDO4, RPB2R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) PIC32_PINCTRL_FUNCTION(SDO6, RPB2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) PIC32_PINCTRL_FUNCTION(OC2, RPB2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) PIC32_PINCTRL_FUNCTION(OC1, RPB2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) PIC32_PINCTRL_FUNCTION(OC9, RPB2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) PIC32_PINCTRL_FUNCTION(C2TX, RPB2R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) PIC32_PINCTRL_GROUP(19, B3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) PIC32_PINCTRL_FUNCTION(U1TX, RPB3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) PIC32_PINCTRL_FUNCTION(U2RTS, RPB3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PIC32_PINCTRL_FUNCTION(U5TX, RPB3R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) PIC32_PINCTRL_FUNCTION(U6RTS, RPB3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) PIC32_PINCTRL_FUNCTION(SDO1, RPB3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) PIC32_PINCTRL_FUNCTION(SDO2, RPB3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) PIC32_PINCTRL_FUNCTION(SDO3, RPB3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) PIC32_PINCTRL_FUNCTION(SDO4, RPB3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) PIC32_PINCTRL_FUNCTION(SDO5, RPB3R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) PIC32_PINCTRL_FUNCTION(OC4, RPB3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) PIC32_PINCTRL_FUNCTION(OC7, RPB3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPB3R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) PIC32_PINCTRL_GROUP(21, B5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PIC32_PINCTRL_FUNCTION(U3TX, RPB5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PIC32_PINCTRL_FUNCTION(U4RTS, RPB5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PIC32_PINCTRL_FUNCTION(SDO1, RPB5R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) PIC32_PINCTRL_FUNCTION(SDO2, RPB5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PIC32_PINCTRL_FUNCTION(SDO3, RPB5R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PIC32_PINCTRL_FUNCTION(SDO5, RPB5R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PIC32_PINCTRL_FUNCTION(SS6OUT, RPB5R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) PIC32_PINCTRL_FUNCTION(OC3, RPB5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PIC32_PINCTRL_FUNCTION(OC6, RPB5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPB5R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PIC32_PINCTRL_FUNCTION(C2OUT, RPB5R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) PIC32_PINCTRL_FUNCTION(C1TX, RPB5R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) PIC32_PINCTRL_GROUP(22, B6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) PIC32_PINCTRL_FUNCTION(U1RTS, RPB6R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) PIC32_PINCTRL_FUNCTION(U2TX, RPB6R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PIC32_PINCTRL_FUNCTION(U5RTS, RPB6R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PIC32_PINCTRL_FUNCTION(U6TX, RPB6R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PIC32_PINCTRL_FUNCTION(SS2OUT, RPB6R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PIC32_PINCTRL_FUNCTION(SDO4, RPB6R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) PIC32_PINCTRL_FUNCTION(SDO6, RPB6R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PIC32_PINCTRL_FUNCTION(OC2, RPB6R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PIC32_PINCTRL_FUNCTION(OC1, RPB6R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) PIC32_PINCTRL_FUNCTION(OC9, RPB6R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) PIC32_PINCTRL_FUNCTION(C2TX, RPB6R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) PIC32_PINCTRL_GROUP(23, B7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) PIC32_PINCTRL_FUNCTION(U3RTS, RPB7R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PIC32_PINCTRL_FUNCTION(U4TX, RPB7R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PIC32_PINCTRL_FUNCTION(U6TX, RPB7R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PIC32_PINCTRL_FUNCTION(SS1OUT, RPB7R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) PIC32_PINCTRL_FUNCTION(SS3OUT, RPB7R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) PIC32_PINCTRL_FUNCTION(SS4OUT, RPB7R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) PIC32_PINCTRL_FUNCTION(SS5OUT, RPB7R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PIC32_PINCTRL_FUNCTION(SDO6, RPB7R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) PIC32_PINCTRL_FUNCTION(OC5, RPB7R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PIC32_PINCTRL_FUNCTION(OC8, RPB7R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) PIC32_PINCTRL_FUNCTION(C1OUT, RPB7R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPB7R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) PIC32_PINCTRL_GROUP(24, B8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) PIC32_PINCTRL_FUNCTION(U3RTS, RPB8R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) PIC32_PINCTRL_FUNCTION(U4TX, RPB8R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PIC32_PINCTRL_FUNCTION(U6TX, RPB8R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) PIC32_PINCTRL_FUNCTION(SS1OUT, RPB8R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PIC32_PINCTRL_FUNCTION(SS3OUT, RPB8R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) PIC32_PINCTRL_FUNCTION(SS4OUT, RPB8R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PIC32_PINCTRL_FUNCTION(SS5OUT, RPB8R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) PIC32_PINCTRL_FUNCTION(SDO6, RPB8R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PIC32_PINCTRL_FUNCTION(OC5, RPB8R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) PIC32_PINCTRL_FUNCTION(OC8, RPB8R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) PIC32_PINCTRL_FUNCTION(C1OUT, RPB8R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPB8R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) PIC32_PINCTRL_GROUP(25, B9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) PIC32_PINCTRL_FUNCTION(U3TX, RPB9R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PIC32_PINCTRL_FUNCTION(U4RTS, RPB9R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) PIC32_PINCTRL_FUNCTION(SDO1, RPB9R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) PIC32_PINCTRL_FUNCTION(SDO2, RPB9R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) PIC32_PINCTRL_FUNCTION(SDO3, RPB9R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PIC32_PINCTRL_FUNCTION(SDO5, RPB9R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PIC32_PINCTRL_FUNCTION(SS6OUT, RPB9R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PIC32_PINCTRL_FUNCTION(OC3, RPB9R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PIC32_PINCTRL_FUNCTION(OC6, RPB9R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPB9R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PIC32_PINCTRL_FUNCTION(C2OUT, RPB9R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PIC32_PINCTRL_FUNCTION(C1TX, RPB9R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) PIC32_PINCTRL_GROUP(26, B10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) PIC32_PINCTRL_FUNCTION(U3TX, RPB10R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PIC32_PINCTRL_FUNCTION(U4RTS, RPB10R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) PIC32_PINCTRL_FUNCTION(SDO1, RPB10R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) PIC32_PINCTRL_FUNCTION(SDO2, RPB10R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PIC32_PINCTRL_FUNCTION(SDO3, RPB10R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) PIC32_PINCTRL_FUNCTION(SDO5, RPB10R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PIC32_PINCTRL_FUNCTION(SS6OUT, RPB10R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) PIC32_PINCTRL_FUNCTION(OC3, RPB10R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) PIC32_PINCTRL_FUNCTION(OC6, RPB10R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPB10R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) PIC32_PINCTRL_FUNCTION(C2OUT, RPB10R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) PIC32_PINCTRL_FUNCTION(C1TX, RPB10R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) PIC32_PINCTRL_GROUP(30, B14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PIC32_PINCTRL_FUNCTION(U1RTS, RPB14R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) PIC32_PINCTRL_FUNCTION(U2TX, RPB14R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) PIC32_PINCTRL_FUNCTION(U5RTS, RPB14R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) PIC32_PINCTRL_FUNCTION(U6TX, RPB14R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) PIC32_PINCTRL_FUNCTION(SS2OUT, RPB14R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) PIC32_PINCTRL_FUNCTION(SDO4, RPB14R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) PIC32_PINCTRL_FUNCTION(SDO6, RPB14R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) PIC32_PINCTRL_FUNCTION(OC2, RPB14R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) PIC32_PINCTRL_FUNCTION(OC1, RPB14R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) PIC32_PINCTRL_FUNCTION(OC9, RPB14R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) PIC32_PINCTRL_FUNCTION(C2TX, RPB14R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) PIC32_PINCTRL_GROUP(31, B15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) PIC32_PINCTRL_FUNCTION(U3RTS, RPB15R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) PIC32_PINCTRL_FUNCTION(U4TX, RPB15R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) PIC32_PINCTRL_FUNCTION(U6TX, RPB15R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) PIC32_PINCTRL_FUNCTION(SS1OUT, RPB15R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) PIC32_PINCTRL_FUNCTION(SS3OUT, RPB15R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) PIC32_PINCTRL_FUNCTION(SS4OUT, RPB15R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) PIC32_PINCTRL_FUNCTION(SS5OUT, RPB15R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) PIC32_PINCTRL_FUNCTION(SDO6, RPB15R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) PIC32_PINCTRL_FUNCTION(OC5, RPB15R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) PIC32_PINCTRL_FUNCTION(OC8, RPB15R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) PIC32_PINCTRL_FUNCTION(C1OUT, RPB15R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPB15R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) PIC32_PINCTRL_GROUP(33, C1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) PIC32_PINCTRL_FUNCTION(U3TX, RPC1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) PIC32_PINCTRL_FUNCTION(U4RTS, RPC1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) PIC32_PINCTRL_FUNCTION(SDO1, RPC1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) PIC32_PINCTRL_FUNCTION(SDO2, RPC1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) PIC32_PINCTRL_FUNCTION(SDO3, RPC1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) PIC32_PINCTRL_FUNCTION(SDO5, RPC1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) PIC32_PINCTRL_FUNCTION(SS6OUT, RPC1R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) PIC32_PINCTRL_FUNCTION(OC3, RPC1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) PIC32_PINCTRL_FUNCTION(OC6, RPC1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPC1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) PIC32_PINCTRL_FUNCTION(C2OUT, RPC1R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) PIC32_PINCTRL_FUNCTION(C1TX, RPC1R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) PIC32_PINCTRL_GROUP(34, C2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) PIC32_PINCTRL_FUNCTION(U1RTS, RPC2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) PIC32_PINCTRL_FUNCTION(U2TX, RPC2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) PIC32_PINCTRL_FUNCTION(U5RTS, RPC2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) PIC32_PINCTRL_FUNCTION(U6TX, RPC2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) PIC32_PINCTRL_FUNCTION(SS2OUT, RPC2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) PIC32_PINCTRL_FUNCTION(SDO4, RPC2R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) PIC32_PINCTRL_FUNCTION(SDO6, RPC2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) PIC32_PINCTRL_FUNCTION(OC2, RPC2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) PIC32_PINCTRL_FUNCTION(OC1, RPC2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) PIC32_PINCTRL_FUNCTION(OC9, RPC2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) PIC32_PINCTRL_FUNCTION(C2TX, RPC2R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) PIC32_PINCTRL_GROUP(35, C3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) PIC32_PINCTRL_FUNCTION(U3RTS, RPC3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) PIC32_PINCTRL_FUNCTION(U4TX, RPC3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) PIC32_PINCTRL_FUNCTION(U6TX, RPC3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) PIC32_PINCTRL_FUNCTION(SS1OUT, RPC3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) PIC32_PINCTRL_FUNCTION(SS3OUT, RPC3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) PIC32_PINCTRL_FUNCTION(SS4OUT, RPC3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) PIC32_PINCTRL_FUNCTION(SS5OUT, RPC3R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) PIC32_PINCTRL_FUNCTION(SDO6, RPC3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) PIC32_PINCTRL_FUNCTION(OC5, RPC3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) PIC32_PINCTRL_FUNCTION(OC8, RPC3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) PIC32_PINCTRL_FUNCTION(C1OUT, RPC3R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPC3R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) PIC32_PINCTRL_GROUP(36, C4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) PIC32_PINCTRL_FUNCTION(U1TX, RPC4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) PIC32_PINCTRL_FUNCTION(U2RTS, RPC4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) PIC32_PINCTRL_FUNCTION(U5TX, RPC4R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) PIC32_PINCTRL_FUNCTION(U6RTS, RPC4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) PIC32_PINCTRL_FUNCTION(SDO1, RPC4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) PIC32_PINCTRL_FUNCTION(SDO2, RPC4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) PIC32_PINCTRL_FUNCTION(SDO3, RPC4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) PIC32_PINCTRL_FUNCTION(SDO4, RPC4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) PIC32_PINCTRL_FUNCTION(SDO5, RPC4R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) PIC32_PINCTRL_FUNCTION(OC4, RPC4R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) PIC32_PINCTRL_FUNCTION(OC7, RPC4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPC4R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) PIC32_PINCTRL_GROUP(45, C13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) PIC32_PINCTRL_FUNCTION(U1TX, RPC13R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) PIC32_PINCTRL_FUNCTION(U2RTS, RPC13R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) PIC32_PINCTRL_FUNCTION(U5TX, RPC13R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) PIC32_PINCTRL_FUNCTION(U6RTS, RPC13R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) PIC32_PINCTRL_FUNCTION(SDO1, RPC13R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) PIC32_PINCTRL_FUNCTION(SDO2, RPC13R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) PIC32_PINCTRL_FUNCTION(SDO3, RPC13R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) PIC32_PINCTRL_FUNCTION(SDO4, RPC13R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) PIC32_PINCTRL_FUNCTION(SDO5, RPC13R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) PIC32_PINCTRL_FUNCTION(OC4, RPC13R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) PIC32_PINCTRL_FUNCTION(OC7, RPC13R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPC13R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) PIC32_PINCTRL_GROUP(46, C14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) PIC32_PINCTRL_FUNCTION(U3TX, RPC14R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) PIC32_PINCTRL_FUNCTION(U4RTS, RPC14R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) PIC32_PINCTRL_FUNCTION(SDO1, RPC14R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) PIC32_PINCTRL_FUNCTION(SDO2, RPC14R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) PIC32_PINCTRL_FUNCTION(SDO3, RPC14R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) PIC32_PINCTRL_FUNCTION(SDO5, RPC14R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) PIC32_PINCTRL_FUNCTION(SS6OUT, RPC14R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) PIC32_PINCTRL_FUNCTION(OC3, RPC14R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) PIC32_PINCTRL_FUNCTION(OC6, RPC14R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPC14R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) PIC32_PINCTRL_FUNCTION(C2OUT, RPC14R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) PIC32_PINCTRL_FUNCTION(C1TX, RPC14R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) PIC32_PINCTRL_GROUP(48, D0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) PIC32_PINCTRL_FUNCTION(U1RTS, RPD0R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) PIC32_PINCTRL_FUNCTION(U2TX, RPD0R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) PIC32_PINCTRL_FUNCTION(U5RTS, RPD0R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) PIC32_PINCTRL_FUNCTION(U6TX, RPD0R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) PIC32_PINCTRL_FUNCTION(SS2OUT, RPD0R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) PIC32_PINCTRL_FUNCTION(SDO4, RPD0R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) PIC32_PINCTRL_FUNCTION(SDO6, RPD0R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) PIC32_PINCTRL_FUNCTION(OC2, RPD0R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) PIC32_PINCTRL_FUNCTION(OC1, RPD0R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) PIC32_PINCTRL_FUNCTION(OC9, RPD0R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) PIC32_PINCTRL_FUNCTION(C2TX, RPD0R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) PIC32_PINCTRL_GROUP(50, D2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) PIC32_PINCTRL_FUNCTION(U3TX, RPD2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) PIC32_PINCTRL_FUNCTION(U4RTS, RPD2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) PIC32_PINCTRL_FUNCTION(SDO1, RPD2R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) PIC32_PINCTRL_FUNCTION(SDO2, RPD2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) PIC32_PINCTRL_FUNCTION(SDO3, RPD2R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) PIC32_PINCTRL_FUNCTION(SDO5, RPD2R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) PIC32_PINCTRL_FUNCTION(SS6OUT, RPD2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) PIC32_PINCTRL_FUNCTION(OC3, RPD2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) PIC32_PINCTRL_FUNCTION(OC6, RPD2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPD2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) PIC32_PINCTRL_FUNCTION(C2OUT, RPD2R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) PIC32_PINCTRL_FUNCTION(C1TX, RPD2R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) PIC32_PINCTRL_GROUP(51, D3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) PIC32_PINCTRL_FUNCTION(U1TX, RPD3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) PIC32_PINCTRL_FUNCTION(U2RTS, RPD3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) PIC32_PINCTRL_FUNCTION(U5TX, RPD3R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) PIC32_PINCTRL_FUNCTION(U6RTS, RPD3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) PIC32_PINCTRL_FUNCTION(SDO1, RPD3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) PIC32_PINCTRL_FUNCTION(SDO2, RPD3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) PIC32_PINCTRL_FUNCTION(SDO3, RPD3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) PIC32_PINCTRL_FUNCTION(SDO4, RPD3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) PIC32_PINCTRL_FUNCTION(SDO5, RPD3R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) PIC32_PINCTRL_FUNCTION(OC4, RPD3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) PIC32_PINCTRL_FUNCTION(OC7, RPD3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPD3R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) PIC32_PINCTRL_GROUP(52, D4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) PIC32_PINCTRL_FUNCTION(U3RTS, RPD4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) PIC32_PINCTRL_FUNCTION(U4TX, RPD4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) PIC32_PINCTRL_FUNCTION(U6TX, RPD4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) PIC32_PINCTRL_FUNCTION(SS1OUT, RPD4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) PIC32_PINCTRL_FUNCTION(SS3OUT, RPD4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) PIC32_PINCTRL_FUNCTION(SS4OUT, RPD4R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) PIC32_PINCTRL_FUNCTION(SS5OUT, RPD4R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) PIC32_PINCTRL_FUNCTION(SDO6, RPD4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) PIC32_PINCTRL_FUNCTION(OC5, RPD4R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) PIC32_PINCTRL_FUNCTION(OC8, RPD4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) PIC32_PINCTRL_FUNCTION(C1OUT, RPD4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPD4R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) PIC32_PINCTRL_GROUP(53, D5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) PIC32_PINCTRL_FUNCTION(U1RTS, RPD5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) PIC32_PINCTRL_FUNCTION(U2TX, RPD5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) PIC32_PINCTRL_FUNCTION(U5RTS, RPD5R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) PIC32_PINCTRL_FUNCTION(U6TX, RPD5R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) PIC32_PINCTRL_FUNCTION(SS2OUT, RPD5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) PIC32_PINCTRL_FUNCTION(SDO4, RPD5R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) PIC32_PINCTRL_FUNCTION(SDO6, RPD5R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) PIC32_PINCTRL_FUNCTION(OC2, RPD5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) PIC32_PINCTRL_FUNCTION(OC1, RPD5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) PIC32_PINCTRL_FUNCTION(OC9, RPD5R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) PIC32_PINCTRL_FUNCTION(C2TX, RPD5R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) PIC32_PINCTRL_GROUP(54, D6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) PIC32_PINCTRL_FUNCTION(U3TX, RPD6R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) PIC32_PINCTRL_FUNCTION(U4RTS, RPD6R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) PIC32_PINCTRL_FUNCTION(SDO1, RPD6R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) PIC32_PINCTRL_FUNCTION(SDO2, RPD6R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) PIC32_PINCTRL_FUNCTION(SDO3, RPD6R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) PIC32_PINCTRL_FUNCTION(SDO5, RPD6R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) PIC32_PINCTRL_FUNCTION(SS6OUT, RPD6R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) PIC32_PINCTRL_FUNCTION(OC3, RPD6R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) PIC32_PINCTRL_FUNCTION(OC6, RPD6R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPD6R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) PIC32_PINCTRL_FUNCTION(C2OUT, RPD6R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) PIC32_PINCTRL_FUNCTION(C1TX, RPD6R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) PIC32_PINCTRL_GROUP(55, D7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) PIC32_PINCTRL_FUNCTION(U1TX, RPD7R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) PIC32_PINCTRL_FUNCTION(U2RTS, RPD7R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) PIC32_PINCTRL_FUNCTION(U5TX, RPD7R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) PIC32_PINCTRL_FUNCTION(U6RTS, RPD7R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) PIC32_PINCTRL_FUNCTION(SDO1, RPD7R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) PIC32_PINCTRL_FUNCTION(SDO2, RPD7R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) PIC32_PINCTRL_FUNCTION(SDO3, RPD7R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) PIC32_PINCTRL_FUNCTION(SDO4, RPD7R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) PIC32_PINCTRL_FUNCTION(SDO5, RPD7R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) PIC32_PINCTRL_FUNCTION(OC4, RPD7R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) PIC32_PINCTRL_FUNCTION(OC7, RPD7R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPD7R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) PIC32_PINCTRL_GROUP(57, D9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) PIC32_PINCTRL_FUNCTION(U3RTS, RPD9R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) PIC32_PINCTRL_FUNCTION(U4TX, RPD9R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) PIC32_PINCTRL_FUNCTION(U6TX, RPD9R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) PIC32_PINCTRL_FUNCTION(SS1OUT, RPD9R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) PIC32_PINCTRL_FUNCTION(SS3OUT, RPD9R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) PIC32_PINCTRL_FUNCTION(SS4OUT, RPD9R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) PIC32_PINCTRL_FUNCTION(SS5OUT, RPD9R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) PIC32_PINCTRL_FUNCTION(SDO6, RPD9R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) PIC32_PINCTRL_FUNCTION(OC5, RPD9R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) PIC32_PINCTRL_FUNCTION(OC8, RPD9R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) PIC32_PINCTRL_FUNCTION(C1OUT, RPD9R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPD9R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) PIC32_PINCTRL_GROUP(58, D10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) PIC32_PINCTRL_FUNCTION(U3TX, RPD10R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) PIC32_PINCTRL_FUNCTION(U4RTS, RPD10R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) PIC32_PINCTRL_FUNCTION(SDO1, RPD10R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) PIC32_PINCTRL_FUNCTION(SDO2, RPD10R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) PIC32_PINCTRL_FUNCTION(SDO3, RPD10R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) PIC32_PINCTRL_FUNCTION(SDO5, RPD10R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) PIC32_PINCTRL_FUNCTION(SS6OUT, RPD10R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) PIC32_PINCTRL_FUNCTION(OC3, RPD10R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) PIC32_PINCTRL_FUNCTION(OC6, RPD10R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPD10R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) PIC32_PINCTRL_FUNCTION(C2OUT, RPD10R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) PIC32_PINCTRL_FUNCTION(C1TX, RPD10R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) PIC32_PINCTRL_GROUP(59, D11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) PIC32_PINCTRL_FUNCTION(U1TX, RPD11R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) PIC32_PINCTRL_FUNCTION(U2RTS, RPD11R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) PIC32_PINCTRL_FUNCTION(U5TX, RPD11R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) PIC32_PINCTRL_FUNCTION(U6RTS, RPD11R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) PIC32_PINCTRL_FUNCTION(SDO1, RPD11R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) PIC32_PINCTRL_FUNCTION(SDO2, RPD11R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) PIC32_PINCTRL_FUNCTION(SDO3, RPD11R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) PIC32_PINCTRL_FUNCTION(SDO4, RPD11R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) PIC32_PINCTRL_FUNCTION(SDO5, RPD11R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) PIC32_PINCTRL_FUNCTION(OC4, RPD11R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) PIC32_PINCTRL_FUNCTION(OC7, RPD11R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPD11R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) PIC32_PINCTRL_GROUP(60, D12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) PIC32_PINCTRL_FUNCTION(U3RTS, RPD12R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) PIC32_PINCTRL_FUNCTION(U4TX, RPD12R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) PIC32_PINCTRL_FUNCTION(U6TX, RPD12R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) PIC32_PINCTRL_FUNCTION(SS1OUT, RPD12R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) PIC32_PINCTRL_FUNCTION(SS3OUT, RPD12R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) PIC32_PINCTRL_FUNCTION(SS4OUT, RPD12R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) PIC32_PINCTRL_FUNCTION(SS5OUT, RPD12R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) PIC32_PINCTRL_FUNCTION(SDO6, RPD12R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) PIC32_PINCTRL_FUNCTION(OC5, RPD12R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) PIC32_PINCTRL_FUNCTION(OC8, RPD12R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) PIC32_PINCTRL_FUNCTION(C1OUT, RPD12R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPD12R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) PIC32_PINCTRL_GROUP(62, D14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) PIC32_PINCTRL_FUNCTION(U3TX, RPD14R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) PIC32_PINCTRL_FUNCTION(U4RTS, RPD14R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) PIC32_PINCTRL_FUNCTION(SDO1, RPD14R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) PIC32_PINCTRL_FUNCTION(SDO2, RPD14R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) PIC32_PINCTRL_FUNCTION(SDO3, RPD14R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) PIC32_PINCTRL_FUNCTION(SDO5, RPD14R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) PIC32_PINCTRL_FUNCTION(SS6OUT, RPD14R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) PIC32_PINCTRL_FUNCTION(OC3, RPD14R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) PIC32_PINCTRL_FUNCTION(OC6, RPD14R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPD14R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) PIC32_PINCTRL_FUNCTION(C2OUT, RPD14R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) PIC32_PINCTRL_FUNCTION(C1TX, RPD14R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) PIC32_PINCTRL_GROUP(63, D15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) PIC32_PINCTRL_FUNCTION(U1TX, RPD15R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) PIC32_PINCTRL_FUNCTION(U2RTS, RPD15R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) PIC32_PINCTRL_FUNCTION(U5TX, RPD15R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) PIC32_PINCTRL_FUNCTION(U6RTS, RPD15R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) PIC32_PINCTRL_FUNCTION(SDO1, RPD15R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) PIC32_PINCTRL_FUNCTION(SDO2, RPD15R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) PIC32_PINCTRL_FUNCTION(SDO3, RPD15R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) PIC32_PINCTRL_FUNCTION(SDO4, RPD15R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) PIC32_PINCTRL_FUNCTION(SDO5, RPD15R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) PIC32_PINCTRL_FUNCTION(OC4, RPD15R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) PIC32_PINCTRL_FUNCTION(OC7, RPD15R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPD15R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) PIC32_PINCTRL_GROUP(67, E3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) PIC32_PINCTRL_FUNCTION(U3RTS, RPE3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) PIC32_PINCTRL_FUNCTION(U4TX, RPE3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) PIC32_PINCTRL_FUNCTION(U6TX, RPE3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) PIC32_PINCTRL_FUNCTION(SS1OUT, RPE3R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) PIC32_PINCTRL_FUNCTION(SS3OUT, RPE3R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) PIC32_PINCTRL_FUNCTION(SS4OUT, RPE3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) PIC32_PINCTRL_FUNCTION(SS5OUT, RPE3R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) PIC32_PINCTRL_FUNCTION(SDO6, RPE3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) PIC32_PINCTRL_FUNCTION(OC5, RPE3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) PIC32_PINCTRL_FUNCTION(OC8, RPE3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) PIC32_PINCTRL_FUNCTION(C1OUT, RPE3R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPE3R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) PIC32_PINCTRL_GROUP(69, E5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) PIC32_PINCTRL_FUNCTION(U1TX, RPE5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) PIC32_PINCTRL_FUNCTION(U2RTS, RPE5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) PIC32_PINCTRL_FUNCTION(U5TX, RPE5R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) PIC32_PINCTRL_FUNCTION(U6RTS, RPE5R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) PIC32_PINCTRL_FUNCTION(SDO1, RPE5R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) PIC32_PINCTRL_FUNCTION(SDO2, RPE5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) PIC32_PINCTRL_FUNCTION(SDO3, RPE5R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) PIC32_PINCTRL_FUNCTION(SDO4, RPE5R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) PIC32_PINCTRL_FUNCTION(SDO5, RPE5R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) PIC32_PINCTRL_FUNCTION(OC4, RPE5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) PIC32_PINCTRL_FUNCTION(OC7, RPE5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPE5R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) PIC32_PINCTRL_GROUP(72, E8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) PIC32_PINCTRL_FUNCTION(U1RTS, RPE8R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) PIC32_PINCTRL_FUNCTION(U2TX, RPE8R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) PIC32_PINCTRL_FUNCTION(U5RTS, RPE8R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) PIC32_PINCTRL_FUNCTION(U6TX, RPE8R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) PIC32_PINCTRL_FUNCTION(SS2OUT, RPE8R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) PIC32_PINCTRL_FUNCTION(SDO4, RPE8R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) PIC32_PINCTRL_FUNCTION(SDO6, RPE8R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) PIC32_PINCTRL_FUNCTION(OC2, RPE8R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) PIC32_PINCTRL_FUNCTION(OC1, RPE8R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) PIC32_PINCTRL_FUNCTION(OC9, RPE8R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) PIC32_PINCTRL_FUNCTION(C2TX, RPE8R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) PIC32_PINCTRL_GROUP(73, E9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) PIC32_PINCTRL_FUNCTION(U3RTS, RPE9R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) PIC32_PINCTRL_FUNCTION(U4TX, RPE9R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) PIC32_PINCTRL_FUNCTION(U6TX, RPE9R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) PIC32_PINCTRL_FUNCTION(SS1OUT, RPE9R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) PIC32_PINCTRL_FUNCTION(SS3OUT, RPE9R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) PIC32_PINCTRL_FUNCTION(SS4OUT, RPE9R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) PIC32_PINCTRL_FUNCTION(SS5OUT, RPE9R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) PIC32_PINCTRL_FUNCTION(SDO6, RPE9R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) PIC32_PINCTRL_FUNCTION(OC5, RPE9R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) PIC32_PINCTRL_FUNCTION(OC8, RPE9R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) PIC32_PINCTRL_FUNCTION(C1OUT, RPE9R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPE9R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) PIC32_PINCTRL_GROUP(80, F0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) PIC32_PINCTRL_FUNCTION(U1TX, RPF0R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) PIC32_PINCTRL_FUNCTION(U2RTS, RPF0R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) PIC32_PINCTRL_FUNCTION(U5TX, RPF0R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) PIC32_PINCTRL_FUNCTION(U6RTS, RPF0R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) PIC32_PINCTRL_FUNCTION(SDO1, RPF0R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) PIC32_PINCTRL_FUNCTION(SDO2, RPF0R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) PIC32_PINCTRL_FUNCTION(SDO3, RPF0R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) PIC32_PINCTRL_FUNCTION(SDO4, RPF0R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) PIC32_PINCTRL_FUNCTION(SDO5, RPF0R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) PIC32_PINCTRL_FUNCTION(OC4, RPF0R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) PIC32_PINCTRL_FUNCTION(OC7, RPF0R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPF0R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) PIC32_PINCTRL_GROUP(81, F1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) PIC32_PINCTRL_FUNCTION(U3TX, RPF1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) PIC32_PINCTRL_FUNCTION(U4RTS, RPF1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) PIC32_PINCTRL_FUNCTION(SDO1, RPF1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) PIC32_PINCTRL_FUNCTION(SDO2, RPF1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) PIC32_PINCTRL_FUNCTION(SDO3, RPF1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) PIC32_PINCTRL_FUNCTION(SDO5, RPF1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) PIC32_PINCTRL_FUNCTION(SS6OUT, RPF1R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) PIC32_PINCTRL_FUNCTION(OC3, RPF1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) PIC32_PINCTRL_FUNCTION(OC6, RPF1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPF1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) PIC32_PINCTRL_FUNCTION(C2OUT, RPF1R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) PIC32_PINCTRL_FUNCTION(C1TX, RPF1R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) PIC32_PINCTRL_GROUP(82, F2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) PIC32_PINCTRL_FUNCTION(U1RTS, RPF2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) PIC32_PINCTRL_FUNCTION(U2TX, RPF2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) PIC32_PINCTRL_FUNCTION(U5RTS, RPF2R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) PIC32_PINCTRL_FUNCTION(U6TX, RPF2R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) PIC32_PINCTRL_FUNCTION(SS2OUT, RPF2R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) PIC32_PINCTRL_FUNCTION(SDO4, RPF2R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) PIC32_PINCTRL_FUNCTION(SDO6, RPF2R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) PIC32_PINCTRL_FUNCTION(OC2, RPF2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) PIC32_PINCTRL_FUNCTION(OC1, RPF2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) PIC32_PINCTRL_FUNCTION(OC9, RPF2R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) PIC32_PINCTRL_FUNCTION(C2TX, RPF2R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) PIC32_PINCTRL_GROUP(83, F3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) PIC32_PINCTRL_FUNCTION(U1RTS, RPF3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) PIC32_PINCTRL_FUNCTION(U2TX, RPF3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) PIC32_PINCTRL_FUNCTION(U5RTS, RPF3R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) PIC32_PINCTRL_FUNCTION(U6TX, RPF3R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) PIC32_PINCTRL_FUNCTION(SS2OUT, RPF3R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) PIC32_PINCTRL_FUNCTION(SDO4, RPF3R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) PIC32_PINCTRL_FUNCTION(SDO6, RPF3R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) PIC32_PINCTRL_FUNCTION(OC2, RPF3R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) PIC32_PINCTRL_FUNCTION(OC1, RPF3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) PIC32_PINCTRL_FUNCTION(OC9, RPF3R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) PIC32_PINCTRL_FUNCTION(C2TX, RPF3R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) PIC32_PINCTRL_GROUP(84, F4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) PIC32_PINCTRL_FUNCTION(U3TX, RPF4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) PIC32_PINCTRL_FUNCTION(U4RTS, RPF4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) PIC32_PINCTRL_FUNCTION(SDO1, RPF4R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) PIC32_PINCTRL_FUNCTION(SDO2, RPF4R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) PIC32_PINCTRL_FUNCTION(SDO3, RPF4R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) PIC32_PINCTRL_FUNCTION(SDO5, RPF4R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) PIC32_PINCTRL_FUNCTION(SS6OUT, RPF4R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) PIC32_PINCTRL_FUNCTION(OC3, RPF4R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) PIC32_PINCTRL_FUNCTION(OC6, RPF4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPF4R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) PIC32_PINCTRL_FUNCTION(C2OUT, RPF4R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) PIC32_PINCTRL_FUNCTION(C1TX, RPF4R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) PIC32_PINCTRL_GROUP(85, F5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) PIC32_PINCTRL_FUNCTION(U1TX, RPF5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) PIC32_PINCTRL_FUNCTION(U2RTS, RPF5R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) PIC32_PINCTRL_FUNCTION(U5TX, RPF5R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) PIC32_PINCTRL_FUNCTION(U6RTS, RPF5R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) PIC32_PINCTRL_FUNCTION(SDO1, RPF5R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) PIC32_PINCTRL_FUNCTION(SDO2, RPF5R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) PIC32_PINCTRL_FUNCTION(SDO3, RPF5R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) PIC32_PINCTRL_FUNCTION(SDO4, RPF5R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) PIC32_PINCTRL_FUNCTION(SDO5, RPF5R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) PIC32_PINCTRL_FUNCTION(OC4, RPF5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) PIC32_PINCTRL_FUNCTION(OC7, RPF5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPF5R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) PIC32_PINCTRL_GROUP(88, F8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) PIC32_PINCTRL_FUNCTION(U3RTS, RPF8R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) PIC32_PINCTRL_FUNCTION(U4TX, RPF8R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) PIC32_PINCTRL_FUNCTION(U6TX, RPF8R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) PIC32_PINCTRL_FUNCTION(SS1OUT, RPF8R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) PIC32_PINCTRL_FUNCTION(SS3OUT, RPF8R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) PIC32_PINCTRL_FUNCTION(SS4OUT, RPF8R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) PIC32_PINCTRL_FUNCTION(SS5OUT, RPF8R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) PIC32_PINCTRL_FUNCTION(SDO6, RPF8R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) PIC32_PINCTRL_FUNCTION(OC5, RPF8R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) PIC32_PINCTRL_FUNCTION(OC8, RPF8R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) PIC32_PINCTRL_FUNCTION(C1OUT, RPF8R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPF8R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) PIC32_PINCTRL_GROUP(92, F12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) PIC32_PINCTRL_FUNCTION(U3RTS, RPF12R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) PIC32_PINCTRL_FUNCTION(U4TX, RPF12R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) PIC32_PINCTRL_FUNCTION(U6TX, RPF12R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) PIC32_PINCTRL_FUNCTION(SS1OUT, RPF12R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) PIC32_PINCTRL_FUNCTION(SS3OUT, RPF12R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) PIC32_PINCTRL_FUNCTION(SS4OUT, RPF12R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) PIC32_PINCTRL_FUNCTION(SS5OUT, RPF12R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) PIC32_PINCTRL_FUNCTION(SDO6, RPF12R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) PIC32_PINCTRL_FUNCTION(OC5, RPF12R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) PIC32_PINCTRL_FUNCTION(OC8, RPF12R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) PIC32_PINCTRL_FUNCTION(C1OUT, RPF12R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPF12R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) PIC32_PINCTRL_GROUP(93, F13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) PIC32_PINCTRL_FUNCTION(U1RTS, RPF13R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) PIC32_PINCTRL_FUNCTION(U2TX, RPF13R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) PIC32_PINCTRL_FUNCTION(U5RTS, RPF13R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) PIC32_PINCTRL_FUNCTION(U6TX, RPF13R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) PIC32_PINCTRL_FUNCTION(SS2OUT, RPF13R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) PIC32_PINCTRL_FUNCTION(SDO4, RPF13R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) PIC32_PINCTRL_FUNCTION(SDO6, RPF13R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) PIC32_PINCTRL_FUNCTION(OC2, RPF13R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) PIC32_PINCTRL_FUNCTION(OC1, RPF13R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) PIC32_PINCTRL_FUNCTION(OC9, RPF13R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) PIC32_PINCTRL_FUNCTION(C2TX, RPF13R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) PIC32_PINCTRL_GROUP(96, G0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) PIC32_PINCTRL_FUNCTION(U1TX, RPG0R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) PIC32_PINCTRL_FUNCTION(U2RTS, RPG0R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) PIC32_PINCTRL_FUNCTION(U5TX, RPG0R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) PIC32_PINCTRL_FUNCTION(U6RTS, RPG0R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) PIC32_PINCTRL_FUNCTION(SDO1, RPG0R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) PIC32_PINCTRL_FUNCTION(SDO2, RPG0R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) PIC32_PINCTRL_FUNCTION(SDO3, RPG0R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) PIC32_PINCTRL_FUNCTION(SDO4, RPG0R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) PIC32_PINCTRL_FUNCTION(SDO5, RPG0R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) PIC32_PINCTRL_FUNCTION(OC4, RPG0R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) PIC32_PINCTRL_FUNCTION(OC7, RPG0R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPG0R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) PIC32_PINCTRL_GROUP(97, G1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) PIC32_PINCTRL_FUNCTION(U3TX, RPG1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) PIC32_PINCTRL_FUNCTION(U4RTS, RPG1R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) PIC32_PINCTRL_FUNCTION(SDO1, RPG1R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) PIC32_PINCTRL_FUNCTION(SDO2, RPG1R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) PIC32_PINCTRL_FUNCTION(SDO3, RPG1R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) PIC32_PINCTRL_FUNCTION(SDO5, RPG1R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) PIC32_PINCTRL_FUNCTION(SS6OUT, RPG1R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) PIC32_PINCTRL_FUNCTION(OC3, RPG1R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) PIC32_PINCTRL_FUNCTION(OC6, RPG1R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPG1R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) PIC32_PINCTRL_FUNCTION(C2OUT, RPG1R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) PIC32_PINCTRL_FUNCTION(C1TX, RPG1R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) PIC32_PINCTRL_GROUP(102, G6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) PIC32_PINCTRL_FUNCTION(INT2, INT2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) PIC32_PINCTRL_FUNCTION(T3CK, T3CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) PIC32_PINCTRL_FUNCTION(T8CK, T8CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) PIC32_PINCTRL_FUNCTION(IC2, IC2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) PIC32_PINCTRL_FUNCTION(IC5, IC5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) PIC32_PINCTRL_FUNCTION(IC9, IC9R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) PIC32_PINCTRL_FUNCTION(U1CTS, U1CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) PIC32_PINCTRL_FUNCTION(U2RX, U2RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) PIC32_PINCTRL_FUNCTION(U5CTS, U5CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) PIC32_PINCTRL_FUNCTION(SS1IN, SS1INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) PIC32_PINCTRL_FUNCTION(SS3IN, SS3INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) PIC32_PINCTRL_FUNCTION(SS4IN, SS4INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) PIC32_PINCTRL_FUNCTION(SS5IN, SS5INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) PIC32_PINCTRL_FUNCTION(C2RX, C2RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) PIC32_PINCTRL_FUNCTION(U3RTS, RPG6R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) PIC32_PINCTRL_FUNCTION(U4TX, RPG6R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) PIC32_PINCTRL_FUNCTION(U6TX, RPG6R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) PIC32_PINCTRL_FUNCTION(SS1OUT, RPG6R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) PIC32_PINCTRL_FUNCTION(SS3OUT, RPG6R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) PIC32_PINCTRL_FUNCTION(SS4OUT, RPG6R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) PIC32_PINCTRL_FUNCTION(SS5OUT, RPG6R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) PIC32_PINCTRL_FUNCTION(SDO6, RPG6R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) PIC32_PINCTRL_FUNCTION(OC5, RPG6R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) PIC32_PINCTRL_FUNCTION(OC8, RPG6R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) PIC32_PINCTRL_FUNCTION(C1OUT, RPG6R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) PIC32_PINCTRL_FUNCTION(REFCLKO3, RPG6R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) PIC32_PINCTRL_GROUP(103, G7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) PIC32_PINCTRL_FUNCTION(INT4, INT4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) PIC32_PINCTRL_FUNCTION(T5CK, T5CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) PIC32_PINCTRL_FUNCTION(T7CK, T7CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) PIC32_PINCTRL_FUNCTION(IC4, IC4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) PIC32_PINCTRL_FUNCTION(IC8, IC8R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) PIC32_PINCTRL_FUNCTION(U3RX, U3RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) PIC32_PINCTRL_FUNCTION(U4CTS, U4CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) PIC32_PINCTRL_FUNCTION(SDI2, SDI2R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) PIC32_PINCTRL_FUNCTION(SDI4, SDI4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) PIC32_PINCTRL_FUNCTION(C1RX, C1RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) PIC32_PINCTRL_FUNCTION(REFCLKI4, REFCLKI4R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) PIC32_PINCTRL_FUNCTION(U1TX, RPG7R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) PIC32_PINCTRL_FUNCTION(U2RTS, RPG7R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) PIC32_PINCTRL_FUNCTION(U5TX, RPG7R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) PIC32_PINCTRL_FUNCTION(U6RTS, RPG7R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) PIC32_PINCTRL_FUNCTION(SDO1, RPG7R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) PIC32_PINCTRL_FUNCTION(SDO2, RPG7R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) PIC32_PINCTRL_FUNCTION(SDO3, RPG7R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) PIC32_PINCTRL_FUNCTION(SDO4, RPG7R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) PIC32_PINCTRL_FUNCTION(SDO5, RPG7R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) PIC32_PINCTRL_FUNCTION(OC4, RPG7R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) PIC32_PINCTRL_FUNCTION(OC7, RPG7R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) PIC32_PINCTRL_FUNCTION(REFCLKO1, RPG7R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) PIC32_PINCTRL_GROUP(104, G8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) PIC32_PINCTRL_FUNCTION(INT3, INT3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) PIC32_PINCTRL_FUNCTION(T2CK, T2CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) PIC32_PINCTRL_FUNCTION(T6CK, T6CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) PIC32_PINCTRL_FUNCTION(IC3, IC3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) PIC32_PINCTRL_FUNCTION(IC7, IC7R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) PIC32_PINCTRL_FUNCTION(U1RX, U1RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) PIC32_PINCTRL_FUNCTION(U2CTS, U2CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) PIC32_PINCTRL_FUNCTION(U5RX, U5RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) PIC32_PINCTRL_FUNCTION(U6CTS, U6CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) PIC32_PINCTRL_FUNCTION(SDI1, SDI1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) PIC32_PINCTRL_FUNCTION(SDI3, SDI3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) PIC32_PINCTRL_FUNCTION(SDI5, SDI5R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) PIC32_PINCTRL_FUNCTION(SS6IN, SS6INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) PIC32_PINCTRL_FUNCTION(REFCLKI1, REFCLKI1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) PIC32_PINCTRL_FUNCTION(U3TX, RPG8R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) PIC32_PINCTRL_FUNCTION(U4RTS, RPG8R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) PIC32_PINCTRL_FUNCTION(SDO1, RPG8R, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) PIC32_PINCTRL_FUNCTION(SDO2, RPG8R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) PIC32_PINCTRL_FUNCTION(SDO3, RPG8R, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) PIC32_PINCTRL_FUNCTION(SDO5, RPG8R, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) PIC32_PINCTRL_FUNCTION(SS6OUT, RPG8R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) PIC32_PINCTRL_FUNCTION(OC3, RPG8R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) PIC32_PINCTRL_FUNCTION(OC6, RPG8R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) PIC32_PINCTRL_FUNCTION(REFCLKO4, RPG8R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) PIC32_PINCTRL_FUNCTION(C2OUT, RPG8R, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) PIC32_PINCTRL_FUNCTION(C1TX, RPG8R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) PIC32_PINCTRL_GROUP(105, G9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) PIC32_PINCTRL_FUNCTION(INT1, INT1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) PIC32_PINCTRL_FUNCTION(T4CK, T4CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) PIC32_PINCTRL_FUNCTION(T9CK, T9CKR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) PIC32_PINCTRL_FUNCTION(IC1, IC1R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) PIC32_PINCTRL_FUNCTION(IC6, IC6R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) PIC32_PINCTRL_FUNCTION(U3CTS, U3CTSR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) PIC32_PINCTRL_FUNCTION(U4RX, U4RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) PIC32_PINCTRL_FUNCTION(U6RX, U6RXR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) PIC32_PINCTRL_FUNCTION(SS2IN, SS2INR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) PIC32_PINCTRL_FUNCTION(SDI6, SDI6R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) PIC32_PINCTRL_FUNCTION(OCFA, OCFAR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) PIC32_PINCTRL_FUNCTION(REFCLKI3, REFCLKI3R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) PIC32_PINCTRL_FUNCTION(U1RTS, RPG9R, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) PIC32_PINCTRL_FUNCTION(U2TX, RPG9R, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) PIC32_PINCTRL_FUNCTION(U5RTS, RPG9R, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) PIC32_PINCTRL_FUNCTION(U6TX, RPG9R, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) PIC32_PINCTRL_FUNCTION(SS2OUT, RPG9R, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) PIC32_PINCTRL_FUNCTION(SDO4, RPG9R, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) PIC32_PINCTRL_FUNCTION(SDO6, RPG9R, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) PIC32_PINCTRL_FUNCTION(OC2, RPG9R, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) PIC32_PINCTRL_FUNCTION(OC1, RPG9R, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) PIC32_PINCTRL_FUNCTION(OC9, RPG9R, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) PIC32_PINCTRL_FUNCTION(C2TX, RPG9R, 15)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) static inline struct pic32_gpio_bank *irqd_to_bank(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) return gpiochip_get_data(irq_data_get_irq_chip_data(d));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) static inline struct pic32_gpio_bank *pctl_to_bank(struct pic32_pinctrl *pctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) unsigned pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) return &pctl->gpio_banks[pin / PINS_PER_BANK];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) static int pic32_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) return pctl->ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) static const char *pic32_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) return pctl->groups[group].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) static int pic32_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) unsigned group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) const unsigned **pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) unsigned *num_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) *pins = &pctl->groups[group].pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) *num_pins = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) static const struct pinctrl_ops pic32_pinctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) .get_groups_count = pic32_pinctrl_get_groups_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) .get_group_name = pic32_pinctrl_get_group_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) .get_group_pins = pic32_pinctrl_get_group_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) .dt_free_map = pinctrl_utils_free_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) static int pic32_pinmux_get_functions_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) return pctl->nfunctions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) static const char *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) pic32_pinmux_get_function_name(struct pinctrl_dev *pctldev, unsigned func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) return pctl->functions[func].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) static int pic32_pinmux_get_function_groups(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) unsigned func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) const char * const **groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) unsigned * const num_groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) *groups = pctl->functions[func].groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) *num_groups = pctl->functions[func].ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) static int pic32_pinmux_enable(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) unsigned func, unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) const struct pic32_pin_group *pg = &pctl->groups[group];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) const struct pic32_function *pf = &pctl->functions[func];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) const char *fname = pf->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) struct pic32_desc_function *functions = pg->functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) while (functions->name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) if (!strcmp(functions->name, fname)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) dev_dbg(pctl->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) "setting function %s reg 0x%x = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) fname, functions->muxreg, functions->muxval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) writel(functions->muxval, pctl->reg_base + functions->muxreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) functions++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) dev_err(pctl->dev, "cannot mux pin %u to function %u\n", group, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) static int pic32_gpio_request_enable(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) struct pinctrl_gpio_range *range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) struct pic32_gpio_bank *bank = gpiochip_get_data(range->gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) u32 mask = BIT(offset - bank->gpio_chip.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) dev_dbg(pctl->dev, "requesting gpio %d in bank %d with mask 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) offset, bank->gpio_chip.base, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) static int pic32_gpio_direction_input(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) u32 mask = BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) writel(mask, bank->reg_base + PIC32_SET(TRIS_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) static int pic32_gpio_get(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) return !!(readl(bank->reg_base + PORT_REG) & BIT(offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) static void pic32_gpio_set(struct gpio_chip *chip, unsigned offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) u32 mask = BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) if (value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) writel(mask, bank->reg_base + PIC32_SET(PORT_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) writel(mask, bank->reg_base + PIC32_CLR(PORT_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) static int pic32_gpio_direction_output(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) unsigned offset, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) u32 mask = BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) pic32_gpio_set(chip, offset, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) writel(mask, bank->reg_base + PIC32_CLR(TRIS_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) static int pic32_gpio_set_direction(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) struct pinctrl_gpio_range *range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) unsigned offset, bool input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) struct gpio_chip *chip = range->gc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) if (input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) pic32_gpio_direction_input(chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) pic32_gpio_direction_output(chip, offset, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) static const struct pinmux_ops pic32_pinmux_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) .get_functions_count = pic32_pinmux_get_functions_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) .get_function_name = pic32_pinmux_get_function_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) .get_function_groups = pic32_pinmux_get_function_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) .set_mux = pic32_pinmux_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) .gpio_request_enable = pic32_gpio_request_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) .gpio_set_direction = pic32_gpio_set_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) static int pic32_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) unsigned long *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) unsigned param = pinconf_to_config_param(*config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) u32 mask = BIT(pin - bank->gpio_chip.base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) u32 arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) switch (param) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) case PIN_CONFIG_BIAS_PULL_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) arg = !!(readl(bank->reg_base + CNPU_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) case PIN_CONFIG_BIAS_PULL_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) arg = !!(readl(bank->reg_base + CNPD_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) case PIN_CONFIG_MICROCHIP_DIGITAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) arg = !(readl(bank->reg_base + ANSEL_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) case PIN_CONFIG_MICROCHIP_ANALOG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) arg = !!(readl(bank->reg_base + ANSEL_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) case PIN_CONFIG_DRIVE_OPEN_DRAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) arg = !!(readl(bank->reg_base + ODCU_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) case PIN_CONFIG_INPUT_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) arg = !!(readl(bank->reg_base + TRIS_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) case PIN_CONFIG_OUTPUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) arg = !(readl(bank->reg_base + TRIS_REG) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) dev_err(pctl->dev, "Property %u not supported\n", param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) *config = pinconf_to_config_packed(param, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) static int pic32_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) unsigned long *configs, unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) struct pic32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) struct pic32_gpio_bank *bank = pctl_to_bank(pctl, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) unsigned param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) u32 arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) u32 offset = pin - bank->gpio_chip.base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) u32 mask = BIT(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) dev_dbg(pctl->dev, "setting pin %d bank %d mask 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) pin, bank->gpio_chip.base, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) for (i = 0; i < num_configs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) param = pinconf_to_config_param(configs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) arg = pinconf_to_config_argument(configs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) switch (param) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) case PIN_CONFIG_BIAS_PULL_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) dev_dbg(pctl->dev, " pullup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) writel(mask, bank->reg_base +PIC32_SET(CNPU_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) case PIN_CONFIG_BIAS_PULL_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) dev_dbg(pctl->dev, " pulldown\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) writel(mask, bank->reg_base + PIC32_SET(CNPD_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) case PIN_CONFIG_MICROCHIP_DIGITAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) dev_dbg(pctl->dev, " digital\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) case PIN_CONFIG_MICROCHIP_ANALOG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) dev_dbg(pctl->dev, " analog\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) writel(mask, bank->reg_base + PIC32_SET(ANSEL_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) case PIN_CONFIG_DRIVE_OPEN_DRAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) dev_dbg(pctl->dev, " opendrain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) writel(mask, bank->reg_base + PIC32_SET(ODCU_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) case PIN_CONFIG_INPUT_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) pic32_gpio_direction_input(&bank->gpio_chip, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) case PIN_CONFIG_OUTPUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) pic32_gpio_direction_output(&bank->gpio_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) offset, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) dev_err(pctl->dev, "Property %u not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) static const struct pinconf_ops pic32_pinconf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) .pin_config_get = pic32_pinconf_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) .pin_config_set = pic32_pinconf_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) .is_generic = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) static struct pinctrl_desc pic32_pinctrl_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) .name = "pic32-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) .pctlops = &pic32_pinctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) .pmxops = &pic32_pinmux_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) .confops = &pic32_pinconf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) static int pic32_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) struct pic32_gpio_bank *bank = gpiochip_get_data(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) if (readl(bank->reg_base + TRIS_REG) & BIT(offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) return GPIO_LINE_DIRECTION_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) return GPIO_LINE_DIRECTION_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) static void pic32_gpio_irq_ack(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) struct pic32_gpio_bank *bank = irqd_to_bank(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) writel(0, bank->reg_base + CNF_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) static void pic32_gpio_irq_mask(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) struct pic32_gpio_bank *bank = irqd_to_bank(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) static void pic32_gpio_irq_unmask(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) struct pic32_gpio_bank *bank = irqd_to_bank(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) static unsigned int pic32_gpio_irq_startup(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) pic32_gpio_direction_input(chip, data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) pic32_gpio_irq_unmask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) static int pic32_gpio_irq_set_type(struct irq_data *data, unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) struct pic32_gpio_bank *bank = irqd_to_bank(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) u32 mask = BIT(data->hwirq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) switch (type & IRQ_TYPE_SENSE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) case IRQ_TYPE_EDGE_RISING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) /* enable RISE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) writel(mask, bank->reg_base + PIC32_SET(CNEN_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) /* disable FALL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) writel(mask, bank->reg_base + PIC32_CLR(CNNE_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) /* enable EDGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) case IRQ_TYPE_EDGE_FALLING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) /* disable RISE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) writel(mask, bank->reg_base + PIC32_CLR(CNEN_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) /* enable FALL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) writel(mask, bank->reg_base + PIC32_SET(CNNE_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) /* enable EDGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) case IRQ_TYPE_EDGE_BOTH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) /* enable RISE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) writel(mask, bank->reg_base + PIC32_SET(CNEN_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) /* enable FALL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) writel(mask, bank->reg_base + PIC32_SET(CNNE_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) /* enable EDGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) irq_set_handler_locked(data, handle_edge_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) static u32 pic32_gpio_get_pending(struct gpio_chip *gc, unsigned long status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) struct pic32_gpio_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) u32 pending = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) u32 cnen_rise, cnne_fall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) u32 pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) cnen_rise = readl(bank->reg_base + CNEN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) cnne_fall = readl(bank->reg_base + CNNE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) for_each_set_bit(pin, &status, BITS_PER_LONG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) u32 mask = BIT(pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) if ((mask & cnen_rise) || (mask && cnne_fall))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) pending |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) return pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) static void pic32_gpio_irq_handler(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) struct gpio_chip *gc = irq_desc_get_handler_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) struct pic32_gpio_bank *bank = gpiochip_get_data(gc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) unsigned long pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) unsigned int pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) u32 stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) chained_irq_enter(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) stat = readl(bank->reg_base + CNF_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) pending = pic32_gpio_get_pending(gc, stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) for_each_set_bit(pin, &pending, BITS_PER_LONG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) generic_handle_irq(irq_linear_revmap(gc->irq.domain, pin));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) chained_irq_exit(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) #define GPIO_BANK(_bank, _npins) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) .gpio_chip = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) .label = "GPIO" #_bank, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) .request = gpiochip_generic_request, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) .free = gpiochip_generic_free, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) .get_direction = pic32_gpio_get_direction, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) .direction_input = pic32_gpio_direction_input, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) .direction_output = pic32_gpio_direction_output, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) .get = pic32_gpio_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) .set = pic32_gpio_set, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) .ngpio = _npins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) .base = GPIO_BANK_START(_bank), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) .owner = THIS_MODULE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) .can_sleep = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) .irq_chip = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) .name = "GPIO" #_bank, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) .irq_startup = pic32_gpio_irq_startup, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) .irq_ack = pic32_gpio_irq_ack, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) .irq_mask = pic32_gpio_irq_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) .irq_unmask = pic32_gpio_irq_unmask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) .irq_set_type = pic32_gpio_irq_set_type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) static struct pic32_gpio_bank pic32_gpio_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) GPIO_BANK(0, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) GPIO_BANK(1, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) GPIO_BANK(2, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) GPIO_BANK(3, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) GPIO_BANK(4, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) GPIO_BANK(5, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) GPIO_BANK(6, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) GPIO_BANK(7, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) GPIO_BANK(8, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) GPIO_BANK(9, PINS_PER_BANK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) static int pic32_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) struct pic32_pinctrl *pctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) if (!pctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) pctl->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) dev_set_drvdata(&pdev->dev, pctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) pctl->reg_base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) if (IS_ERR(pctl->reg_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) return PTR_ERR(pctl->reg_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) pctl->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) if (IS_ERR(pctl->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) ret = PTR_ERR(pctl->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) dev_err(&pdev->dev, "clk get failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) ret = clk_prepare_enable(pctl->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) dev_err(&pdev->dev, "clk enable failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) pctl->pins = pic32_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) pctl->npins = ARRAY_SIZE(pic32_pins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) pctl->functions = pic32_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) pctl->nfunctions = ARRAY_SIZE(pic32_functions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) pctl->groups = pic32_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) pctl->ngroups = ARRAY_SIZE(pic32_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) pctl->gpio_banks = pic32_gpio_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) pctl->nbanks = ARRAY_SIZE(pic32_gpio_banks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) pic32_pinctrl_desc.pins = pctl->pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) pic32_pinctrl_desc.npins = pctl->npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) pic32_pinctrl_desc.custom_params = pic32_mpp_bindings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) pic32_pinctrl_desc.num_custom_params = ARRAY_SIZE(pic32_mpp_bindings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pic32_pinctrl_desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) pctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) if (IS_ERR(pctl->pctldev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) dev_err(&pdev->dev, "Failed to register pinctrl device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) return PTR_ERR(pctl->pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) static int pic32_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) struct pic32_gpio_bank *bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) u32 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) struct gpio_irq_chip *girq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) if (of_property_read_u32(np, "microchip,gpio-bank", &id)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) dev_err(&pdev->dev, "microchip,gpio-bank property not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) if (id >= ARRAY_SIZE(pic32_gpio_banks)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) dev_err(&pdev->dev, "invalid microchip,gpio-bank property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) bank = &pic32_gpio_banks[id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) bank->reg_base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) if (IS_ERR(bank->reg_base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) return PTR_ERR(bank->reg_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) bank->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) if (IS_ERR(bank->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) ret = PTR_ERR(bank->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) dev_err(&pdev->dev, "clk get failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) ret = clk_prepare_enable(bank->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) dev_err(&pdev->dev, "clk enable failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) bank->gpio_chip.parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) bank->gpio_chip.of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) girq = &bank->gpio_chip.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) girq->chip = &bank->irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) girq->parent_handler = pic32_gpio_irq_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) girq->num_parents = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) if (!girq->parents)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) girq->default_type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) girq->handler = handle_level_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) girq->parents[0] = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) ret = gpiochip_add_data(&bank->gpio_chip, bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) static const struct of_device_id pic32_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) { .compatible = "microchip,pic32mzda-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) static struct platform_driver pic32_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) .name = "pic32-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) .of_match_table = pic32_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) .probe = pic32_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) static const struct of_device_id pic32_gpio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) { .compatible = "microchip,pic32mzda-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) static struct platform_driver pic32_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) .name = "pic32-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) .of_match_table = pic32_gpio_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) .probe = pic32_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) static int __init pic32_gpio_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) return platform_driver_register(&pic32_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) arch_initcall(pic32_gpio_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) static int __init pic32_pinctrl_register(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) return platform_driver_register(&pic32_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) arch_initcall(pic32_pinctrl_register);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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