Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* MCP23S08 SPI GPIO driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include "pinctrl-mcp23s08.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define MCP_MAX_DEV_PER_CS	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * A given spi_device can represent up to eight mcp23sxx chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * sharing the same chipselect but using different addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * (e.g. chips #0 and #3 might be populated, but not #1 or #2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Driver data holds all the per-chip data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) struct mcp23s08_driver_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	unsigned		ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct mcp23s08		*mcp[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct mcp23s08		chip[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct mcp23s08 *mcp = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct spi_device *spi = to_spi_device(mcp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 				     { .tx_buf = data, .len = count, }, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	spi_message_add_tail(&t[0], &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	spi_message_add_tail(&t[1], &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	return spi_sync(spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static int mcp23sxx_spi_gather_write(void *context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 				const void *reg, size_t reg_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 				const void *val, size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct mcp23s08 *mcp = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct spi_device *spi = to_spi_device(mcp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 				     { .tx_buf = reg, .len = reg_size, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 				     { .tx_buf = val, .len = val_size, }, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	spi_message_add_tail(&t[0], &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	spi_message_add_tail(&t[1], &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	spi_message_add_tail(&t[2], &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return spi_sync(spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 				void *val, size_t val_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct mcp23s08 *mcp = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct spi_device *spi = to_spi_device(mcp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u8 tx[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	if (reg_size != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	tx[0] = mcp->addr | 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	tx[1] = *((u8 *) reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static const struct regmap_bus mcp23sxx_spi_regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	.write = mcp23sxx_spi_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.gather_write = mcp23sxx_spi_gather_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	.read = mcp23sxx_spi_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 				    unsigned int addr, unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	const struct regmap_config *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct regmap_config *copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case MCP_TYPE_S08:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		mcp->reg_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		mcp->chip.ngpio = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		mcp->chip.label = devm_kasprintf(dev, GFP_KERNEL, "mcp23s08.%d", addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		config = &mcp23x08_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		name = devm_kasprintf(dev, GFP_KERNEL, "%d", addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	case MCP_TYPE_S17:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		mcp->reg_shift = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		mcp->chip.ngpio = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		mcp->chip.label = devm_kasprintf(dev, GFP_KERNEL, "mcp23s17.%d", addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		config = &mcp23x17_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		name = devm_kasprintf(dev, GFP_KERNEL, "%d", addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	case MCP_TYPE_S18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		mcp->reg_shift = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		mcp->chip.ngpio = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		mcp->chip.label = "mcp23s18";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		config = &mcp23x17_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		name = config->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		dev_err(dev, "invalid device type (%d)\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	copy = devm_kmemdup(dev, config, sizeof(*config), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (!copy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	copy->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp, copy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (IS_ERR(mcp->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		dev_err(dev, "regmap init failed for %s\n", mcp->chip.label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return PTR_ERR_OR_ZERO(mcp->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int mcp23s08_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct device *dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	struct mcp23s08_driver_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	unsigned long spi_present_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	const void *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	unsigned int addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	unsigned int ngpio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	int chips;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	match = device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		type = (int)(uintptr_t)match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		type = spi_get_device_id(spi)->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	ret = device_property_read_u32(dev, "microchip,spi-present-mask", &v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		ret = device_property_read_u32(dev, "mcp,spi-present-mask", &v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			dev_err(dev, "missing spi-present-mask");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	spi_present_mask = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (!spi_present_mask || spi_present_mask >= BIT(MCP_MAX_DEV_PER_CS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		dev_err(dev, "invalid spi-present-mask");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	chips = hweight_long(spi_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	data = devm_kzalloc(dev, struct_size(data, chip, chips), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	spi_set_drvdata(spi, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	for_each_set_bit(addr, &spi_present_mask, MCP_MAX_DEV_PER_CS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		data->mcp[addr] = &data->chip[--chips];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		data->mcp[addr]->irq = spi->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		ret = mcp23s08_spi_regmap_init(data->mcp[addr], dev, addr, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		data->mcp[addr]->pinctrl_desc.name = devm_kasprintf(dev, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 								    "mcp23xxx-pinctrl.%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 								    addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		if (!data->mcp[addr]->pinctrl_desc.name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		ret = mcp23s08_probe_one(data->mcp[addr], dev, 0x40 | (addr << 1), type, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		ngpio += data->mcp[addr]->chip.ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	data->ngpio = ngpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static const struct spi_device_id mcp23s08_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	{ "mcp23s08", MCP_TYPE_S08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	{ "mcp23s17", MCP_TYPE_S17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	{ "mcp23s18", MCP_TYPE_S18 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const struct of_device_id mcp23s08_spi_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		.compatible = "microchip,mcp23s08",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		.data = (void *) MCP_TYPE_S08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		.compatible = "microchip,mcp23s17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		.data = (void *) MCP_TYPE_S17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		.compatible = "microchip,mcp23s18",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		.data = (void *) MCP_TYPE_S18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		.compatible = "mcp,mcp23s08",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		.data = (void *) MCP_TYPE_S08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		.compatible = "mcp,mcp23s17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		.data = (void *) MCP_TYPE_S17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct spi_driver mcp23s08_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.probe		= mcp23s08_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	.id_table	= mcp23s08_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		.name	= "mcp23s08",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		.of_match_table = mcp23s08_spi_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int __init mcp23s08_spi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	return spi_register_driver(&mcp23s08_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  * Register after SPI postcore initcall and before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)  * subsys initcalls that may rely on these GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) subsys_initcall(mcp23s08_spi_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static void mcp23s08_spi_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	spi_unregister_driver(&mcp23s08_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) module_exit(mcp23s08_spi_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MODULE_LICENSE("GPL");