^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef PINCTRL_PINCTRL_NOMADIK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define PINCTRL_PINCTRL_NOMADIK_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* Package definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define PINCTRL_NMK_STN8815 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define PINCTRL_NMK_DB8500 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define PINCTRL_NMK_DB8540 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* Alternate functions: function C is set in hw by setting both A and B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define NMK_GPIO_ALT_GPIO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define NMK_GPIO_ALT_A 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define NMK_GPIO_ALT_B 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define NMK_GPIO_ALT_CX_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PRCM_GPIOCR_ALTCX(pin_num,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) altc1_used, altc1_ri, altc1_cb,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) altc2_used, altc2_ri, altc2_cb,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) altc3_used, altc3_ri, altc3_cb,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) altc4_used, altc4_ri, altc4_cb)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .pin = pin_num,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .altcx[PRCM_IDX_GPIOCR_ALTC1] = {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .used = altc1_used,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .reg_index = altc1_ri,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .control_bit = altc1_cb\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) },\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .altcx[PRCM_IDX_GPIOCR_ALTC2] = {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .used = altc2_used,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .reg_index = altc2_ri,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .control_bit = altc2_cb\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) },\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .altcx[PRCM_IDX_GPIOCR_ALTC3] = {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .used = altc3_used,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .reg_index = altc3_ri,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .control_bit = altc3_cb\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) },\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .altcx[PRCM_IDX_GPIOCR_ALTC4] = {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .used = altc4_used,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .reg_index = altc4_ri,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .control_bit = altc4_cb\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * enum prcm_gpiocr_reg_index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Used to reference an PRCM GPIOCR register address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) enum prcm_gpiocr_reg_index {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PRCM_IDX_GPIOCR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PRCM_IDX_GPIOCR2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PRCM_IDX_GPIOCR3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * enum prcm_gpiocr_altcx_index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Used to reference an Other alternate-C function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) enum prcm_gpiocr_altcx_index {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PRCM_IDX_GPIOCR_ALTC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PRCM_IDX_GPIOCR_ALTC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PRCM_IDX_GPIOCR_ALTC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) PRCM_IDX_GPIOCR_ALTC4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PRCM_IDX_GPIOCR_ALTC_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * struct prcm_gpio_altcx - Other alternate-C function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @used: other alternate-C function availability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * @reg_index: PRCM GPIOCR register index used to control the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * @control_bit: PRCM GPIOCR bit used to control the function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct prcm_gpiocr_altcx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) bool used:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 reg_index:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) u8 control_bit:5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * struct prcm_gpio_altcx_pin_desc - Other alternate-C pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * @pin: The pin number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @altcx: array of other alternate-C[1-4] functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct prcm_gpiocr_altcx_pin_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned short pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * struct nmk_function - Nomadik pinctrl mux function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @name: The name of the function, exported to pinctrl core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @groups: An array of pin groups that may select this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @ngroups: The number of entries in @groups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct nmk_function {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) const char * const *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * struct nmk_pingroup - describes a Nomadik pin group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @name: the name of this specific pin group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @pins: an array of discrete physical pins used in this group, taken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * from the driver-local pin enumeration space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * @num_pins: the number of pins in this group array, i.e. the number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * elements in .pins so we can iterate over that array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * @altsetting: the altsetting to apply to all pins in this group to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * configure them to be used by a function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct nmk_pingroup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) const unsigned int *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) const unsigned npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int altsetting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @pins: An array describing all pins the pin controller affects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * All pins which are also GPIOs must be listed first within the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * array, and be numbered identically to the GPIO controller's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * numbering.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @npins: The number of entries in @pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @functions: The functions supported on this SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @nfunction: The number of entries in @functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @groups: An array describing all pin groups the pin SoC supports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @ngroups: The number of entries in @groups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @altcx_pins: The pins that support Other alternate-C function on this SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @npins_altcx: The number of Other alternate-C pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct nmk_pinctrl_soc_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) const struct pinctrl_pin_desc *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) const struct nmk_function *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned nfunctions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) const struct nmk_pingroup *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) const struct prcm_gpiocr_altcx_pin_desc *altcx_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned npins_altcx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) const u16 *prcm_gpiocr_registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #ifdef CONFIG_PINCTRL_STN8815
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #ifdef CONFIG_PINCTRL_DB8500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #ifdef CONFIG_PINCTRL_DB8540
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif /* PINCTRL_PINCTRL_NOMADIK_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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