^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) ST-Ericsson SA 2012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/abx500/ab8500.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "pinctrl-abx500.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* All the pins that can be used for GPIO and some other functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ABX500_GPIO(offset) (offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AB8505_PIN_N4 ABX500_GPIO(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AB8505_PIN_R5 ABX500_GPIO(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AB8505_PIN_P5 ABX500_GPIO(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AB8505_PIN_B16 ABX500_GPIO(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AB8505_PIN_B17 ABX500_GPIO(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AB8505_PIN_D17 ABX500_GPIO(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AB8505_PIN_C16 ABX500_GPIO(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AB8505_PIN_P2 ABX500_GPIO(17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AB8505_PIN_N3 ABX500_GPIO(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AB8505_PIN_T1 ABX500_GPIO(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AB8505_PIN_P3 ABX500_GPIO(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AB8505_PIN_H14 ABX500_GPIO(34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define AB8505_PIN_J15 ABX500_GPIO(40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AB8505_PIN_J14 ABX500_GPIO(41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AB8505_PIN_L4 ABX500_GPIO(50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AB8505_PIN_D16 ABX500_GPIO(52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define AB8505_PIN_D15 ABX500_GPIO(53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* indicates the higher GPIO number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AB8505_GPIO_MAX_NUMBER 53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * The names of the pins are denoted by GPIO number and ball name, even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * though they can be used for other things than GPIO, this is the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * column in the table of the data sheet and often used on schematics and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * such.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const struct pinctrl_pin_desc ab8505_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* hole */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * Maps local GPIO offsets to local pin numbers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static const struct abx500_pinrange ab8505_pinranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ABX500_PINRANGE(1, 3, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ABX500_PINRANGE(14, 1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ABX500_PINRANGE(17, 4, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ABX500_PINRANGE(34, 1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ABX500_PINRANGE(40, 2, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ABX500_PINRANGE(52, 2, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Read the pin group names like this:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * The groups are arranged as sets per altfunction column, so we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * mux in one group at a time by selecting the same altfunction for them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * all. When functions require pins on different altfunctions, you need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * to combine several groups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* default column */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* audio data interface 2*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) AB8505_PIN_T1, AB8505_PIN_P3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* modem SDA/SCL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Altfunction A column */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Altfunction B colum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* Altfunction C column */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const struct abx500_pingroup ab8505_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) AB8505_PIN_GROUP(gpio50_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* We use this macro to define the groups applicable to a function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define AB8505_FUNC_GROUPS(a, b...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const char * const a##_groups[] = { b };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) "sysclkreq4_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) "gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "gpio52_a_1", "gpio53_a_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) AB8505_FUNC_GROUPS(adi2, "adi2_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) AB8505_FUNC_GROUPS(resethw, "resethw_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) AB8505_FUNC_GROUPS(service, "service_d_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define FUNCTION(fname) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .name = #fname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .groups = fname##_groups, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .ngroups = ARRAY_SIZE(fname##_groups), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const struct abx500_function ab8505_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) FUNCTION(sysclkreq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) FUNCTION(gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) FUNCTION(pwmout),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) FUNCTION(adi2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) FUNCTION(extcpena),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) FUNCTION(modsclsda),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) FUNCTION(resethw),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) FUNCTION(service),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) FUNCTION(hiqclkena),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) FUNCTION(pdm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) FUNCTION(uartdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) FUNCTION(extvibra),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) FUNCTION(extvibra),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) FUNCTION(usbvdat),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * this table translates what's is in the AB8505 specification regarding the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * example :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * select the mux. ALTA, ALTB and ALTC val indicates values to write in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * ALTERNATFUNC register. We need to specifies these values as SOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * designers didn't apply the same logic on how to select mux in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * ABx500 family.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * As this pins supports at least ALT_B mux, default mux is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * selected by writing 1 in GPIOSEL bit :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * default | 1 | 0 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * alt_A | 0 | 0 | 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * alt_B | 0 | 0 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * alt_C | 0 | 1 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * register is used to select the mux. As this pins doesn't support at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * default | 0 | 0 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * alt_A | 1 | 0 | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * pins 17 to 20 are special case, only bit 0 is used to select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * alternate function for these 4 pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * bits 1 to 3 are reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * For AB8505 Only some GPIOs are interrupt capable, and they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * organized in discontiguous clusters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * GPIO10 to GPIO11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * GPIO13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * GPIO40 and GPIO41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * GPIO50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * GPIO52 to GPIO53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static struct abx500_pinctrl_soc_data ab8505_soc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .gpio_ranges = ab8505_pinranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .pins = ab8505_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .npins = ARRAY_SIZE(ab8505_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .functions = ab8505_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .nfunctions = ARRAY_SIZE(ab8505_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .groups = ab8505_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .ngroups = ARRAY_SIZE(ab8505_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .alternate_functions = ab8505_alternate_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .gpio_irq_cluster = ab8505_gpio_irq_cluster,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .irq_gpio_rising_offset = AB8500_INT_GPIO6R,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .irq_gpio_falling_offset = AB8500_INT_GPIO6F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .irq_gpio_factor = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) *soc = &ab8505_soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags