^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Marvell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Hanna Hawa <hannah@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "pinctrl-mvebu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MPP_MODE(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MPP_FUNCTION(1, "sdio", "clk"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MPP_FUNCTION(3, "spi0", "clk")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MPP_MODE(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MPP_FUNCTION(1, "sdio", "cmd"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MPP_FUNCTION(3, "spi0", "miso")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MPP_MODE(2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MPP_FUNCTION(1, "sdio", "d0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MPP_FUNCTION(3, "spi0", "mosi")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MPP_MODE(3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MPP_FUNCTION(1, "sdio", "d1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MPP_FUNCTION(3, "spi0", "cs0n")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MPP_MODE(4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MPP_FUNCTION(1, "sdio", "d2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MPP_FUNCTION(3, "i2c0", "sda")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MPP_MODE(5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MPP_FUNCTION(1, "sdio", "d3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MPP_FUNCTION(3, "i2c0", "sdk")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MPP_MODE(6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MPP_FUNCTION(1, "sdio", "ds")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MPP_MODE(7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MPP_FUNCTION(1, "sdio", "d4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MPP_FUNCTION(3, "uart1", "rxd")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MPP_MODE(8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MPP_FUNCTION(1, "sdio", "d5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MPP_FUNCTION(3, "uart1", "txd")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MPP_MODE(9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MPP_FUNCTION(1, "sdio", "d6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MPP_FUNCTION(3, "spi0", "cs1n")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MPP_MODE(10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MPP_FUNCTION(1, "sdio", "d7")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MPP_MODE(11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MPP_FUNCTION(3, "uart0", "txd")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MPP_MODE(12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MPP_FUNCTION(1, "sdio", "pw_off"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MPP_FUNCTION(2, "sdio", "hw_rst")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MPP_MODE(13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MPP_MODE(14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MPP_MODE(15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MPP_MODE(16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MPP_MODE(17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MPP_MODE(18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MPP_FUNCTION(0, "gpio", NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MPP_MODE(19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MPP_FUNCTION(0, "gpio", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MPP_FUNCTION(3, "uart0", "rxd"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MPP_FUNCTION(4, "sdio", "pw_off")),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .compatible = "marvell,ap806-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MPP_GPIO_RANGE(0, 0, 0, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) const struct of_device_id *match =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (!match || !pdev->dev.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) soc->variant = 0; /* no variants for Armada AP806 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) soc->controls = armada_ap806_mpp_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) soc->gpioranges = armada_ap806_mpp_gpio_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) soc->modes = armada_ap806_mpp_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) soc->nmodes = armada_ap806_mpp_controls[0].npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) pdev->dev.platform_data = soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct platform_driver armada_ap806_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .name = "armada-ap806-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .probe = armada_ap806_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) builtin_platform_driver(armada_ap806_pinctrl_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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