^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Marvell Armada 380/385 pinctrl driver based on mvebu pinctrl core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Marvell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "pinctrl-mvebu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) V_88F6810 = BIT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) V_88F6820 = BIT(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) V_88F6828 = BIT(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) V_88F6810_PLUS = (V_88F6810 | V_88F6820 | V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) V_88F6820_PLUS = (V_88F6820 | V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MPP_MODE(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MPP_MODE(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MPP_MODE(2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MPP_MODE(3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MPP_MODE(4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MPP_VAR_FUNCTION(1, "ge", "mdc", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MPP_MODE(5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MPP_VAR_FUNCTION(1, "ge", "mdio", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MPP_MODE(6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MPP_VAR_FUNCTION(1, "ge0", "txclkout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MPP_VAR_FUNCTION(2, "ge0", "crs", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MPP_MODE(7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MPP_VAR_FUNCTION(1, "ge0", "txd0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MPP_MODE(8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MPP_VAR_FUNCTION(1, "ge0", "txd1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MPP_MODE(9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MPP_VAR_FUNCTION(1, "ge0", "txd2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MPP_MODE(10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MPP_VAR_FUNCTION(1, "ge0", "txd3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MPP_MODE(11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MPP_VAR_FUNCTION(1, "ge0", "txctl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MPP_MODE(12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MPP_VAR_FUNCTION(1, "ge0", "rxd0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MPP_VAR_FUNCTION(4, "spi0", "cs1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MPP_VAR_FUNCTION(6, "pcie3", "clkreq", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MPP_MODE(13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MPP_VAR_FUNCTION(1, "ge0", "rxd1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MPP_VAR_FUNCTION(2, "pcie0", "clkreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MPP_VAR_FUNCTION(4, "spi0", "cs2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MPP_VAR_FUNCTION(6, "pcie2", "clkreq", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MPP_MODE(14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MPP_VAR_FUNCTION(1, "ge0", "rxd2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MPP_VAR_FUNCTION(3, "dram", "vttctrl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MPP_VAR_FUNCTION(4, "spi0", "cs3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MPP_VAR_FUNCTION(5, "dev", "we1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MPP_VAR_FUNCTION(6, "pcie3", "clkreq", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MPP_MODE(15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MPP_VAR_FUNCTION(1, "ge0", "rxd3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MPP_VAR_FUNCTION(2, "ge", "mdc slave", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MPP_MODE(16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MPP_VAR_FUNCTION(1, "ge0", "rxctl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MPP_VAR_FUNCTION(2, "ge", "mdio slave", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MPP_VAR_FUNCTION(5, "pcie0", "clkreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MPP_VAR_FUNCTION(6, "pcie1", "clkreq", V_88F6820_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MPP_MODE(17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MPP_VAR_FUNCTION(1, "ge0", "rxclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MPP_VAR_FUNCTION(5, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MPP_VAR_FUNCTION(6, "sata0", "prsnt", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MPP_MODE(18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MPP_VAR_FUNCTION(1, "ge0", "rxerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MPP_VAR_FUNCTION(2, "ptp", "trig", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MPP_MODE(19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MPP_VAR_FUNCTION(1, "ge0", "col", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MPP_VAR_FUNCTION(2, "ptp", "evreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MPP_VAR_FUNCTION(3, "ge0", "txerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MPP_MODE(20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MPP_VAR_FUNCTION(1, "ge0", "txclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MPP_VAR_FUNCTION(4, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MPP_MODE(21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MPP_VAR_FUNCTION(2, "ge1", "rxd0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) MPP_VAR_FUNCTION(3, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MPP_VAR_FUNCTION(4, "sd0", "cmd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MPP_VAR_FUNCTION(6, "sata1", "prsnt", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MPP_MODE(22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MPP_MODE(23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MPP_MODE(24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MPP_VAR_FUNCTION(4, "sd0", "d4", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MPP_VAR_FUNCTION(5, "dev", "ready", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MPP_MODE(25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MPP_VAR_FUNCTION(4, "sd0", "d5", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MPP_MODE(26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) MPP_VAR_FUNCTION(4, "sd0", "d6", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MPP_MODE(27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MPP_VAR_FUNCTION(2, "ge1", "txclkout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MPP_VAR_FUNCTION(4, "sd0", "d7", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MPP_MODE(28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) MPP_VAR_FUNCTION(2, "ge1", "txd0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MPP_VAR_FUNCTION(4, "sd0", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) MPP_MODE(29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MPP_VAR_FUNCTION(2, "ge1", "txd1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MPP_MODE(30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MPP_VAR_FUNCTION(2, "ge1", "txd2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MPP_VAR_FUNCTION(5, "dev", "oe", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MPP_MODE(31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MPP_VAR_FUNCTION(2, "ge1", "txd3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MPP_MODE(32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MPP_VAR_FUNCTION(2, "ge1", "txctl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MPP_VAR_FUNCTION(5, "dev", "we0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MPP_MODE(33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MPP_VAR_FUNCTION(1, "dram", "deccerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) MPP_MODE(34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MPP_MODE(35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) MPP_MODE(36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MPP_VAR_FUNCTION(1, "ptp", "trig", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MPP_MODE(37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MPP_VAR_FUNCTION(1, "ptp", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) MPP_VAR_FUNCTION(2, "ge1", "rxclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MPP_VAR_FUNCTION(4, "sd0", "d3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MPP_MODE(38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MPP_VAR_FUNCTION(1, "ptp", "evreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) MPP_VAR_FUNCTION(2, "ge1", "rxd1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) MPP_MODE(39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) MPP_VAR_FUNCTION(2, "ge1", "rxd2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MPP_VAR_FUNCTION(4, "sd0", "d1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MPP_MODE(40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MPP_VAR_FUNCTION(2, "ge1", "rxd3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MPP_VAR_FUNCTION(4, "sd0", "d2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) MPP_MODE(41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MPP_VAR_FUNCTION(2, "ge1", "rxctl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MPP_VAR_FUNCTION(5, "dev", "burst/last", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MPP_VAR_FUNCTION(6, "nand", "rb0", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MPP_MODE(42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MPP_MODE(43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MPP_VAR_FUNCTION(2, "dram", "vttctrl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MPP_VAR_FUNCTION(6, "nand", "rb1", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MPP_MODE(44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MPP_VAR_FUNCTION(4, "sata3", "prsnt", V_88F6828)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MPP_MODE(45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MPP_MODE(46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MPP_MODE(47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MPP_VAR_FUNCTION(5, "sata3", "prsnt", V_88F6828)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MPP_MODE(48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) MPP_VAR_FUNCTION(2, "dram", "vttctrl", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) MPP_VAR_FUNCTION(3, "tdm", "pclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MPP_VAR_FUNCTION(5, "sd0", "d4", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MPP_VAR_FUNCTION(6, "pcie0", "clkreq", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MPP_MODE(49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MPP_VAR_FUNCTION(1, "sata2", "prsnt", V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MPP_VAR_FUNCTION(2, "sata3", "prsnt", V_88F6828),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MPP_VAR_FUNCTION(3, "tdm", "fsync", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MPP_VAR_FUNCTION(5, "sd0", "d5", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MPP_VAR_FUNCTION(6, "pcie1", "clkreq", V_88F6820_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MPP_MODE(50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MPP_VAR_FUNCTION(3, "tdm", "drx", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MPP_VAR_FUNCTION(5, "sd0", "cmd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MPP_MODE(51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MPP_VAR_FUNCTION(3, "tdm", "dtx", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MPP_VAR_FUNCTION(5, "dram", "deccerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MPP_VAR_FUNCTION(6, "ptp", "trig", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) MPP_MODE(52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MPP_VAR_FUNCTION(3, "tdm", "int", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MPP_VAR_FUNCTION(5, "sd0", "d6", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MPP_VAR_FUNCTION(6, "ptp", "clk", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MPP_MODE(53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MPP_VAR_FUNCTION(1, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MPP_VAR_FUNCTION(2, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MPP_VAR_FUNCTION(3, "tdm", "rst", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MPP_VAR_FUNCTION(5, "sd0", "d7", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MPP_VAR_FUNCTION(6, "ptp", "evreq", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MPP_MODE(54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MPP_VAR_FUNCTION(4, "ge0", "txerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MPP_VAR_FUNCTION(5, "sd0", "d3", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MPP_MODE(55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MPP_VAR_FUNCTION(2, "ge", "mdio", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MPP_VAR_FUNCTION(5, "sd0", "d0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MPP_MODE(56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MPP_VAR_FUNCTION(2, "ge", "mdc", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MPP_VAR_FUNCTION(3, "dram", "deccerr", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) MPP_MODE(57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) MPP_VAR_FUNCTION(5, "sd0", "clk", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MPP_MODE(58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MPP_VAR_FUNCTION(1, "pcie1", "clkreq", V_88F6820_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) MPP_VAR_FUNCTION(5, "sd0", "d1", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MPP_MODE(59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6810_PLUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MPP_VAR_FUNCTION(5, "sd0", "d2", V_88F6810_PLUS)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static struct mvebu_pinctrl_soc_info armada_38x_pinctrl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static const struct of_device_id armada_38x_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .compatible = "marvell,mv88f6810-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .data = (void *) V_88F6810,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .compatible = "marvell,mv88f6820-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .data = (void *) V_88F6820,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .compatible = "marvell,mv88f6828-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .data = (void *) V_88F6828,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static const struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) MPP_FUNC_CTRL(0, 59, NULL, mvebu_mmio_mpp_ctrl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static struct pinctrl_gpio_range armada_38x_mpp_gpio_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) MPP_GPIO_RANGE(0, 0, 0, 32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) MPP_GPIO_RANGE(1, 32, 32, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int armada_38x_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) const struct of_device_id *match =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) of_match_device(armada_38x_pinctrl_of_match, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (!match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) soc->variant = (unsigned) match->data & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) soc->controls = armada_38x_mpp_controls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) soc->gpioranges = armada_38x_mpp_gpio_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) soc->ngpioranges = ARRAY_SIZE(armada_38x_mpp_gpio_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) soc->modes = armada_38x_mpp_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) soc->nmodes = armada_38x_mpp_controls[0].npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pdev->dev.platform_data = soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return mvebu_pinctrl_simple_mmio_probe(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static struct platform_driver armada_38x_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .name = "armada-38x-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .of_match_table = of_match_ptr(armada_38x_pinctrl_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .probe = armada_38x_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) builtin_platform_driver(armada_38x_pinctrl_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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