^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * First generation of pinmux driver for Amlogic Meson SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2017 Jerome Brunet <jbrunet@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /* For this first generation of pinctrl driver every pinmux group can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * enabled by a specific bit in the first register range. When all groups for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * a given pin are disabled the pin acts as a GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pinctrl/pinmux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "pinctrl-meson.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "pinctrl-meson8-pmx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * meson8_pmx_disable_other_groups() - disable other groups using a given pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * @pc: meson pin controller device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @pin: number of the pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * @sel_group: index of the selected group, or -1 if none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * The function disables all pinmux groups using a pin except the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * selected one. If @sel_group is -1 all groups are disabled, leaving
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * the pin in GPIO mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int pin, int sel_group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct meson_pmx_group *group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct meson8_pmx_data *pmx_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) for (i = 0; i < pc->data->num_groups; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) group = &pc->data->groups[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) pmx_data = (struct meson8_pmx_data *)group->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (pmx_data->is_gpio || i == sel_group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) for (j = 0; j < group->num_pins; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (group->pins[j] == pin) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* We have found a group using the pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) regmap_update_bits(pc->reg_mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) pmx_data->reg * 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) BIT(pmx_data->bit), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int meson8_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned group_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct meson_pmx_func *func = &pc->data->funcs[func_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct meson_pmx_group *group = &pc->data->groups[group_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct meson8_pmx_data *pmx_data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) (struct meson8_pmx_data *)group->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) dev_dbg(pc->dev, "enable function %s, group %s\n", func->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) group->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Disable groups using the same pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * The selected group is not disabled to avoid glitches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) for (i = 0; i < group->num_pins; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) meson8_pmx_disable_other_groups(pc, group->pins[i], group_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Function 0 (GPIO) doesn't need any additional setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (func_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ret = regmap_update_bits(pc->reg_mux, pmx_data->reg * 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) BIT(pmx_data->bit),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) BIT(pmx_data->bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int meson8_pmx_request_gpio(struct pinctrl_dev *pcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct pinctrl_gpio_range *range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) meson8_pmx_disable_other_groups(pc, offset, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) const struct pinmux_ops meson8_pmx_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .set_mux = meson8_pmx_set_mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .get_functions_count = meson_pmx_get_funcs_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .get_function_name = meson_pmx_get_func_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .get_function_groups = meson_pmx_get_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .gpio_request_enable = meson8_pmx_request_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) EXPORT_SYMBOL_GPL(meson8_pmx_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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