^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Pin controller and GPIO driver for Amlogic Meson GXBB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Endless Mobile, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Carlo Caione <carlo@endlessm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <dt-bindings/gpio/meson-gxbb-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "pinctrl-meson.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-meson8-pmx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) MESON_PIN(GPIOZ_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MESON_PIN(GPIOZ_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MESON_PIN(GPIOZ_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MESON_PIN(GPIOZ_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MESON_PIN(GPIOZ_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MESON_PIN(GPIOZ_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MESON_PIN(GPIOZ_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MESON_PIN(GPIOZ_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MESON_PIN(GPIOZ_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MESON_PIN(GPIOZ_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MESON_PIN(GPIOZ_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MESON_PIN(GPIOZ_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MESON_PIN(GPIOZ_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MESON_PIN(GPIOZ_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MESON_PIN(GPIOZ_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MESON_PIN(GPIOZ_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MESON_PIN(GPIOH_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MESON_PIN(GPIOH_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MESON_PIN(GPIOH_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MESON_PIN(GPIOH_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MESON_PIN(BOOT_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MESON_PIN(BOOT_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MESON_PIN(BOOT_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MESON_PIN(BOOT_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MESON_PIN(BOOT_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MESON_PIN(BOOT_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MESON_PIN(BOOT_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MESON_PIN(BOOT_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MESON_PIN(BOOT_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MESON_PIN(BOOT_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MESON_PIN(BOOT_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MESON_PIN(BOOT_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MESON_PIN(BOOT_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MESON_PIN(BOOT_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MESON_PIN(BOOT_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MESON_PIN(BOOT_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MESON_PIN(BOOT_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MESON_PIN(BOOT_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MESON_PIN(CARD_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MESON_PIN(CARD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MESON_PIN(CARD_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MESON_PIN(CARD_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MESON_PIN(CARD_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MESON_PIN(CARD_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MESON_PIN(CARD_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MESON_PIN(GPIODV_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MESON_PIN(GPIODV_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MESON_PIN(GPIODV_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MESON_PIN(GPIODV_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MESON_PIN(GPIODV_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MESON_PIN(GPIODV_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MESON_PIN(GPIODV_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MESON_PIN(GPIODV_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MESON_PIN(GPIODV_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MESON_PIN(GPIODV_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MESON_PIN(GPIODV_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MESON_PIN(GPIODV_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MESON_PIN(GPIODV_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MESON_PIN(GPIODV_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MESON_PIN(GPIODV_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MESON_PIN(GPIODV_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MESON_PIN(GPIODV_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MESON_PIN(GPIODV_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MESON_PIN(GPIODV_18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MESON_PIN(GPIODV_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MESON_PIN(GPIODV_20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MESON_PIN(GPIODV_21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MESON_PIN(GPIODV_22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MESON_PIN(GPIODV_23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MESON_PIN(GPIODV_24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MESON_PIN(GPIODV_25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MESON_PIN(GPIODV_26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MESON_PIN(GPIODV_27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MESON_PIN(GPIODV_28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MESON_PIN(GPIODV_29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MESON_PIN(GPIOY_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MESON_PIN(GPIOY_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MESON_PIN(GPIOY_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MESON_PIN(GPIOY_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MESON_PIN(GPIOY_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MESON_PIN(GPIOY_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MESON_PIN(GPIOY_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MESON_PIN(GPIOY_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MESON_PIN(GPIOY_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MESON_PIN(GPIOY_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MESON_PIN(GPIOY_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MESON_PIN(GPIOY_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MESON_PIN(GPIOY_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MESON_PIN(GPIOY_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MESON_PIN(GPIOY_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MESON_PIN(GPIOY_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MESON_PIN(GPIOY_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MESON_PIN(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MESON_PIN(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MESON_PIN(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MESON_PIN(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) MESON_PIN(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MESON_PIN(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MESON_PIN(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MESON_PIN(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MESON_PIN(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MESON_PIN(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MESON_PIN(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MESON_PIN(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MESON_PIN(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MESON_PIN(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MESON_PIN(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MESON_PIN(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MESON_PIN(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MESON_PIN(GPIOX_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MESON_PIN(GPIOX_18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MESON_PIN(GPIOX_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MESON_PIN(GPIOX_20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MESON_PIN(GPIOX_21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MESON_PIN(GPIOX_22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MESON_PIN(GPIOCLK_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MESON_PIN(GPIOCLK_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MESON_PIN(GPIOCLK_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MESON_PIN(GPIOCLK_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const unsigned int emmc_nand_d07_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const unsigned int emmc_clk_pins[] = { BOOT_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const unsigned int emmc_ds_pins[] = { BOOT_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static const unsigned int nor_d_pins[] = { BOOT_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static const unsigned int nor_q_pins[] = { BOOT_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static const unsigned int nor_c_pins[] = { BOOT_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const unsigned int nor_cs_pins[] = { BOOT_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const unsigned int spi_sclk_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const unsigned int spi_ss0_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const unsigned int spi_miso_pins[] = { GPIOZ_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const unsigned int spi_mosi_pins[] = { GPIOZ_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const unsigned int sdcard_d0_pins[] = { CARD_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static const unsigned int sdcard_d1_pins[] = { CARD_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static const unsigned int sdcard_d2_pins[] = { CARD_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const unsigned int sdcard_d3_pins[] = { CARD_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const unsigned int sdcard_cmd_pins[] = { CARD_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const unsigned int sdcard_clk_pins[] = { CARD_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const unsigned int sdio_cmd_pins[] = { GPIOX_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const unsigned int sdio_clk_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const unsigned int sdio_irq_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const unsigned int nand_ce0_pins[] = { BOOT_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const unsigned int nand_ce1_pins[] = { BOOT_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const unsigned int nand_rb0_pins[] = { BOOT_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const unsigned int nand_ale_pins[] = { BOOT_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const unsigned int nand_cle_pins[] = { BOOT_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const unsigned int nand_ren_wr_pins[] = { BOOT_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static const unsigned int nand_dqs_pins[] = { BOOT_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static const unsigned int uart_tx_a_pins[] = { GPIOX_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const unsigned int uart_rx_a_pins[] = { GPIOX_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const unsigned int uart_cts_a_pins[] = { GPIOX_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const unsigned int uart_rts_a_pins[] = { GPIOX_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static const unsigned int uart_tx_b_pins[] = { GPIODV_24 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const unsigned int uart_rx_b_pins[] = { GPIODV_25 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const unsigned int uart_cts_b_pins[] = { GPIODV_26 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const unsigned int uart_rts_b_pins[] = { GPIODV_27 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const unsigned int uart_tx_c_pins[] = { GPIOY_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const unsigned int uart_rx_c_pins[] = { GPIOY_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static const unsigned int uart_cts_c_pins[] = { GPIOY_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const unsigned int uart_rts_c_pins[] = { GPIOY_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static const unsigned int i2c_sck_b_pins[] = { GPIODV_27 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const unsigned int i2c_sda_b_pins[] = { GPIODV_26 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const unsigned int i2c_sck_c_pins[] = { GPIODV_29 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static const unsigned int i2c_sda_c_pins[] = { GPIODV_28 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const unsigned int eth_mdio_pins[] = { GPIOZ_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const unsigned int eth_mdc_pins[] = { GPIOZ_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const unsigned int eth_clk_rx_clk_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static const unsigned int eth_rxd2_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static const unsigned int eth_rxd3_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const unsigned int eth_tx_en_pins[] = { GPIOZ_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const unsigned int eth_txd0_pins[] = { GPIOZ_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static const unsigned int eth_txd1_pins[] = { GPIOZ_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static const unsigned int eth_txd2_pins[] = { GPIOZ_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const unsigned int eth_txd3_pins[] = { GPIOZ_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const unsigned int pwm_a_x_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const unsigned int pwm_a_y_pins[] = { GPIOY_16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const unsigned int pwm_b_pins[] = { GPIODV_29 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const unsigned int pwm_d_pins[] = { GPIODV_28 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static const unsigned int pwm_e_pins[] = { GPIOX_19 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const unsigned int pwm_f_x_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static const unsigned int pwm_f_y_pins[] = { GPIOY_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static const unsigned int tsin_a_d_valid_pins[] = { GPIOY_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const unsigned int tsin_a_sop_pins[] = { GPIOY_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const unsigned int tsin_a_clk_pins[] = { GPIOY_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static const unsigned int tsin_a_d0_pins[] = { GPIOY_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static const unsigned int tsin_a_dp_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) GPIOY_4, GPIOY_5, GPIOY_6, GPIOY_7, GPIOY_8, GPIOY_9, GPIOY_10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const unsigned int tsin_a_fail_pins[] = { GPIOY_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const unsigned int i2s_out_ch23_y_pins[] = { GPIOY_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const unsigned int i2s_out_ch45_y_pins[] = { GPIOY_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static const unsigned int i2s_out_ch67_y_pins[] = { GPIOY_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const unsigned int tsin_b_d_valid_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static const unsigned int tsin_b_sop_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static const unsigned int tsin_b_clk_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static const unsigned int tsin_b_d0_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static const unsigned int spdif_out_y_pins[] = { GPIOY_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const unsigned int gen_clk_out_pins[] = { GPIOY_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MESON_PIN(GPIOAO_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MESON_PIN(GPIOAO_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MESON_PIN(GPIOAO_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MESON_PIN(GPIOAO_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MESON_PIN(GPIOAO_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MESON_PIN(GPIOAO_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MESON_PIN(GPIOAO_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MESON_PIN(GPIOAO_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MESON_PIN(GPIOAO_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MESON_PIN(GPIOAO_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MESON_PIN(GPIOAO_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MESON_PIN(GPIOAO_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MESON_PIN(GPIOAO_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MESON_PIN(GPIOAO_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MESON_PIN(GPIO_TEST_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static const unsigned int uart_tx_ao_b_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const unsigned int uart_rx_ao_b_pins[] = { GPIOAO_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const unsigned int i2c_slave_sck_ao_pins[] = {GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const unsigned int i2c_slave_sda_ao_pins[] = {GPIOAO_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static const unsigned int remote_input_ao_pins[] = { GPIOAO_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static const unsigned int pwm_ao_a_3_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static const unsigned int pwm_ao_a_6_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static const unsigned int pwm_ao_a_12_pins[] = { GPIOAO_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static const unsigned int pwm_ao_b_pins[] = { GPIOAO_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static const unsigned int i2s_am_clk_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const unsigned int i2s_out_ao_clk_pins[] = { GPIOAO_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static const unsigned int i2s_out_lr_clk_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const unsigned int i2s_out_ch23_ao_pins[] = { GPIOAO_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const unsigned int i2s_out_ch45_ao_pins[] = { GPIOAO_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static const unsigned int i2s_out_ch67_ao_pins[] = { GPIO_TEST_N };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static const unsigned int spdif_out_ao_6_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const unsigned int spdif_out_ao_13_pins[] = { GPIOAO_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const unsigned int ao_cec_pins[] = { GPIOAO_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const unsigned int ee_cec_pins[] = { GPIOAO_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) GPIO_GROUP(GPIOZ_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) GPIO_GROUP(GPIOZ_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) GPIO_GROUP(GPIOZ_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) GPIO_GROUP(GPIOZ_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) GPIO_GROUP(GPIOZ_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) GPIO_GROUP(GPIOZ_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) GPIO_GROUP(GPIOZ_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) GPIO_GROUP(GPIOZ_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) GPIO_GROUP(GPIOZ_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) GPIO_GROUP(GPIOZ_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) GPIO_GROUP(GPIOZ_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) GPIO_GROUP(GPIOZ_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) GPIO_GROUP(GPIOZ_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) GPIO_GROUP(GPIOZ_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) GPIO_GROUP(GPIOZ_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) GPIO_GROUP(GPIOZ_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) GPIO_GROUP(GPIOH_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) GPIO_GROUP(GPIOH_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) GPIO_GROUP(GPIOH_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) GPIO_GROUP(GPIOH_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) GPIO_GROUP(BOOT_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) GPIO_GROUP(BOOT_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) GPIO_GROUP(BOOT_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) GPIO_GROUP(BOOT_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) GPIO_GROUP(BOOT_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) GPIO_GROUP(BOOT_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) GPIO_GROUP(BOOT_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) GPIO_GROUP(BOOT_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) GPIO_GROUP(BOOT_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) GPIO_GROUP(BOOT_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) GPIO_GROUP(BOOT_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) GPIO_GROUP(BOOT_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) GPIO_GROUP(BOOT_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) GPIO_GROUP(BOOT_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) GPIO_GROUP(BOOT_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) GPIO_GROUP(BOOT_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) GPIO_GROUP(BOOT_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) GPIO_GROUP(BOOT_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) GPIO_GROUP(CARD_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) GPIO_GROUP(CARD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) GPIO_GROUP(CARD_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) GPIO_GROUP(CARD_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) GPIO_GROUP(CARD_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) GPIO_GROUP(CARD_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) GPIO_GROUP(CARD_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) GPIO_GROUP(GPIODV_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) GPIO_GROUP(GPIODV_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) GPIO_GROUP(GPIODV_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) GPIO_GROUP(GPIODV_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) GPIO_GROUP(GPIODV_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) GPIO_GROUP(GPIODV_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) GPIO_GROUP(GPIODV_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) GPIO_GROUP(GPIODV_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) GPIO_GROUP(GPIODV_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) GPIO_GROUP(GPIODV_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) GPIO_GROUP(GPIODV_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) GPIO_GROUP(GPIODV_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) GPIO_GROUP(GPIODV_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) GPIO_GROUP(GPIODV_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) GPIO_GROUP(GPIODV_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) GPIO_GROUP(GPIODV_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) GPIO_GROUP(GPIODV_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) GPIO_GROUP(GPIODV_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) GPIO_GROUP(GPIODV_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GPIO_GROUP(GPIODV_20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) GPIO_GROUP(GPIODV_21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) GPIO_GROUP(GPIODV_22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) GPIO_GROUP(GPIODV_23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) GPIO_GROUP(GPIODV_24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) GPIO_GROUP(GPIODV_25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) GPIO_GROUP(GPIODV_26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) GPIO_GROUP(GPIODV_27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) GPIO_GROUP(GPIODV_28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) GPIO_GROUP(GPIODV_29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) GPIO_GROUP(GPIOY_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) GPIO_GROUP(GPIOY_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) GPIO_GROUP(GPIOY_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) GPIO_GROUP(GPIOY_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) GPIO_GROUP(GPIOY_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) GPIO_GROUP(GPIOY_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) GPIO_GROUP(GPIOY_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) GPIO_GROUP(GPIOY_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) GPIO_GROUP(GPIOY_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) GPIO_GROUP(GPIOY_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) GPIO_GROUP(GPIOY_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) GPIO_GROUP(GPIOY_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) GPIO_GROUP(GPIOY_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) GPIO_GROUP(GPIOY_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) GPIO_GROUP(GPIOY_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) GPIO_GROUP(GPIOY_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) GPIO_GROUP(GPIOY_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) GPIO_GROUP(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) GPIO_GROUP(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) GPIO_GROUP(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) GPIO_GROUP(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) GPIO_GROUP(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) GPIO_GROUP(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) GPIO_GROUP(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) GPIO_GROUP(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) GPIO_GROUP(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) GPIO_GROUP(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) GPIO_GROUP(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) GPIO_GROUP(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) GPIO_GROUP(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) GPIO_GROUP(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) GPIO_GROUP(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) GPIO_GROUP(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) GPIO_GROUP(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) GPIO_GROUP(GPIOX_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) GPIO_GROUP(GPIOX_18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) GPIO_GROUP(GPIOX_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) GPIO_GROUP(GPIOX_20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) GPIO_GROUP(GPIOX_21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) GPIO_GROUP(GPIOX_22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) GPIO_GROUP(GPIOCLK_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) GPIO_GROUP(GPIOCLK_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) GPIO_GROUP(GPIOCLK_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) GPIO_GROUP(GPIOCLK_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) GPIO_GROUP(GPIO_TEST_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* Bank X */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) GROUP(sdio_d0, 8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) GROUP(sdio_d1, 8, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) GROUP(sdio_d2, 8, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) GROUP(sdio_d3, 8, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) GROUP(sdio_cmd, 8, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) GROUP(sdio_clk, 8, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) GROUP(sdio_irq, 8, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) GROUP(uart_tx_a, 4, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) GROUP(uart_rx_a, 4, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) GROUP(uart_cts_a, 4, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) GROUP(uart_rts_a, 4, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) GROUP(pwm_a_x, 3, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) GROUP(pwm_e, 2, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) GROUP(pwm_f_x, 3, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) GROUP(tsin_b_d_valid, 3, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) GROUP(tsin_b_sop, 3, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) GROUP(tsin_b_clk, 3, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) GROUP(tsin_b_d0, 3, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* Bank Y */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) GROUP(uart_cts_c, 1, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) GROUP(uart_rts_c, 1, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) GROUP(uart_tx_c, 1, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) GROUP(uart_rx_c, 1, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) GROUP(tsin_a_fail, 3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) GROUP(tsin_a_d_valid, 3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) GROUP(tsin_a_sop, 3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) GROUP(tsin_a_clk, 3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) GROUP(tsin_a_d0, 3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) GROUP(tsin_a_dp, 3, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) GROUP(pwm_a_y, 1, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) GROUP(pwm_f_y, 1, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) GROUP(i2s_out_ch23_y, 1, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) GROUP(i2s_out_ch45_y, 1, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) GROUP(i2s_out_ch67_y, 1, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) GROUP(spdif_out_y, 1, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) GROUP(gen_clk_out, 6, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* Bank Z */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) GROUP(eth_mdio, 6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) GROUP(eth_mdc, 6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) GROUP(eth_clk_rx_clk, 6, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) GROUP(eth_rx_dv, 6, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) GROUP(eth_rxd0, 6, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) GROUP(eth_rxd1, 6, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) GROUP(eth_rxd2, 6, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) GROUP(eth_rxd3, 6, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) GROUP(eth_rgmii_tx_clk, 6, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) GROUP(eth_tx_en, 6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) GROUP(eth_txd0, 6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) GROUP(eth_txd1, 6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) GROUP(eth_txd2, 6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) GROUP(eth_txd3, 6, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) GROUP(spi_ss0, 5, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) GROUP(spi_sclk, 5, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) GROUP(spi_miso, 5, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) GROUP(spi_mosi, 5, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* Bank H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) GROUP(hdmi_hpd, 1, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) GROUP(hdmi_sda, 1, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) GROUP(hdmi_scl, 1, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /* Bank DV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) GROUP(uart_tx_b, 2, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) GROUP(uart_rx_b, 2, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) GROUP(uart_cts_b, 2, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) GROUP(uart_rts_b, 2, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) GROUP(pwm_b, 3, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) GROUP(pwm_d, 3, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) GROUP(i2c_sck_a, 7, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) GROUP(i2c_sda_a, 7, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) GROUP(i2c_sck_b, 7, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) GROUP(i2c_sda_b, 7, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) GROUP(i2c_sck_c, 7, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) GROUP(i2c_sda_c, 7, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* Bank BOOT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) GROUP(emmc_nand_d07, 4, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) GROUP(emmc_clk, 4, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) GROUP(emmc_cmd, 4, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) GROUP(emmc_ds, 4, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) GROUP(nor_d, 5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) GROUP(nor_q, 5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) GROUP(nor_c, 5, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) GROUP(nor_cs, 5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) GROUP(nand_ce0, 4, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) GROUP(nand_ce1, 4, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) GROUP(nand_rb0, 4, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) GROUP(nand_ale, 4, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) GROUP(nand_cle, 4, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) GROUP(nand_wen_clk, 4, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) GROUP(nand_ren_wr, 4, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) GROUP(nand_dqs, 4, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* Bank CARD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) GROUP(sdcard_d1, 2, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) GROUP(sdcard_d0, 2, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) GROUP(sdcard_d3, 2, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) GROUP(sdcard_d2, 2, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) GROUP(sdcard_cmd, 2, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) GROUP(sdcard_clk, 2, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) GPIO_GROUP(GPIOAO_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) GPIO_GROUP(GPIOAO_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) GPIO_GROUP(GPIOAO_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) GPIO_GROUP(GPIOAO_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) GPIO_GROUP(GPIOAO_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) GPIO_GROUP(GPIOAO_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) GPIO_GROUP(GPIOAO_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) GPIO_GROUP(GPIOAO_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) GPIO_GROUP(GPIOAO_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) GPIO_GROUP(GPIOAO_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) GPIO_GROUP(GPIOAO_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) GPIO_GROUP(GPIOAO_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) GPIO_GROUP(GPIOAO_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) GPIO_GROUP(GPIOAO_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* bank AO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) GROUP(uart_tx_ao_b, 0, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) GROUP(uart_rx_ao_b, 0, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) GROUP(uart_tx_ao_a, 0, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) GROUP(uart_rx_ao_a, 0, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) GROUP(uart_cts_ao_a, 0, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) GROUP(uart_rts_ao_a, 0, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) GROUP(uart_cts_ao_b, 0, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) GROUP(uart_rts_ao_b, 0, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) GROUP(i2c_sck_ao, 0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) GROUP(i2c_sda_ao, 0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) GROUP(i2c_slave_sck_ao, 0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) GROUP(i2c_slave_sda_ao, 0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) GROUP(remote_input_ao, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) GROUP(pwm_ao_a_3, 0, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) GROUP(pwm_ao_a_6, 0, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) GROUP(pwm_ao_a_12, 0, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) GROUP(pwm_ao_b, 0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) GROUP(i2s_am_clk, 0, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) GROUP(i2s_out_ao_clk, 0, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) GROUP(i2s_out_lr_clk, 0, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) GROUP(i2s_out_ch01_ao, 0, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) GROUP(i2s_out_ch23_ao, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) GROUP(i2s_out_ch45_ao, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) GROUP(spdif_out_ao_6, 0, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) GROUP(spdif_out_ao_13, 0, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) GROUP(ao_cec, 0, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) GROUP(ee_cec, 0, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /* test n pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) GROUP(i2s_out_ch67_ao, 1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static const char * const gpio_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) "GPIOZ_15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) "BOOT_15", "BOOT_16", "BOOT_17",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) "CARD_5", "CARD_6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) "GPIOY_15", "GPIOY_16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) "GPIOX_20", "GPIOX_21", "GPIOX_22",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static const char * const tsin_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) "tsin_a_clk", "tsin_a_sop", "tsin_a_d_valid", "tsin_a_d0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) "tsin_a_dp", "tsin_a_fail",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static const char * const tsin_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) "tsin_b_clk", "tsin_b_sop", "tsin_b_d_valid", "tsin_b_d0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static const char * const emmc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static const char * const nor_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) "nor_d", "nor_q", "nor_c", "nor_cs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static const char * const spi_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) "spi_mosi", "spi_miso", "spi_ss0", "spi_sclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static const char * const sdcard_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) "sdcard_cmd", "sdcard_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static const char * const sdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) "sdio_cmd", "sdio_clk", "sdio_irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const char * const nand_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const char * const uart_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static const char * const uart_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const char * const uart_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static const char * const i2c_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) "i2c_sck_a", "i2c_sda_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static const char * const i2c_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) "i2c_sck_b", "i2c_sda_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static const char * const i2c_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) "i2c_sck_c", "i2c_sda_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const char * const eth_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) "eth_rgmii_tx_clk", "eth_tx_en",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static const char * const pwm_a_x_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) "pwm_a_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) static const char * const pwm_a_y_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) "pwm_a_y",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) static const char * const pwm_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) "pwm_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static const char * const pwm_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "pwm_d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static const char * const pwm_e_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) "pwm_e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static const char * const pwm_f_x_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) "pwm_f_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static const char * const pwm_f_y_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) "pwm_f_y",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const char * const hdmi_hpd_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) "hdmi_hpd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const char * const hdmi_i2c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "hdmi_sda", "hdmi_scl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static const char * const i2s_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) "i2s_out_ch23_y", "i2s_out_ch45_y", "i2s_out_ch67_y",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static const char * const spdif_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) "spdif_out_y",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static const char * const gen_clk_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) "gen_clk_out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static const char * const gpio_aobus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) "GPIO_TEST_N",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static const char * const uart_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static const char * const uart_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) static const char * const i2c_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) "i2c_sck_ao", "i2c_sda_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) static const char * const i2c_slave_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) "i2c_slave_sck_ao", "i2c_slave_sda_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static const char * const remote_input_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) "remote_input_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static const char * const pwm_ao_a_3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) "pwm_ao_a_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const char * const pwm_ao_a_6_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "pwm_ao_a_6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) static const char * const pwm_ao_a_12_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) "pwm_ao_a_12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static const char * const pwm_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "pwm_ao_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static const char * const i2s_out_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) "i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) "i2s_out_ch01_ao", "i2s_out_ch23_ao", "i2s_out_ch45_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) "i2s_out_ch67_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) static const char * const spdif_out_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "spdif_out_ao_6", "spdif_out_ao_13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static const char * const cec_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) "ao_cec", "ee_cec",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) FUNCTION(gpio_periphs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) FUNCTION(emmc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) FUNCTION(nor),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) FUNCTION(spi),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) FUNCTION(sdcard),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) FUNCTION(sdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) FUNCTION(nand),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) FUNCTION(uart_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) FUNCTION(uart_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) FUNCTION(uart_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) FUNCTION(i2c_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) FUNCTION(i2c_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) FUNCTION(i2c_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) FUNCTION(eth),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) FUNCTION(pwm_a_x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) FUNCTION(pwm_a_y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) FUNCTION(pwm_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) FUNCTION(pwm_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) FUNCTION(pwm_e),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) FUNCTION(pwm_f_x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) FUNCTION(pwm_f_y),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) FUNCTION(hdmi_hpd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) FUNCTION(hdmi_i2c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) FUNCTION(i2s_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) FUNCTION(spdif_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) FUNCTION(gen_clk_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) FUNCTION(tsin_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) FUNCTION(tsin_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) FUNCTION(gpio_aobus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) FUNCTION(uart_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) FUNCTION(uart_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) FUNCTION(i2c_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) FUNCTION(i2c_slave_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) FUNCTION(remote_input_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) FUNCTION(pwm_ao_a_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) FUNCTION(pwm_ao_a_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) FUNCTION(pwm_ao_a_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) FUNCTION(pwm_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) FUNCTION(i2s_out_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) FUNCTION(spdif_out_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) FUNCTION(cec_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) static struct meson_bank meson_gxbb_periphs_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) /* name first last irq pullen pull dir out in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) BANK("X", GPIOX_0, GPIOX_22, 106, 128, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) BANK("Y", GPIOY_0, GPIOY_16, 89, 105, 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) BANK("DV", GPIODV_0, GPIODV_29, 59, 88, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) BANK("H", GPIOH_0, GPIOH_3, 30, 33, 1, 20, 1, 20, 3, 20, 4, 20, 5, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) BANK("Z", GPIOZ_0, GPIOZ_15, 14, 29, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) BANK("CARD", CARD_0, CARD_6, 52, 58, 2, 20, 2, 20, 6, 20, 7, 20, 8, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) BANK("BOOT", BOOT_0, BOOT_17, 34, 51, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) BANK("CLK", GPIOCLK_0, GPIOCLK_3, 129, 132, 3, 28, 3, 28, 9, 28, 10, 28, 11, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static struct meson_bank meson_gxbb_aobus_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) /* name first last irq pullen pull dir out in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .name = "periphs-banks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .pins = meson_gxbb_periphs_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .groups = meson_gxbb_periphs_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .funcs = meson_gxbb_periphs_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .banks = meson_gxbb_periphs_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) .num_pins = ARRAY_SIZE(meson_gxbb_periphs_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .pmx_ops = &meson8_pmx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .name = "aobus-banks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .pins = meson_gxbb_aobus_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .groups = meson_gxbb_aobus_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .funcs = meson_gxbb_aobus_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .banks = meson_gxbb_aobus_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .num_pins = ARRAY_SIZE(meson_gxbb_aobus_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .pmx_ops = &meson8_pmx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .parse_dt = meson8_aobus_parse_dt_extra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static const struct of_device_id meson_gxbb_pinctrl_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) .compatible = "amlogic,meson-gxbb-periphs-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) .data = &meson_gxbb_periphs_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) .compatible = "amlogic,meson-gxbb-aobus-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .data = &meson_gxbb_aobus_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) MODULE_DEVICE_TABLE(of, meson_gxbb_pinctrl_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) static struct platform_driver meson_gxbb_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) .probe = meson_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .name = "meson-gxbb-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .of_match_table = meson_gxbb_pinctrl_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) module_platform_driver(meson_gxbb_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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