^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: (GPL-2.0+ or MIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Pin controller and GPIO driver for Amlogic Meson G12A SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Xingyu Chen <xingyu.chen@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Yixun Lan <yixun.lan@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <dt-bindings/gpio/meson-g12a-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-meson.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "pinctrl-meson-axg-pmx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MESON_PIN(GPIOZ_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MESON_PIN(GPIOZ_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MESON_PIN(GPIOZ_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MESON_PIN(GPIOZ_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MESON_PIN(GPIOZ_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MESON_PIN(GPIOZ_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MESON_PIN(GPIOZ_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MESON_PIN(GPIOZ_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MESON_PIN(GPIOZ_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MESON_PIN(GPIOZ_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MESON_PIN(GPIOZ_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MESON_PIN(GPIOZ_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MESON_PIN(GPIOZ_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MESON_PIN(GPIOZ_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MESON_PIN(GPIOZ_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MESON_PIN(GPIOZ_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MESON_PIN(GPIOH_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MESON_PIN(GPIOH_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MESON_PIN(GPIOH_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MESON_PIN(GPIOH_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MESON_PIN(GPIOH_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MESON_PIN(GPIOH_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MESON_PIN(GPIOH_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MESON_PIN(GPIOH_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MESON_PIN(GPIOH_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MESON_PIN(BOOT_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MESON_PIN(BOOT_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MESON_PIN(BOOT_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MESON_PIN(BOOT_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MESON_PIN(BOOT_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MESON_PIN(BOOT_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MESON_PIN(BOOT_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MESON_PIN(BOOT_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MESON_PIN(BOOT_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MESON_PIN(BOOT_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MESON_PIN(BOOT_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MESON_PIN(BOOT_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MESON_PIN(BOOT_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MESON_PIN(BOOT_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MESON_PIN(BOOT_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MESON_PIN(BOOT_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MESON_PIN(GPIOC_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MESON_PIN(GPIOC_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MESON_PIN(GPIOC_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MESON_PIN(GPIOC_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MESON_PIN(GPIOC_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MESON_PIN(GPIOC_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MESON_PIN(GPIOC_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MESON_PIN(GPIOC_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MESON_PIN(GPIOA_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MESON_PIN(GPIOA_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MESON_PIN(GPIOA_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MESON_PIN(GPIOA_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MESON_PIN(GPIOA_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MESON_PIN(GPIOA_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MESON_PIN(GPIOA_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MESON_PIN(GPIOA_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MESON_PIN(GPIOA_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MESON_PIN(GPIOA_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MESON_PIN(GPIOA_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MESON_PIN(GPIOA_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MESON_PIN(GPIOA_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MESON_PIN(GPIOA_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MESON_PIN(GPIOA_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MESON_PIN(GPIOA_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MESON_PIN(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MESON_PIN(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MESON_PIN(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MESON_PIN(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MESON_PIN(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MESON_PIN(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MESON_PIN(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MESON_PIN(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MESON_PIN(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MESON_PIN(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MESON_PIN(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MESON_PIN(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MESON_PIN(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MESON_PIN(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MESON_PIN(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MESON_PIN(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MESON_PIN(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MESON_PIN(GPIOX_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MESON_PIN(GPIOX_18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MESON_PIN(GPIOX_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MESON_PIN(GPIOAO_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MESON_PIN(GPIOAO_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MESON_PIN(GPIOAO_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MESON_PIN(GPIOAO_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MESON_PIN(GPIOAO_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MESON_PIN(GPIOAO_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MESON_PIN(GPIOAO_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MESON_PIN(GPIOAO_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MESON_PIN(GPIOAO_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MESON_PIN(GPIOAO_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MESON_PIN(GPIOAO_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MESON_PIN(GPIOAO_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MESON_PIN(GPIOE_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) MESON_PIN(GPIOE_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MESON_PIN(GPIOE_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* emmc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const unsigned int emmc_clk_pins[] = { BOOT_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const unsigned int emmc_nand_ds_pins[] = { BOOT_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* nand */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const unsigned int nand_wen_clk_pins[] = { BOOT_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const unsigned int nand_ale_pins[] = { BOOT_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static const unsigned int nand_cle_pins[] = { BOOT_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static const unsigned int nand_ce0_pins[] = { BOOT_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static const unsigned int nand_ren_wr_pins[] = { BOOT_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const unsigned int nand_rb0_pins[] = { BOOT_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const unsigned int nand_ce1_pins[] = { BOOT_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* nor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static const unsigned int nor_hold_pins[] = { BOOT_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const unsigned int nor_d_pins[] = { BOOT_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const unsigned int nor_q_pins[] = { BOOT_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const unsigned int nor_c_pins[] = { BOOT_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const unsigned int nor_wp_pins[] = { BOOT_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const unsigned int nor_cs_pins[] = { BOOT_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* sdio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const unsigned int sdio_clk_pins[] = { GPIOX_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const unsigned int sdio_cmd_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* sdcard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const unsigned int sdcard_d0_c_pins[] = { GPIOC_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static const unsigned int sdcard_d1_c_pins[] = { GPIOC_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static const unsigned int sdcard_d2_c_pins[] = { GPIOC_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static const unsigned int sdcard_d3_c_pins[] = { GPIOC_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const unsigned int sdcard_clk_c_pins[] = { GPIOC_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const unsigned int sdcard_cmd_c_pins[] = { GPIOC_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static const unsigned int sdcard_d0_z_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const unsigned int sdcard_d1_z_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const unsigned int sdcard_d2_z_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const unsigned int sdcard_d3_z_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static const unsigned int sdcard_clk_z_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const unsigned int sdcard_cmd_z_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* spi0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const unsigned int spi0_mosi_c_pins[] = { GPIOC_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const unsigned int spi0_miso_c_pins[] = { GPIOC_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const unsigned int spi0_ss0_c_pins[] = { GPIOC_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const unsigned int spi0_clk_c_pins[] = { GPIOC_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const unsigned int spi0_mosi_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const unsigned int spi0_miso_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static const unsigned int spi0_ss0_x_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static const unsigned int spi0_clk_x_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* spi1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const unsigned int spi1_mosi_pins[] = { GPIOH_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const unsigned int spi1_miso_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const unsigned int spi1_ss0_pins[] = { GPIOH_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static const unsigned int spi1_clk_pins[] = { GPIOH_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* i2c0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const unsigned int i2c0_sda_c_pins[] = { GPIOC_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const unsigned int i2c0_sck_c_pins[] = { GPIOC_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static const unsigned int i2c0_sda_z0_pins[] = { GPIOZ_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const unsigned int i2c0_sck_z1_pins[] = { GPIOZ_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static const unsigned int i2c0_sda_z7_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const unsigned int i2c0_sck_z8_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* i2c1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const unsigned int i2c1_sda_x_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const unsigned int i2c1_sck_x_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static const unsigned int i2c1_sda_h2_pins[] = { GPIOH_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const unsigned int i2c1_sck_h3_pins[] = { GPIOH_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const unsigned int i2c1_sda_h6_pins[] = { GPIOH_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const unsigned int i2c1_sck_h7_pins[] = { GPIOH_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* i2c2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const unsigned int i2c2_sda_x_pins[] = { GPIOX_17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static const unsigned int i2c2_sck_x_pins[] = { GPIOX_18 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const unsigned int i2c2_sda_z_pins[] = { GPIOZ_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const unsigned int i2c2_sck_z_pins[] = { GPIOZ_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* i2c3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static const unsigned int i2c3_sda_h_pins[] = { GPIOH_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static const unsigned int i2c3_sck_h_pins[] = { GPIOH_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static const unsigned int i2c3_sda_a_pins[] = { GPIOA_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const unsigned int i2c3_sck_a_pins[] = { GPIOA_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* uart_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static const unsigned int uart_a_tx_pins[] = { GPIOX_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const unsigned int uart_a_rx_pins[] = { GPIOX_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static const unsigned int uart_a_cts_pins[] = { GPIOX_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const unsigned int uart_a_rts_pins[] = { GPIOX_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* uart_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const unsigned int uart_b_tx_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static const unsigned int uart_b_rx_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* uart_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static const unsigned int uart_c_rts_pins[] = { GPIOH_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const unsigned int uart_c_cts_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static const unsigned int uart_c_rx_pins[] = { GPIOH_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const unsigned int uart_c_tx_pins[] = { GPIOH_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* uart_ao_a_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const unsigned int uart_ao_a_rx_c_pins[] = { GPIOC_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const unsigned int uart_ao_a_tx_c_pins[] = { GPIOC_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* iso7816 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static const unsigned int iso7816_clk_c_pins[] = { GPIOC_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static const unsigned int iso7816_data_c_pins[] = { GPIOC_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const unsigned int iso7816_clk_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const unsigned int iso7816_data_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const unsigned int iso7816_clk_h_pins[] = { GPIOH_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const unsigned int iso7816_data_h_pins[] = { GPIOH_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static const unsigned int iso7816_clk_z_pins[] = { GPIOZ_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const unsigned int iso7816_data_z_pins[] = { GPIOZ_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* eth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static const unsigned int eth_mdio_pins[] = { GPIOZ_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static const unsigned int eth_mdc_pins[] = { GPIOZ_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const unsigned int eth_rgmii_rx_clk_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static const unsigned int eth_rxd2_rgmii_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const unsigned int eth_rxd3_rgmii_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static const unsigned int eth_txen_pins[] = { GPIOZ_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static const unsigned int eth_txd0_pins[] = { GPIOZ_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static const unsigned int eth_txd1_pins[] = { GPIOZ_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static const unsigned int eth_txd2_rgmii_pins[] = { GPIOZ_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static const unsigned int eth_txd3_rgmii_pins[] = { GPIOZ_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static const unsigned int eth_link_led_pins[] = { GPIOZ_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const unsigned int eth_act_led_pins[] = { GPIOZ_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* pwm_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const unsigned int pwm_a_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* pwm_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static const unsigned int pwm_b_x7_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static const unsigned int pwm_b_x19_pins[] = { GPIOX_19 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* pwm_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static const unsigned int pwm_c_c_pins[] = { GPIOC_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static const unsigned int pwm_c_x5_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static const unsigned int pwm_c_x8_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* pwm_d */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static const unsigned int pwm_d_x3_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static const unsigned int pwm_d_x6_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* pwm_e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static const unsigned int pwm_e_pins[] = { GPIOX_16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* pwm_f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const unsigned int pwm_f_x_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static const unsigned int pwm_f_h_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* cec_ao */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static const unsigned int cec_ao_a_h_pins[] = { GPIOH_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static const unsigned int cec_ao_b_h_pins[] = { GPIOH_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* jtag_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static const unsigned int jtag_b_tdo_pins[] = { GPIOC_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static const unsigned int jtag_b_tdi_pins[] = { GPIOC_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static const unsigned int jtag_b_clk_pins[] = { GPIOC_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const unsigned int jtag_b_tms_pins[] = { GPIOC_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* bt565_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const unsigned int bt565_a_vs_pins[] = { GPIOZ_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const unsigned int bt565_a_hs_pins[] = { GPIOZ_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static const unsigned int bt565_a_clk_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static const unsigned int bt565_a_din0_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static const unsigned int bt565_a_din1_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const unsigned int bt565_a_din2_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static const unsigned int bt565_a_din3_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const unsigned int bt565_a_din4_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const unsigned int bt565_a_din5_pins[] = { GPIOZ_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static const unsigned int bt565_a_din6_pins[] = { GPIOZ_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const unsigned int bt565_a_din7_pins[] = { GPIOZ_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* tsin_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static const unsigned int tsin_a_valid_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static const unsigned int tsin_a_sop_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static const unsigned int tsin_a_din0_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static const unsigned int tsin_a_clk_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* tsin_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static const unsigned int tsin_b_valid_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static const unsigned int tsin_b_sop_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static const unsigned int tsin_b_din0_x_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static const unsigned int tsin_b_clk_x_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static const unsigned int tsin_b_valid_z_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static const unsigned int tsin_b_sop_z_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static const unsigned int tsin_b_din0_z_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static const unsigned int tsin_b_clk_z_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static const unsigned int tsin_b_fail_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static const unsigned int tsin_b_din1_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const unsigned int tsin_b_din2_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static const unsigned int tsin_b_din3_pins[] = { GPIOZ_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static const unsigned int tsin_b_din4_pins[] = { GPIOZ_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const unsigned int tsin_b_din5_pins[] = { GPIOZ_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static const unsigned int tsin_b_din6_pins[] = { GPIOZ_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static const unsigned int tsin_b_din7_pins[] = { GPIOZ_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* hdmitx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const unsigned int hdmitx_sda_pins[] = { GPIOH_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static const unsigned int hdmitx_sck_pins[] = { GPIOH_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static const unsigned int hdmitx_hpd_in_pins[] = { GPIOH_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* pdm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static const unsigned int pdm_din0_c_pins[] = { GPIOC_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static const unsigned int pdm_din1_c_pins[] = { GPIOC_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static const unsigned int pdm_din2_c_pins[] = { GPIOC_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static const unsigned int pdm_din3_c_pins[] = { GPIOC_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static const unsigned int pdm_dclk_c_pins[] = { GPIOC_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static const unsigned int pdm_din0_x_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const unsigned int pdm_din1_x_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static const unsigned int pdm_din2_x_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const unsigned int pdm_din3_x_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static const unsigned int pdm_dclk_x_pins[] = { GPIOX_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) static const unsigned int pdm_din0_z_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const unsigned int pdm_din1_z_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static const unsigned int pdm_din2_z_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static const unsigned int pdm_din3_z_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static const unsigned int pdm_dclk_z_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static const unsigned int pdm_din0_a_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const unsigned int pdm_din1_a_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static const unsigned int pdm_din2_a_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static const unsigned int pdm_din3_a_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static const unsigned int pdm_dclk_a_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* spdif_in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static const unsigned int spdif_in_h_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static const unsigned int spdif_in_a10_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const unsigned int spdif_in_a12_pins[] = { GPIOA_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* spdif_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static const unsigned int spdif_out_h_pins[] = { GPIOH_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static const unsigned int spdif_out_a11_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static const unsigned int spdif_out_a13_pins[] = { GPIOA_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* mclk0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static const unsigned int mclk0_a_pins[] = { GPIOA_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* mclk1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static const unsigned int mclk1_x_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static const unsigned int mclk1_z_pins[] = { GPIOZ_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static const unsigned int mclk1_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* tdm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static const unsigned int tdm_a_slv_sclk_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static const unsigned int tdm_a_slv_fs_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static const unsigned int tdm_a_sclk_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const unsigned int tdm_a_fs_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static const unsigned int tdm_a_din0_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static const unsigned int tdm_a_din1_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static const unsigned int tdm_a_dout0_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const unsigned int tdm_a_dout1_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const unsigned int tdm_b_slv_sclk_pins[] = { GPIOA_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static const unsigned int tdm_b_slv_fs_pins[] = { GPIOA_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static const unsigned int tdm_b_sclk_pins[] = { GPIOA_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static const unsigned int tdm_b_fs_pins[] = { GPIOA_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static const unsigned int tdm_b_din0_pins[] = { GPIOA_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static const unsigned int tdm_b_din1_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static const unsigned int tdm_b_din2_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static const unsigned int tdm_b_din3_a_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static const unsigned int tdm_b_din3_h_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static const unsigned int tdm_b_dout0_pins[] = { GPIOA_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static const unsigned int tdm_b_dout1_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static const unsigned int tdm_b_dout2_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static const unsigned int tdm_b_dout3_a_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) static const unsigned int tdm_b_dout3_h_pins[] = { GPIOH_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static const unsigned int tdm_c_slv_sclk_a_pins[] = { GPIOA_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static const unsigned int tdm_c_slv_fs_a_pins[] = { GPIOA_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static const unsigned int tdm_c_slv_sclk_z_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static const unsigned int tdm_c_slv_fs_z_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static const unsigned int tdm_c_sclk_a_pins[] = { GPIOA_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static const unsigned int tdm_c_fs_a_pins[] = { GPIOA_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static const unsigned int tdm_c_sclk_z_pins[] = { GPIOZ_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const unsigned int tdm_c_fs_z_pins[] = { GPIOZ_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static const unsigned int tdm_c_din0_a_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static const unsigned int tdm_c_din1_a_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static const unsigned int tdm_c_din2_a_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static const unsigned int tdm_c_din3_a_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const unsigned int tdm_c_din0_z_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static const unsigned int tdm_c_din1_z_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static const unsigned int tdm_c_din2_z_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static const unsigned int tdm_c_din3_z_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const unsigned int tdm_c_dout0_a_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static const unsigned int tdm_c_dout1_a_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static const unsigned int tdm_c_dout2_a_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static const unsigned int tdm_c_dout3_a_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static const unsigned int tdm_c_dout0_z_pins[] = { GPIOZ_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) static const unsigned int tdm_c_dout1_z_pins[] = { GPIOZ_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static const unsigned int tdm_c_dout2_z_pins[] = { GPIOZ_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static const unsigned int tdm_c_dout3_z_pins[] = { GPIOZ_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static struct meson_pmx_group meson_g12a_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) GPIO_GROUP(GPIOZ_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) GPIO_GROUP(GPIOZ_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) GPIO_GROUP(GPIOZ_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) GPIO_GROUP(GPIOZ_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) GPIO_GROUP(GPIOZ_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) GPIO_GROUP(GPIOZ_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) GPIO_GROUP(GPIOZ_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) GPIO_GROUP(GPIOZ_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) GPIO_GROUP(GPIOZ_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) GPIO_GROUP(GPIOZ_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) GPIO_GROUP(GPIOZ_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) GPIO_GROUP(GPIOZ_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) GPIO_GROUP(GPIOZ_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) GPIO_GROUP(GPIOZ_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) GPIO_GROUP(GPIOZ_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) GPIO_GROUP(GPIOZ_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) GPIO_GROUP(GPIOH_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) GPIO_GROUP(GPIOH_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) GPIO_GROUP(GPIOH_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) GPIO_GROUP(GPIOH_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) GPIO_GROUP(GPIOH_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) GPIO_GROUP(GPIOH_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) GPIO_GROUP(GPIOH_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) GPIO_GROUP(GPIOH_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) GPIO_GROUP(GPIOH_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) GPIO_GROUP(BOOT_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) GPIO_GROUP(BOOT_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) GPIO_GROUP(BOOT_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) GPIO_GROUP(BOOT_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) GPIO_GROUP(BOOT_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) GPIO_GROUP(BOOT_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) GPIO_GROUP(BOOT_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) GPIO_GROUP(BOOT_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) GPIO_GROUP(BOOT_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) GPIO_GROUP(BOOT_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) GPIO_GROUP(BOOT_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) GPIO_GROUP(BOOT_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) GPIO_GROUP(BOOT_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) GPIO_GROUP(BOOT_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) GPIO_GROUP(BOOT_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) GPIO_GROUP(BOOT_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) GPIO_GROUP(GPIOC_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) GPIO_GROUP(GPIOC_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) GPIO_GROUP(GPIOC_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) GPIO_GROUP(GPIOC_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) GPIO_GROUP(GPIOC_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) GPIO_GROUP(GPIOC_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) GPIO_GROUP(GPIOC_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) GPIO_GROUP(GPIOC_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) GPIO_GROUP(GPIOA_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) GPIO_GROUP(GPIOA_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) GPIO_GROUP(GPIOA_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) GPIO_GROUP(GPIOA_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) GPIO_GROUP(GPIOA_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) GPIO_GROUP(GPIOA_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) GPIO_GROUP(GPIOA_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) GPIO_GROUP(GPIOA_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) GPIO_GROUP(GPIOA_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) GPIO_GROUP(GPIOA_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) GPIO_GROUP(GPIOA_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) GPIO_GROUP(GPIOA_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) GPIO_GROUP(GPIOA_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) GPIO_GROUP(GPIOA_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) GPIO_GROUP(GPIOA_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) GPIO_GROUP(GPIOA_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) GPIO_GROUP(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) GPIO_GROUP(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) GPIO_GROUP(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) GPIO_GROUP(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) GPIO_GROUP(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) GPIO_GROUP(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) GPIO_GROUP(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) GPIO_GROUP(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) GPIO_GROUP(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) GPIO_GROUP(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) GPIO_GROUP(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) GPIO_GROUP(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) GPIO_GROUP(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) GPIO_GROUP(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) GPIO_GROUP(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) GPIO_GROUP(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) GPIO_GROUP(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) GPIO_GROUP(GPIOX_17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) GPIO_GROUP(GPIOX_18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) GPIO_GROUP(GPIOX_19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /* bank BOOT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) GROUP(emmc_nand_d0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) GROUP(emmc_nand_d1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) GROUP(emmc_nand_d2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) GROUP(emmc_nand_d3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) GROUP(emmc_nand_d4, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) GROUP(emmc_nand_d5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) GROUP(emmc_nand_d6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) GROUP(emmc_nand_d7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) GROUP(emmc_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) GROUP(emmc_cmd, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) GROUP(emmc_nand_ds, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) GROUP(nand_ce0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) GROUP(nand_ale, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) GROUP(nand_cle, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) GROUP(nand_wen_clk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) GROUP(nand_ren_wr, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) GROUP(nand_rb0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) GROUP(nand_ce1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) GROUP(nor_hold, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) GROUP(nor_d, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) GROUP(nor_q, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) GROUP(nor_c, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) GROUP(nor_wp, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) GROUP(nor_cs, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /* bank GPIOZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) GROUP(sdcard_d0_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) GROUP(sdcard_d1_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) GROUP(sdcard_d2_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) GROUP(sdcard_d3_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) GROUP(sdcard_clk_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) GROUP(sdcard_cmd_z, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) GROUP(i2c0_sda_z0, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) GROUP(i2c0_sck_z1, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) GROUP(i2c0_sda_z7, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) GROUP(i2c0_sck_z8, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) GROUP(i2c2_sda_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) GROUP(i2c2_sck_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) GROUP(iso7816_clk_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) GROUP(iso7816_data_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) GROUP(eth_mdio, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) GROUP(eth_mdc, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) GROUP(eth_rgmii_rx_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) GROUP(eth_rx_dv, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) GROUP(eth_rxd0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) GROUP(eth_rxd1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) GROUP(eth_rxd2_rgmii, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) GROUP(eth_rxd3_rgmii, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) GROUP(eth_rgmii_tx_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) GROUP(eth_txen, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) GROUP(eth_txd0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) GROUP(eth_txd1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) GROUP(eth_txd2_rgmii, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) GROUP(eth_txd3_rgmii, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) GROUP(eth_link_led, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) GROUP(eth_act_led, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) GROUP(bt565_a_vs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) GROUP(bt565_a_hs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) GROUP(bt565_a_clk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) GROUP(bt565_a_din0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) GROUP(bt565_a_din1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) GROUP(bt565_a_din2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) GROUP(bt565_a_din3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) GROUP(bt565_a_din4, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) GROUP(bt565_a_din5, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) GROUP(bt565_a_din6, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) GROUP(bt565_a_din7, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) GROUP(tsin_b_valid_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) GROUP(tsin_b_sop_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) GROUP(tsin_b_din0_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) GROUP(tsin_b_clk_z, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) GROUP(tsin_b_fail, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) GROUP(tsin_b_din1, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) GROUP(tsin_b_din2, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) GROUP(tsin_b_din3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) GROUP(tsin_b_din4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) GROUP(tsin_b_din5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) GROUP(tsin_b_din6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) GROUP(tsin_b_din7, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) GROUP(pdm_din0_z, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) GROUP(pdm_din1_z, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) GROUP(pdm_din2_z, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) GROUP(pdm_din3_z, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) GROUP(pdm_dclk_z, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) GROUP(tdm_c_slv_sclk_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) GROUP(tdm_c_slv_fs_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) GROUP(tdm_c_din0_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) GROUP(tdm_c_din1_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) GROUP(tdm_c_din2_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) GROUP(tdm_c_din3_z, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) GROUP(tdm_c_sclk_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) GROUP(tdm_c_fs_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) GROUP(tdm_c_dout0_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) GROUP(tdm_c_dout1_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) GROUP(tdm_c_dout2_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) GROUP(tdm_c_dout3_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) GROUP(mclk1_z, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) /* bank GPIOX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) GROUP(sdio_d0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) GROUP(sdio_d1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) GROUP(sdio_d2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) GROUP(sdio_d3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) GROUP(sdio_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) GROUP(sdio_cmd, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) GROUP(spi0_mosi_x, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) GROUP(spi0_miso_x, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) GROUP(spi0_ss0_x, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) GROUP(spi0_clk_x, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) GROUP(i2c1_sda_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) GROUP(i2c1_sck_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) GROUP(i2c2_sda_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) GROUP(i2c2_sck_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) GROUP(uart_a_tx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) GROUP(uart_a_rx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) GROUP(uart_a_cts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) GROUP(uart_a_rts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) GROUP(uart_b_tx, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) GROUP(uart_b_rx, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) GROUP(iso7816_clk_x, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) GROUP(iso7816_data_x, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) GROUP(pwm_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) GROUP(pwm_b_x7, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) GROUP(pwm_b_x19, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) GROUP(pwm_c_x5, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) GROUP(pwm_c_x8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) GROUP(pwm_d_x3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) GROUP(pwm_d_x6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) GROUP(pwm_e, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) GROUP(pwm_f_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) GROUP(tsin_a_valid, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) GROUP(tsin_a_sop, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) GROUP(tsin_a_din0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) GROUP(tsin_a_clk, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) GROUP(tsin_b_valid_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) GROUP(tsin_b_sop_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) GROUP(tsin_b_din0_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) GROUP(tsin_b_clk_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) GROUP(pdm_din0_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) GROUP(pdm_din1_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) GROUP(pdm_din2_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) GROUP(pdm_din3_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) GROUP(pdm_dclk_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) GROUP(tdm_a_slv_sclk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) GROUP(tdm_a_slv_fs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) GROUP(tdm_a_din0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) GROUP(tdm_a_din1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) GROUP(tdm_a_sclk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) GROUP(tdm_a_fs, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) GROUP(tdm_a_dout0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) GROUP(tdm_a_dout1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) GROUP(mclk1_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) /* bank GPIOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) GROUP(sdcard_d0_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) GROUP(sdcard_d1_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) GROUP(sdcard_d2_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) GROUP(sdcard_d3_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) GROUP(sdcard_clk_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) GROUP(sdcard_cmd_c, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) GROUP(spi0_mosi_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) GROUP(spi0_miso_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) GROUP(spi0_ss0_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) GROUP(spi0_clk_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) GROUP(i2c0_sda_c, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) GROUP(i2c0_sck_c, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) GROUP(uart_ao_a_rx_c, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) GROUP(uart_ao_a_tx_c, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) GROUP(iso7816_clk_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) GROUP(iso7816_data_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) GROUP(pwm_c_c, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) GROUP(jtag_b_tdo, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) GROUP(jtag_b_tdi, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) GROUP(jtag_b_clk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) GROUP(jtag_b_tms, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) GROUP(pdm_din0_c, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) GROUP(pdm_din1_c, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) GROUP(pdm_din2_c, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) GROUP(pdm_din3_c, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) GROUP(pdm_dclk_c, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) /* bank GPIOH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) GROUP(spi1_mosi, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) GROUP(spi1_miso, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) GROUP(spi1_ss0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) GROUP(spi1_clk, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) GROUP(i2c1_sda_h2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) GROUP(i2c1_sck_h3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) GROUP(i2c1_sda_h6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) GROUP(i2c1_sck_h7, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) GROUP(i2c3_sda_h, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) GROUP(i2c3_sck_h, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) GROUP(uart_c_tx, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) GROUP(uart_c_rx, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) GROUP(uart_c_cts, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) GROUP(uart_c_rts, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) GROUP(iso7816_clk_h, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) GROUP(iso7816_data_h, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) GROUP(pwm_f_h, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) GROUP(cec_ao_a_h, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) GROUP(cec_ao_b_h, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) GROUP(hdmitx_sda, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) GROUP(hdmitx_sck, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) GROUP(hdmitx_hpd_in, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) GROUP(spdif_out_h, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) GROUP(spdif_in_h, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) GROUP(tdm_b_din3_h, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) GROUP(tdm_b_dout3_h, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /* bank GPIOA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) GROUP(i2c3_sda_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) GROUP(i2c3_sck_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) GROUP(pdm_din0_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) GROUP(pdm_din1_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) GROUP(pdm_din2_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) GROUP(pdm_din3_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) GROUP(pdm_dclk_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) GROUP(spdif_in_a10, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) GROUP(spdif_in_a12, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) GROUP(spdif_out_a11, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) GROUP(spdif_out_a13, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) GROUP(tdm_b_slv_sclk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) GROUP(tdm_b_slv_fs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) GROUP(tdm_b_din0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) GROUP(tdm_b_din1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) GROUP(tdm_b_din2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) GROUP(tdm_b_din3_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) GROUP(tdm_b_sclk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) GROUP(tdm_b_fs, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) GROUP(tdm_b_dout0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) GROUP(tdm_b_dout1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) GROUP(tdm_b_dout2, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) GROUP(tdm_b_dout3_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) GROUP(tdm_c_slv_sclk_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) GROUP(tdm_c_slv_fs_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) GROUP(tdm_c_din0_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) GROUP(tdm_c_din1_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) GROUP(tdm_c_din2_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) GROUP(tdm_c_din3_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) GROUP(tdm_c_sclk_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) GROUP(tdm_c_fs_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) GROUP(tdm_c_dout0_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) GROUP(tdm_c_dout1_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) GROUP(tdm_c_dout2_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) GROUP(tdm_c_dout3_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) GROUP(mclk0_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) GROUP(mclk1_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) /* uart_ao_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static const unsigned int uart_ao_a_tx_pins[] = { GPIOAO_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const unsigned int uart_ao_a_rx_pins[] = { GPIOAO_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) static const unsigned int uart_ao_a_cts_pins[] = { GPIOE_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static const unsigned int uart_ao_a_rts_pins[] = { GPIOE_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) /* uart_ao_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static const unsigned int uart_ao_b_tx_2_pins[] = { GPIOAO_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static const unsigned int uart_ao_b_rx_3_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) static const unsigned int uart_ao_b_tx_8_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static const unsigned int uart_ao_b_rx_9_pins[] = { GPIOAO_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static const unsigned int uart_ao_b_cts_pins[] = { GPIOE_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) static const unsigned int uart_ao_b_rts_pins[] = { GPIOE_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) /* i2c_ao */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) static const unsigned int i2c_ao_sck_pins[] = { GPIOAO_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static const unsigned int i2c_ao_sda_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static const unsigned int i2c_ao_sck_e_pins[] = { GPIOE_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) static const unsigned int i2c_ao_sda_e_pins[] = { GPIOE_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) /* i2c_ao_slave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static const unsigned int i2c_ao_slave_sck_pins[] = { GPIOAO_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static const unsigned int i2c_ao_slave_sda_pins[] = { GPIOAO_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) /* ir_in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static const unsigned int remote_ao_input_pins[] = { GPIOAO_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) /* ir_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static const unsigned int remote_ao_out_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /* pwm_a_e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) static const unsigned int pwm_a_e_pins[] = { GPIOE_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) /* pwm_ao_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static const unsigned int pwm_ao_a_pins[] = { GPIOAO_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) static const unsigned int pwm_ao_a_hiz_pins[] = { GPIOAO_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /* pwm_ao_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static const unsigned int pwm_ao_b_pins[] = { GPIOE_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /* pwm_ao_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) static const unsigned int pwm_ao_c_4_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) static const unsigned int pwm_ao_c_hiz_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const unsigned int pwm_ao_c_6_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) /* pwm_ao_d */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) static const unsigned int pwm_ao_d_5_pins[] = { GPIOAO_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const unsigned int pwm_ao_d_10_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) static const unsigned int pwm_ao_d_e_pins[] = { GPIOE_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* jtag_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) static const unsigned int jtag_a_tdi_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static const unsigned int jtag_a_tdo_pins[] = { GPIOAO_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static const unsigned int jtag_a_clk_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) static const unsigned int jtag_a_tms_pins[] = { GPIOAO_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* cec_ao */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static const unsigned int cec_ao_a_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static const unsigned int cec_ao_b_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) /* tsin_ao_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static const unsigned int tsin_ao_asop_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static const unsigned int tsin_ao_adin0_pins[] = { GPIOAO_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static const unsigned int tsin_ao_aclk_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static const unsigned int tsin_ao_a_valid_pins[] = { GPIOAO_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /* spdif_ao_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) static const unsigned int spdif_ao_out_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) /* tdm_ao_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static const unsigned int tdm_ao_b_slv_fs_pins[] = { GPIOAO_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) static const unsigned int tdm_ao_b_slv_sclk_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) static const unsigned int tdm_ao_b_fs_pins[] = { GPIOAO_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) static const unsigned int tdm_ao_b_sclk_pins[] = { GPIOAO_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) static const unsigned int tdm_ao_b_din0_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static const unsigned int tdm_ao_b_din1_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static const unsigned int tdm_ao_b_din2_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static const unsigned int tdm_ao_b_dout0_pins[] = { GPIOAO_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) static const unsigned int tdm_ao_b_dout1_pins[] = { GPIOAO_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static const unsigned int tdm_ao_b_dout2_pins[] = { GPIOAO_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) /* mclk0_ao */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static const unsigned int mclk0_ao_pins[] = { GPIOAO_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) static struct meson_pmx_group meson_g12a_aobus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) GPIO_GROUP(GPIOAO_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) GPIO_GROUP(GPIOAO_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) GPIO_GROUP(GPIOAO_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) GPIO_GROUP(GPIOAO_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) GPIO_GROUP(GPIOAO_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) GPIO_GROUP(GPIOAO_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) GPIO_GROUP(GPIOAO_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) GPIO_GROUP(GPIOAO_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) GPIO_GROUP(GPIOAO_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) GPIO_GROUP(GPIOAO_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) GPIO_GROUP(GPIOAO_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) GPIO_GROUP(GPIOAO_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) GPIO_GROUP(GPIOE_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) GPIO_GROUP(GPIOE_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) GPIO_GROUP(GPIOE_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) /* bank AO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) GROUP(uart_ao_a_tx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) GROUP(uart_ao_a_rx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) GROUP(uart_ao_a_cts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) GROUP(uart_ao_a_rts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) GROUP(uart_ao_b_tx_2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) GROUP(uart_ao_b_rx_3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) GROUP(uart_ao_b_tx_8, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) GROUP(uart_ao_b_rx_9, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) GROUP(uart_ao_b_cts, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) GROUP(uart_ao_b_rts, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) GROUP(i2c_ao_sck, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) GROUP(i2c_ao_sda, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) GROUP(i2c_ao_sck_e, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) GROUP(i2c_ao_sda_e, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) GROUP(i2c_ao_slave_sck, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) GROUP(i2c_ao_slave_sda, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) GROUP(remote_ao_input, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) GROUP(remote_ao_out, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) GROUP(pwm_a_e, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) GROUP(pwm_ao_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) GROUP(pwm_ao_a_hiz, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) GROUP(pwm_ao_b, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) GROUP(pwm_ao_c_4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) GROUP(pwm_ao_c_hiz, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) GROUP(pwm_ao_c_6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) GROUP(pwm_ao_d_5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) GROUP(pwm_ao_d_10, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) GROUP(pwm_ao_d_e, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) GROUP(jtag_a_tdi, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) GROUP(jtag_a_tdo, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) GROUP(jtag_a_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) GROUP(jtag_a_tms, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) GROUP(cec_ao_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) GROUP(cec_ao_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) GROUP(tsin_ao_asop, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) GROUP(tsin_ao_adin0, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) GROUP(tsin_ao_aclk, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) GROUP(tsin_ao_a_valid, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) GROUP(spdif_ao_out, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) GROUP(tdm_ao_b_dout0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) GROUP(tdm_ao_b_dout1, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) GROUP(tdm_ao_b_dout2, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) GROUP(tdm_ao_b_fs, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) GROUP(tdm_ao_b_sclk, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) GROUP(tdm_ao_b_din0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) GROUP(tdm_ao_b_din1, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) GROUP(tdm_ao_b_din2, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) GROUP(tdm_ao_b_slv_fs, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) GROUP(tdm_ao_b_slv_sclk, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) GROUP(mclk0_ao, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static const char * const gpio_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) "GPIOZ_15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) "BOOT_15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) "GPIOC_0", "GPIOC_1", "GPIOC_2", "GPIOC_3", "GPIOC_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) "GPIOC_5", "GPIOC_6", "GPIOC_7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) "GPIOA_15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) static const char * const emmc_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) "emmc_nand_d6", "emmc_nand_d7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) "emmc_clk", "emmc_cmd", "emmc_nand_ds",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static const char * const nand_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) "emmc_nand_d6", "emmc_nand_d7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) "nand_ce0", "nand_ale", "nand_cle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) "nand_wen_clk", "nand_ren_wr", "nand_rb0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) "emmc_nand_ds", "nand_ce1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) static const char * const nor_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) "nor_d", "nor_q", "nor_c", "nor_cs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) "nor_hold", "nor_wp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) static const char * const sdio_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) "sdio_cmd", "sdio_clk", "sdio_dummy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static const char * const sdcard_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) "sdcard_d0_c", "sdcard_d1_c", "sdcard_d2_c", "sdcard_d3_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) "sdcard_clk_c", "sdcard_cmd_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) "sdcard_d0_z", "sdcard_d1_z", "sdcard_d2_z", "sdcard_d3_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) "sdcard_clk_z", "sdcard_cmd_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) static const char * const spi0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) "spi0_mosi_c", "spi0_miso_c", "spi0_ss0_c", "spi0_clk_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) "spi0_mosi_x", "spi0_miso_x", "spi0_ss0_x", "spi0_clk_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) static const char * const spi1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) "spi1_mosi", "spi1_miso", "spi1_ss0", "spi1_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static const char * const i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) "i2c0_sda_c", "i2c0_sck_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) "i2c0_sda_z0", "i2c0_sck_z1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) "i2c0_sda_z7", "i2c0_sck_z8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static const char * const i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) "i2c1_sda_x", "i2c1_sck_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) "i2c1_sda_h2", "i2c1_sck_h3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) "i2c1_sda_h6", "i2c1_sck_h7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static const char * const i2c2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) "i2c2_sda_x", "i2c2_sck_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) "i2c2_sda_z", "i2c2_sck_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) static const char * const i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) "i2c3_sda_h", "i2c3_sck_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) "i2c3_sda_a", "i2c3_sck_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) static const char * const uart_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static const char * const uart_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) "uart_b_tx", "uart_b_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static const char * const uart_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) "uart_c_tx", "uart_c_rx", "uart_c_cts", "uart_c_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) static const char * const uart_ao_a_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) "uart_ao_a_rx_c", "uart_ao_a_tx_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static const char * const iso7816_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) "iso7816_clk_c", "iso7816_data_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) "iso7816_clk_x", "iso7816_data_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) "iso7816_clk_h", "iso7816_data_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) "iso7816_clk_z", "iso7816_data_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static const char * const eth_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) "eth_txd2_rgmii", "eth_txd3_rgmii", "eth_rgmii_rx_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) "eth_txd0", "eth_txd1", "eth_txen", "eth_mdc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) "eth_rxd0", "eth_rxd1", "eth_rx_dv", "eth_mdio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) "eth_link_led", "eth_act_led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) static const char * const pwm_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) "pwm_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static const char * const pwm_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) "pwm_b_x7", "pwm_b_x19",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) static const char * const pwm_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) "pwm_c_c", "pwm_c_x5", "pwm_c_x8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static const char * const pwm_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) "pwm_d_x3", "pwm_d_x6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) static const char * const pwm_e_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) "pwm_e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static const char * const pwm_f_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) "pwm_f_x", "pwm_f_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static const char * const cec_ao_a_h_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) "cec_ao_a_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static const char * const cec_ao_b_h_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) "cec_ao_b_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) static const char * const jtag_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) "jtag_b_tdi", "jtag_b_tdo", "jtag_b_clk", "jtag_b_tms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) static const char * const bt565_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) "bt565_a_vs", "bt565_a_hs", "bt565_a_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) "bt565_a_din0", "bt565_a_din1", "bt565_a_din2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) "bt565_a_din3", "bt565_a_din4", "bt565_a_din5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) "bt565_a_din6", "bt565_a_din7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) static const char * const tsin_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) "tsin_a_valid", "tsin_a_sop", "tsin_a_din0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) "tsin_a_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) static const char * const tsin_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) "tsin_b_valid_x", "tsin_b_sop_x", "tsin_b_din0_x", "tsin_b_clk_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) "tsin_b_valid_z", "tsin_b_sop_z", "tsin_b_din0_z", "tsin_b_clk_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) "tsin_b_fail", "tsin_b_din1", "tsin_b_din2", "tsin_b_din3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) "tsin_b_din4", "tsin_b_din5", "tsin_b_din6", "tsin_b_din7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) static const char * const hdmitx_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) "hdmitx_sda", "hdmitx_sck", "hdmitx_hpd_in",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) static const char * const pdm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) "pdm_din0_c", "pdm_din1_c", "pdm_din2_c", "pdm_din3_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) "pdm_dclk_c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) "pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_din3_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) "pdm_dclk_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) "pdm_din0_z", "pdm_din1_z", "pdm_din2_z", "pdm_din3_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) "pdm_dclk_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) "pdm_din0_a", "pdm_din1_a", "pdm_din2_a", "pdm_din3_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) "pdm_dclk_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) static const char * const spdif_in_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) "spdif_in_h", "spdif_in_a10", "spdif_in_a12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) static const char * const spdif_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) "spdif_out_h", "spdif_out_a11", "spdif_out_a13",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) static const char * const mclk0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) "mclk0_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) static const char * const mclk1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) "mclk1_x", "mclk1_z", "mclk1_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) static const char * const tdm_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) "tdm_a_slv_sclk", "tdm_a_slv_fs", "tdm_a_sclk", "tdm_a_fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) "tdm_a_din0", "tdm_a_din1", "tdm_a_dout0", "tdm_a_dout1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) static const char * const tdm_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) "tdm_b_slv_sclk", "tdm_b_slv_fs", "tdm_b_sclk", "tdm_b_fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) "tdm_b_din0", "tdm_b_din1", "tdm_b_din2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) "tdm_b_din3_a", "tdm_b_din3_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) "tdm_b_dout0", "tdm_b_dout1", "tdm_b_dout2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) "tdm_b_dout3_a", "tdm_b_dout3_h",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) static const char * const tdm_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) "tdm_c_slv_sclk_a", "tdm_c_slv_fs_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) "tdm_c_slv_sclk_z", "tdm_c_slv_fs_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) "tdm_c_sclk_a", "tdm_c_fs_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) "tdm_c_sclk_z", "tdm_c_fs_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) "tdm_c_din0_a", "tdm_c_din1_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) "tdm_c_din2_a", "tdm_c_din3_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) "tdm_c_din0_z", "tdm_c_din1_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) "tdm_c_din2_z", "tdm_c_din3_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) "tdm_c_dout0_a", "tdm_c_dout1_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) "tdm_c_dout2_a", "tdm_c_dout3_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) "tdm_c_dout0_z", "tdm_c_dout1_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) "tdm_c_dout2_z", "tdm_c_dout3_z",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) static const char * const gpio_aobus_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) "GPIOAO_10", "GPIOAO_11", "GPIOE_0", "GPIOE_1", "GPIOE_2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) static const char * const uart_ao_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) "uart_ao_a_tx", "uart_ao_a_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) "uart_ao_a_cts", "uart_ao_a_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) static const char * const uart_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) "uart_ao_b_tx_2", "uart_ao_b_rx_3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) "uart_ao_b_tx_8", "uart_ao_b_rx_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) "uart_ao_b_cts", "uart_ao_b_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static const char * const i2c_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) "i2c_ao_sck", "i2c_ao_sda",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) "i2c_ao_sck_e", "i2c_ao_sda_e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) static const char * const i2c_ao_slave_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) "i2c_ao_slave_sck", "i2c_ao_slave_sda",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) static const char * const remote_ao_input_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) "remote_ao_input",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) static const char * const remote_ao_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) "remote_ao_out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) static const char * const pwm_a_e_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) "pwm_a_e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) static const char * const pwm_ao_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) "pwm_ao_a", "pwm_ao_a_hiz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) static const char * const pwm_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) "pwm_ao_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) static const char * const pwm_ao_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) "pwm_ao_c_4", "pwm_ao_c_hiz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) "pwm_ao_c_6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) static const char * const pwm_ao_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) "pwm_ao_d_5", "pwm_ao_d_10", "pwm_ao_d_e",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) static const char * const jtag_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) "jtag_a_tdi", "jtag_a_tdo", "jtag_a_clk", "jtag_a_tms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) static const char * const cec_ao_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) "cec_ao_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) static const char * const cec_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) "cec_ao_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) static const char * const tsin_ao_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) "tsin_ao_asop", "tsin_ao_adin0", "tsin_ao_aclk", "tsin_ao_a_valid",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) static const char * const spdif_ao_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) "spdif_ao_out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) static const char * const tdm_ao_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) "tdm_ao_b_dout0", "tdm_ao_b_dout1", "tdm_ao_b_dout2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) "tdm_ao_b_fs", "tdm_ao_b_sclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) "tdm_ao_b_din0", "tdm_ao_b_din1", "tdm_ao_b_din2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) "tdm_ao_b_slv_fs", "tdm_ao_b_slv_sclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) static const char * const mclk0_ao_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) "mclk0_ao",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) static struct meson_pmx_func meson_g12a_periphs_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) FUNCTION(gpio_periphs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) FUNCTION(emmc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) FUNCTION(nor),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) FUNCTION(spi0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) FUNCTION(spi1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) FUNCTION(sdio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) FUNCTION(nand),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) FUNCTION(sdcard),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) FUNCTION(i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) FUNCTION(i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) FUNCTION(i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) FUNCTION(i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) FUNCTION(uart_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) FUNCTION(uart_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) FUNCTION(uart_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) FUNCTION(uart_ao_a_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) FUNCTION(iso7816),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) FUNCTION(eth),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) FUNCTION(pwm_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) FUNCTION(pwm_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) FUNCTION(pwm_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) FUNCTION(pwm_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) FUNCTION(pwm_e),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) FUNCTION(pwm_f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) FUNCTION(cec_ao_a_h),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) FUNCTION(cec_ao_b_h),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) FUNCTION(jtag_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) FUNCTION(bt565_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) FUNCTION(tsin_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) FUNCTION(tsin_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) FUNCTION(hdmitx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) FUNCTION(pdm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) FUNCTION(spdif_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) FUNCTION(spdif_in),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) FUNCTION(mclk0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) FUNCTION(mclk1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) FUNCTION(tdm_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) FUNCTION(tdm_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) FUNCTION(tdm_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) static struct meson_pmx_func meson_g12a_aobus_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) FUNCTION(gpio_aobus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) FUNCTION(uart_ao_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) FUNCTION(uart_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) FUNCTION(i2c_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) FUNCTION(i2c_ao_slave),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) FUNCTION(remote_ao_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) FUNCTION(remote_ao_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) FUNCTION(pwm_a_e),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) FUNCTION(pwm_ao_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) FUNCTION(pwm_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) FUNCTION(pwm_ao_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) FUNCTION(pwm_ao_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) FUNCTION(jtag_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) FUNCTION(cec_ao_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) FUNCTION(cec_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) FUNCTION(tsin_ao_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) FUNCTION(spdif_ao_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) FUNCTION(tdm_ao_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) FUNCTION(mclk0_ao),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) static struct meson_bank meson_g12a_periphs_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) /* name first last irq pullen pull dir out in ds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) BANK_DS("Z", GPIOZ_0, GPIOZ_15, 12, 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) 4, 0, 4, 0, 12, 0, 13, 0, 14, 0, 5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) BANK_DS("H", GPIOH_0, GPIOH_8, 28, 36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) 3, 0, 3, 0, 9, 0, 10, 0, 11, 0, 4, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) BANK_DS("BOOT", BOOT_0, BOOT_15, 37, 52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) BANK_DS("C", GPIOC_0, GPIOC_7, 53, 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 1, 0, 1, 0, 3, 0, 4, 0, 5, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) BANK_DS("A", GPIOA_0, GPIOA_15, 61, 76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 5, 0, 5, 0, 16, 0, 17, 0, 18, 0, 6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) BANK_DS("X", GPIOX_0, GPIOX_19, 77, 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) 2, 0, 2, 0, 6, 0, 7, 0, 8, 0, 2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) static struct meson_bank meson_g12a_aobus_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) /* name first last irq pullen pull dir out in ds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) BANK_DS("AO", GPIOAO_0, GPIOAO_11, 0, 11, 3, 0, 2, 0, 0, 0, 4, 0, 1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) /* GPIOE actually located in the AO bank */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) BANK_DS("E", GPIOE_0, GPIOE_2, 97, 99, 3, 16, 2, 16, 0, 16, 4, 16, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 16, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) static struct meson_pmx_bank meson_g12a_periphs_pmx_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) /* name first lask reg offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) BANK_PMX("Z", GPIOZ_0, GPIOZ_15, 0x6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) BANK_PMX("H", GPIOH_0, GPIOH_8, 0xb, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) BANK_PMX("BOOT", BOOT_0, BOOT_15, 0x0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) BANK_PMX("C", GPIOC_0, GPIOC_7, 0x9, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) BANK_PMX("A", GPIOA_0, GPIOA_15, 0xd, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) BANK_PMX("X", GPIOX_0, GPIOX_19, 0x3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) static struct meson_axg_pmx_data meson_g12a_periphs_pmx_banks_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) .pmx_banks = meson_g12a_periphs_pmx_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) .num_pmx_banks = ARRAY_SIZE(meson_g12a_periphs_pmx_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) static struct meson_pmx_bank meson_g12a_aobus_pmx_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) BANK_PMX("AO", GPIOAO_0, GPIOAO_11, 0x0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) BANK_PMX("E", GPIOE_0, GPIOE_2, 0x1, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) static struct meson_axg_pmx_data meson_g12a_aobus_pmx_banks_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) .pmx_banks = meson_g12a_aobus_pmx_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) .num_pmx_banks = ARRAY_SIZE(meson_g12a_aobus_pmx_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) static int meson_g12a_aobus_parse_dt_extra(struct meson_pinctrl *pc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) pc->reg_pull = pc->reg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) pc->reg_pullen = pc->reg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) static struct meson_pinctrl_data meson_g12a_periphs_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) .name = "periphs-banks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) .pins = meson_g12a_periphs_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) .groups = meson_g12a_periphs_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) .funcs = meson_g12a_periphs_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) .banks = meson_g12a_periphs_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) .num_pins = ARRAY_SIZE(meson_g12a_periphs_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) .num_groups = ARRAY_SIZE(meson_g12a_periphs_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) .num_funcs = ARRAY_SIZE(meson_g12a_periphs_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) .num_banks = ARRAY_SIZE(meson_g12a_periphs_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) .pmx_ops = &meson_axg_pmx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) .pmx_data = &meson_g12a_periphs_pmx_banks_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) static struct meson_pinctrl_data meson_g12a_aobus_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) .name = "aobus-banks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) .pins = meson_g12a_aobus_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) .groups = meson_g12a_aobus_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) .funcs = meson_g12a_aobus_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) .banks = meson_g12a_aobus_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) .num_pins = ARRAY_SIZE(meson_g12a_aobus_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) .num_groups = ARRAY_SIZE(meson_g12a_aobus_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) .num_funcs = ARRAY_SIZE(meson_g12a_aobus_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) .num_banks = ARRAY_SIZE(meson_g12a_aobus_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) .pmx_ops = &meson_axg_pmx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) .pmx_data = &meson_g12a_aobus_pmx_banks_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) .parse_dt = meson_g12a_aobus_parse_dt_extra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) static const struct of_device_id meson_g12a_pinctrl_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) .compatible = "amlogic,meson-g12a-periphs-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) .data = &meson_g12a_periphs_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) .compatible = "amlogic,meson-g12a-aobus-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) .data = &meson_g12a_aobus_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) MODULE_DEVICE_TABLE(of, meson_g12a_pinctrl_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) static struct platform_driver meson_g12a_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) .probe = meson_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) .name = "meson-g12a-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) .of_match_table = meson_g12a_pinctrl_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) module_platform_driver(meson_g12a_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) MODULE_LICENSE("Dual BSD/GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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