^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Pin controller and GPIO driver for Amlogic Meson A1 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Qianggui Song <qianggui.song@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <dt-bindings/gpio/meson-a1-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "pinctrl-meson.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-meson-axg-pmx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct pinctrl_pin_desc meson_a1_periphs_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) MESON_PIN(GPIOP_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MESON_PIN(GPIOP_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MESON_PIN(GPIOP_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MESON_PIN(GPIOP_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MESON_PIN(GPIOP_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MESON_PIN(GPIOP_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MESON_PIN(GPIOP_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MESON_PIN(GPIOP_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MESON_PIN(GPIOP_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MESON_PIN(GPIOP_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MESON_PIN(GPIOP_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MESON_PIN(GPIOP_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MESON_PIN(GPIOP_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MESON_PIN(GPIOB_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MESON_PIN(GPIOB_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MESON_PIN(GPIOB_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MESON_PIN(GPIOB_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MESON_PIN(GPIOB_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MESON_PIN(GPIOB_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MESON_PIN(GPIOB_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MESON_PIN(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MESON_PIN(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MESON_PIN(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MESON_PIN(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MESON_PIN(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MESON_PIN(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MESON_PIN(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MESON_PIN(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MESON_PIN(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MESON_PIN(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MESON_PIN(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MESON_PIN(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MESON_PIN(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MESON_PIN(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MESON_PIN(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MESON_PIN(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MESON_PIN(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MESON_PIN(GPIOF_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MESON_PIN(GPIOF_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MESON_PIN(GPIOF_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MESON_PIN(GPIOF_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MESON_PIN(GPIOF_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MESON_PIN(GPIOF_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MESON_PIN(GPIOF_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MESON_PIN(GPIOF_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MESON_PIN(GPIOF_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MESON_PIN(GPIOF_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MESON_PIN(GPIOF_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MESON_PIN(GPIOF_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MESON_PIN(GPIOF_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MESON_PIN(GPIOA_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MESON_PIN(GPIOA_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MESON_PIN(GPIOA_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MESON_PIN(GPIOA_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MESON_PIN(GPIOA_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MESON_PIN(GPIOA_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MESON_PIN(GPIOA_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MESON_PIN(GPIOA_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MESON_PIN(GPIOA_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MESON_PIN(GPIOA_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MESON_PIN(GPIOA_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MESON_PIN(GPIOA_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* psram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const unsigned int psram_clkn_pins[] = { GPIOP_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const unsigned int psram_clkp_pins[] = { GPIOP_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static const unsigned int psram_ce_n_pins[] = { GPIOP_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const unsigned int psram_rst_n_pins[] = { GPIOP_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const unsigned int psram_adq0_pins[] = { GPIOP_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static const unsigned int psram_adq1_pins[] = { GPIOP_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const unsigned int psram_adq2_pins[] = { GPIOP_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const unsigned int psram_adq3_pins[] = { GPIOP_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const unsigned int psram_adq4_pins[] = { GPIOP_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const unsigned int psram_adq5_pins[] = { GPIOP_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const unsigned int psram_adq6_pins[] = { GPIOP_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const unsigned int psram_adq7_pins[] = { GPIOP_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const unsigned int psram_dqs_dm_pins[] = { GPIOP_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* sdcard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static const unsigned int sdcard_d0_b_pins[] = { GPIOB_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const unsigned int sdcard_d1_b_pins[] = { GPIOB_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static const unsigned int sdcard_d2_b_pins[] = { GPIOB_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const unsigned int sdcard_d3_b_pins[] = { GPIOB_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static const unsigned int sdcard_clk_b_pins[] = { GPIOB_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static const unsigned int sdcard_cmd_b_pins[] = { GPIOB_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static const unsigned int sdcard_d0_x_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const unsigned int sdcard_d1_x_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static const unsigned int sdcard_d2_x_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const unsigned int sdcard_d3_x_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static const unsigned int sdcard_clk_x_pins[] = { GPIOX_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const unsigned int sdcard_cmd_x_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* spif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const unsigned int spif_mo_pins[] = { GPIOB_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const unsigned int spif_mi_pins[] = { GPIOB_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static const unsigned int spif_wp_n_pins[] = { GPIOB_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const unsigned int spif_hold_n_pins[] = { GPIOB_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static const unsigned int spif_clk_pins[] = { GPIOB_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const unsigned int spif_cs_pins[] = { GPIOB_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* i2c0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const unsigned int i2c0_sck_f9_pins[] = { GPIOF_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const unsigned int i2c0_sda_f10_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static const unsigned int i2c0_sck_f11_pins[] = { GPIOF_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const unsigned int i2c0_sda_f12_pins[] = { GPIOF_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* i2c1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const unsigned int i2c1_sda_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const unsigned int i2c1_sck_x_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const unsigned int i2c1_sda_a_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const unsigned int i2c1_sck_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* i2c2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static const unsigned int i2c2_sck_x0_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const unsigned int i2c2_sda_x1_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const unsigned int i2c2_sck_x15_pins[] = { GPIOX_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const unsigned int i2c2_sda_x16_pins[] = { GPIOX_16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const unsigned int i2c2_sck_a4_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const unsigned int i2c2_sda_a5_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const unsigned int i2c2_sck_a8_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static const unsigned int i2c2_sda_a9_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* i2c3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const unsigned int i2c3_sck_f_pins[] = { GPIOF_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const unsigned int i2c3_sda_f_pins[] = { GPIOF_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static const unsigned int i2c3_sck_x_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const unsigned int i2c3_sda_x_pins[] = { GPIOX_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* i2c slave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const unsigned int i2c_slave_sck_a_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const unsigned int i2c_slave_sda_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const unsigned int i2c_slave_sck_f_pins[] = { GPIOF_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static const unsigned int i2c_slave_sda_f_pins[] = { GPIOF_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* uart_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static const unsigned int uart_a_tx_pins[] = { GPIOX_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const unsigned int uart_a_rx_pins[] = { GPIOX_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const unsigned int uart_a_cts_pins[] = { GPIOX_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const unsigned int uart_a_rts_pins[] = { GPIOX_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* uart_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const unsigned int uart_b_tx_x_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static const unsigned int uart_b_rx_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const unsigned int uart_b_tx_f_pins[] = { GPIOF_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static const unsigned int uart_b_rx_f_pins[] = { GPIOF_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* uart_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const unsigned int uart_c_tx_x0_pins[] = { GPIOX_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const unsigned int uart_c_rx_x1_pins[] = { GPIOX_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static const unsigned int uart_c_cts_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static const unsigned int uart_c_rts_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static const unsigned int uart_c_tx_x15_pins[] = { GPIOX_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static const unsigned int uart_c_rx_x16_pins[] = { GPIOX_16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* pmw_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static const unsigned int pwm_a_x6_pins[] = { GPIOX_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const unsigned int pwm_a_x7_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static const unsigned int pwm_a_f6_pins[] = { GPIOF_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const unsigned int pwm_a_f10_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const unsigned int pwm_a_a_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* pmw_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const unsigned int pwm_b_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const unsigned int pwm_b_f_pins[] = { GPIOF_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const unsigned int pwm_b_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* pmw_c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static const unsigned int pwm_c_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const unsigned int pwm_c_f3_pins[] = { GPIOF_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const unsigned int pwm_c_f8_pins[] = { GPIOF_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const unsigned int pwm_c_a_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* pwm_d */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const unsigned int pwm_d_x10_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const unsigned int pwm_d_x13_pins[] = { GPIOX_13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const unsigned int pwm_d_x15_pins[] = { GPIOX_15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const unsigned int pwm_d_f_pins[] = { GPIOF_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* pwm_e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static const unsigned int pwm_e_p_pins[] = { GPIOP_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const unsigned int pwm_e_x2_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static const unsigned int pwm_e_x14_pins[] = { GPIOX_14 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const unsigned int pwm_e_x16_pins[] = { GPIOX_16 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const unsigned int pwm_e_f_pins[] = { GPIOF_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const unsigned int pwm_e_a_pins[] = { GPIOA_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* pwm_f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static const unsigned int pwm_f_b_pins[] = { GPIOB_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const unsigned int pwm_f_x_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static const unsigned int pwm_f_f4_pins[] = { GPIOF_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const unsigned int pwm_f_f12_pins[] = { GPIOF_12 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* pwm_a_hiz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static const unsigned int pwm_a_hiz_f8_pins[] = { GPIOF_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const unsigned int pwm_a_hiz_f10_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static const unsigned int pmw_a_hiz_f6_pins[] = { GPIOF_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* pwm_b_hiz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static const unsigned int pwm_b_hiz_pins[] = { GPIOF_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* pmw_c_hiz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static const unsigned int pwm_c_hiz_pins[] = { GPIOF_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* tdm_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const unsigned int tdm_a_dout1_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static const unsigned int tdm_a_dout0_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const unsigned int tdm_a_fs_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const unsigned int tdm_a_sclk_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static const unsigned int tdm_a_din1_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const unsigned int tdm_a_din0_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static const unsigned int tdm_a_slv_fs_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const unsigned int tdm_a_slv_sclk_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* spi_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static const unsigned int spi_a_mosi_x2_pins[] = { GPIOX_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static const unsigned int spi_a_ss0_x3_pins[] = { GPIOX_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const unsigned int spi_a_sclk_x4_pins[] = { GPIOX_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static const unsigned int spi_a_miso_x5_pins[] = { GPIOX_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static const unsigned int spi_a_mosi_x7_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const unsigned int spi_a_miso_x8_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const unsigned int spi_a_ss0_x9_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static const unsigned int spi_a_sclk_x10_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static const unsigned int spi_a_mosi_a_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static const unsigned int spi_a_miso_a_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const unsigned int spi_a_ss0_a_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const unsigned int spi_a_sclk_a_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* pdm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static const unsigned int pdm_din0_x_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const unsigned int pdm_din1_x_pins[] = { GPIOX_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static const unsigned int pdm_din2_x_pins[] = { GPIOX_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static const unsigned int pdm_dclk_x_pins[] = { GPIOX_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static const unsigned int pdm_din2_a_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const unsigned int pdm_din1_a_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static const unsigned int pdm_din0_a_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static const unsigned int pdm_dclk_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* gen_clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const unsigned int gen_clk_x_pins[] = { GPIOX_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static const unsigned int gen_clk_f8_pins[] = { GPIOF_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static const unsigned int gen_clk_f10_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static const unsigned int gen_clk_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* jtag_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static const unsigned int jtag_a_clk_pins[] = { GPIOF_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static const unsigned int jtag_a_tms_pins[] = { GPIOF_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static const unsigned int jtag_a_tdi_pins[] = { GPIOF_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const unsigned int jtag_a_tdo_pins[] = { GPIOF_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* clk_32_in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static const unsigned int clk_32k_in_pins[] = { GPIOF_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* ir in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static const unsigned int remote_input_f_pins[] = { GPIOF_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static const unsigned int remote_input_a_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* ir out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static const unsigned int remote_out_pins[] = { GPIOF_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const unsigned int spdif_in_f6_pins[] = { GPIOF_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static const unsigned int spdif_in_f7_pins[] = { GPIOF_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* sw */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const unsigned int swclk_pins[] = { GPIOF_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static const unsigned int swdio_pins[] = { GPIOF_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* clk_25 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const unsigned int clk25_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* cec_a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static const unsigned int cec_a_pins[] = { GPIOF_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* cec_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static const unsigned int cec_b_pins[] = { GPIOF_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* clk12_24 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static const unsigned int clk12_24_pins[] = { GPIOF_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* mclk_0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static const unsigned int mclk_0_pins[] = { GPIOA_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* tdm_b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static const unsigned int tdm_b_sclk_pins[] = { GPIOA_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static const unsigned int tdm_b_fs_pins[] = { GPIOA_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static const unsigned int tdm_b_dout0_pins[] = { GPIOA_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static const unsigned int tdm_b_dout1_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static const unsigned int tdm_b_dout2_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static const unsigned int tdm_b_dout3_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const unsigned int tdm_b_dout4_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const unsigned int tdm_b_dout5_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static const unsigned int tdm_b_slv_sclk_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const unsigned int tdm_b_slv_fs_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static const unsigned int tdm_b_din0_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static const unsigned int tdm_b_din1_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static const unsigned int tdm_b_din2_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* mclk_vad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static const unsigned int mclk_vad_pins[] = { GPIOA_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* tdm_vad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static const unsigned int tdm_vad_sclk_a1_pins[] = { GPIOA_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static const unsigned int tdm_vad_fs_a2_pins[] = { GPIOA_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static const unsigned int tdm_vad_sclk_a5_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static const unsigned int tdm_vad_fs_a6_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* tst_out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static const unsigned int tst_out0_pins[] = { GPIOA_0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static const unsigned int tst_out1_pins[] = { GPIOA_1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static const unsigned int tst_out2_pins[] = { GPIOA_2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static const unsigned int tst_out3_pins[] = { GPIOA_3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static const unsigned int tst_out4_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static const unsigned int tst_out5_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const unsigned int tst_out6_pins[] = { GPIOA_6 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static const unsigned int tst_out7_pins[] = { GPIOA_7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static const unsigned int tst_out8_pins[] = { GPIOA_8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const unsigned int tst_out9_pins[] = { GPIOA_9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static const unsigned int tst_out10_pins[] = { GPIOA_10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static const unsigned int tst_out11_pins[] = { GPIOA_11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const unsigned int mute_key_pins[] = { GPIOA_4 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static const unsigned int mute_en_pins[] = { GPIOA_5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static struct meson_pmx_group meson_a1_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) GPIO_GROUP(GPIOP_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) GPIO_GROUP(GPIOP_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) GPIO_GROUP(GPIOP_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) GPIO_GROUP(GPIOP_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) GPIO_GROUP(GPIOP_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) GPIO_GROUP(GPIOP_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) GPIO_GROUP(GPIOP_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) GPIO_GROUP(GPIOP_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) GPIO_GROUP(GPIOP_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) GPIO_GROUP(GPIOP_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) GPIO_GROUP(GPIOP_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) GPIO_GROUP(GPIOP_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) GPIO_GROUP(GPIOP_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) GPIO_GROUP(GPIOB_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) GPIO_GROUP(GPIOB_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) GPIO_GROUP(GPIOB_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) GPIO_GROUP(GPIOB_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) GPIO_GROUP(GPIOB_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) GPIO_GROUP(GPIOB_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) GPIO_GROUP(GPIOB_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) GPIO_GROUP(GPIOX_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) GPIO_GROUP(GPIOX_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) GPIO_GROUP(GPIOX_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) GPIO_GROUP(GPIOX_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) GPIO_GROUP(GPIOX_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) GPIO_GROUP(GPIOX_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) GPIO_GROUP(GPIOX_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) GPIO_GROUP(GPIOX_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) GPIO_GROUP(GPIOX_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) GPIO_GROUP(GPIOX_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) GPIO_GROUP(GPIOX_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) GPIO_GROUP(GPIOX_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) GPIO_GROUP(GPIOX_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) GPIO_GROUP(GPIOX_13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) GPIO_GROUP(GPIOX_14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) GPIO_GROUP(GPIOX_15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GPIO_GROUP(GPIOX_16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) GPIO_GROUP(GPIOF_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) GPIO_GROUP(GPIOF_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) GPIO_GROUP(GPIOF_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) GPIO_GROUP(GPIOF_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) GPIO_GROUP(GPIOF_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) GPIO_GROUP(GPIOF_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) GPIO_GROUP(GPIOF_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) GPIO_GROUP(GPIOF_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) GPIO_GROUP(GPIOF_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) GPIO_GROUP(GPIOF_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) GPIO_GROUP(GPIOF_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) GPIO_GROUP(GPIOF_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) GPIO_GROUP(GPIOF_12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) GPIO_GROUP(GPIOA_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) GPIO_GROUP(GPIOA_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) GPIO_GROUP(GPIOA_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) GPIO_GROUP(GPIOA_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) GPIO_GROUP(GPIOA_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) GPIO_GROUP(GPIOA_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) GPIO_GROUP(GPIOA_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) GPIO_GROUP(GPIOA_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) GPIO_GROUP(GPIOA_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) GPIO_GROUP(GPIOA_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) GPIO_GROUP(GPIOA_10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) GPIO_GROUP(GPIOA_11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* bank P func1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) GROUP(psram_clkn, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) GROUP(psram_clkp, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) GROUP(psram_ce_n, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) GROUP(psram_rst_n, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) GROUP(psram_adq0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) GROUP(psram_adq1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) GROUP(psram_adq2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) GROUP(psram_adq3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) GROUP(psram_adq4, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) GROUP(psram_adq5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) GROUP(psram_adq6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) GROUP(psram_adq7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) GROUP(psram_dqs_dm, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /*bank P func2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) GROUP(pwm_e_p, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /*bank B func1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) GROUP(spif_mo, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) GROUP(spif_mi, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) GROUP(spif_wp_n, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) GROUP(spif_hold_n, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) GROUP(spif_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) GROUP(spif_cs, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) GROUP(pwm_f_b, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /*bank B func2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) GROUP(sdcard_d0_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) GROUP(sdcard_d1_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) GROUP(sdcard_d2_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) GROUP(sdcard_d3_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) GROUP(sdcard_clk_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) GROUP(sdcard_cmd_b, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /*bank X func1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) GROUP(sdcard_d0_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) GROUP(sdcard_d1_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) GROUP(sdcard_d2_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) GROUP(sdcard_d3_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) GROUP(sdcard_clk_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) GROUP(sdcard_cmd_x, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) GROUP(pwm_a_x6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) GROUP(tdm_a_dout1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) GROUP(tdm_a_dout0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) GROUP(tdm_a_fs, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) GROUP(tdm_a_sclk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) GROUP(uart_a_tx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) GROUP(uart_a_rx, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) GROUP(uart_a_cts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) GROUP(uart_a_rts, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) GROUP(pwm_d_x15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) GROUP(pwm_e_x16, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*bank X func2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) GROUP(i2c2_sck_x0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) GROUP(i2c2_sda_x1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) GROUP(spi_a_mosi_x2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) GROUP(spi_a_ss0_x3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) GROUP(spi_a_sclk_x4, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) GROUP(spi_a_miso_x5, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) GROUP(tdm_a_din1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) GROUP(tdm_a_din0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) GROUP(tdm_a_slv_fs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) GROUP(tdm_a_slv_sclk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) GROUP(i2c3_sck_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) GROUP(i2c3_sda_x, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) GROUP(pwm_d_x13, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) GROUP(pwm_e_x14, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) GROUP(i2c2_sck_x15, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) GROUP(i2c2_sda_x16, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /*bank X func3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) GROUP(uart_c_tx_x0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) GROUP(uart_c_rx_x1, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) GROUP(uart_c_cts, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) GROUP(uart_c_rts, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) GROUP(pdm_din0_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) GROUP(pdm_din1_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) GROUP(pdm_din2_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) GROUP(pdm_dclk_x, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) GROUP(uart_c_tx_x15, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) GROUP(uart_c_rx_x16, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /*bank X func4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) GROUP(pwm_e_x2, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) GROUP(pwm_f_x, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) GROUP(spi_a_mosi_x7, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) GROUP(spi_a_miso_x8, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) GROUP(spi_a_ss0_x9, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) GROUP(spi_a_sclk_x10, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /*bank X func5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) GROUP(uart_b_tx_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) GROUP(uart_b_rx_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) GROUP(i2c1_sda_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) GROUP(i2c1_sck_x, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /*bank X func6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) GROUP(pwm_a_x7, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) GROUP(pwm_b_x, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) GROUP(pwm_c_x, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) GROUP(pwm_d_x10, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /*bank X func7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) GROUP(gen_clk_x, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /*bank F func1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) GROUP(uart_b_tx_f, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) GROUP(uart_b_rx_f, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) GROUP(remote_input_f, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) GROUP(jtag_a_clk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) GROUP(jtag_a_tms, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) GROUP(jtag_a_tdi, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) GROUP(jtag_a_tdo, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) GROUP(gen_clk_f8, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) GROUP(pwm_a_f10, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) GROUP(i2c0_sck_f11, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) GROUP(i2c0_sda_f12, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /*bank F func2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) GROUP(clk_32k_in, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) GROUP(pwm_e_f, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) GROUP(pwm_f_f4, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) GROUP(remote_out, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) GROUP(spdif_in_f6, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) GROUP(spdif_in_f7, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) GROUP(pwm_a_hiz_f8, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) GROUP(pwm_a_hiz_f10, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) GROUP(pwm_d_f, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) GROUP(pwm_f_f12, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /*bank F func3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) GROUP(pwm_c_f3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) GROUP(swclk, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) GROUP(swdio, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) GROUP(pwm_a_f6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) GROUP(pwm_b_f, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) GROUP(pwm_c_f8, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) GROUP(clk25, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) GROUP(i2c_slave_sck_f, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) GROUP(i2c_slave_sda_f, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /*bank F func4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) GROUP(cec_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) GROUP(i2c3_sck_f, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) GROUP(i2c3_sda_f, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) GROUP(pmw_a_hiz_f6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) GROUP(pwm_b_hiz, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) GROUP(pwm_c_hiz, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) GROUP(i2c0_sck_f9, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) GROUP(i2c0_sda_f10, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /*bank F func5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) GROUP(cec_b, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) GROUP(clk12_24, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /*bank F func7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) GROUP(gen_clk_f10, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /*bank A func1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) GROUP(mclk_0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) GROUP(tdm_b_sclk, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) GROUP(tdm_b_fs, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) GROUP(tdm_b_dout0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) GROUP(tdm_b_dout1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) GROUP(tdm_b_dout2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) GROUP(tdm_b_dout3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) GROUP(tdm_b_dout4, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) GROUP(tdm_b_dout5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) GROUP(remote_input_a, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /*bank A func2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) GROUP(pwm_e_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) GROUP(tdm_b_slv_sclk, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) GROUP(tdm_b_slv_fs, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) GROUP(tdm_b_din0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) GROUP(tdm_b_din1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) GROUP(tdm_b_din2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) GROUP(i2c1_sda_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) GROUP(i2c1_sck_a, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*bank A func3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) GROUP(i2c2_sck_a4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) GROUP(i2c2_sda_a5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) GROUP(pdm_din2_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) GROUP(pdm_din1_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) GROUP(pdm_din0_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) GROUP(pdm_dclk, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) GROUP(pwm_c_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) GROUP(pwm_b_a, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) /*bank A func4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) GROUP(pwm_a_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) GROUP(spi_a_mosi_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) GROUP(spi_a_miso_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) GROUP(spi_a_ss0_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) GROUP(spi_a_sclk_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) GROUP(i2c_slave_sck_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) GROUP(i2c_slave_sda_a, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /*bank A func5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) GROUP(mclk_vad, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) GROUP(tdm_vad_sclk_a1, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) GROUP(tdm_vad_fs_a2, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) GROUP(tdm_vad_sclk_a5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) GROUP(tdm_vad_fs_a6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) GROUP(i2c2_sck_a8, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) GROUP(i2c2_sda_a9, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /*bank A func6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) GROUP(tst_out0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) GROUP(tst_out1, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) GROUP(tst_out2, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) GROUP(tst_out3, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) GROUP(tst_out4, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) GROUP(tst_out5, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) GROUP(tst_out6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) GROUP(tst_out7, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) GROUP(tst_out8, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) GROUP(tst_out9, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) GROUP(tst_out10, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) GROUP(tst_out11, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /*bank A func7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) GROUP(mute_key, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) GROUP(mute_en, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) GROUP(gen_clk_a, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static const char * const gpio_periphs_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) "GPIOP_0", "GPIOP_1", "GPIOP_2", "GPIOP_3", "GPIOP_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) "GPIOP_5", "GPIOP_6", "GPIOP_7", "GPIOP_8", "GPIOP_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) "GPIOP_10", "GPIOP_11", "GPIOP_12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) "GPIOB_0", "GPIOB_1", "GPIOB_2", "GPIOB_3", "GPIOB_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) "GPIOB_5", "GPIOB_6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) "GPIOX_15", "GPIOX_16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) "GPIOF_0", "GPIOF_1", "GPIOF_2", "GPIOF_3", "GPIOF_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "GPIOF_5", "GPIOF_6", "GPIOF_7", "GPIOF_8", "GPIOF_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) "GPIOF_10", "GPIOF_11", "GPIOF_12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "GPIOA_10", "GPIOA_11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static const char * const psram_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) "psram_clkn", "psram_clkp", "psram_ce_n", "psram_rst_n", "psram_adq0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "psram_adq1", "psram_adq2", "psram_adq3", "psram_adq4", "psram_adq5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "psram_adq6", "psram_adq7", "psram_dqs_dm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const char * const pwm_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) "pwm_a_x6", "pwm_a_x7", "pwm_a_f10", "pwm_a_f6", "pwm_a_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static const char * const pwm_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) "pwm_b_x", "pwm_b_f", "pwm_b_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const char * const pwm_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) "pwm_c_x", "pwm_c_f3", "pwm_c_f8", "pwm_c_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static const char * const pwm_d_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) "pwm_d_x15", "pwm_d_x13", "pwm_d_x10", "pwm_d_f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static const char * const pwm_e_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) "pwm_e_p", "pwm_e_x16", "pwm_e_x14", "pwm_e_x2", "pwm_e_f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) "pwm_e_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static const char * const pwm_f_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) "pwm_f_b", "pwm_f_x", "pwm_f_f4", "pwm_f_f12",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static const char * const pwm_a_hiz_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) "pwm_a_hiz_f8", "pwm_a_hiz_f10", "pwm_a_hiz_f6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static const char * const pwm_b_hiz_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) "pwm_b_hiz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) static const char * const pwm_c_hiz_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) "pwm_c_hiz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static const char * const spif_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) "spif_mo", "spif_mi", "spif_wp_n", "spif_hold_n", "spif_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) "spif_cs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static const char * const sdcard_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) "sdcard_d0_b", "sdcard_d1_b", "sdcard_d2_b", "sdcard_d3_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "sdcard_clk_b", "sdcard_cmd_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) "sdcard_d0_x", "sdcard_d1_x", "sdcard_d2_x", "sdcard_d3_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) "sdcard_clk_x", "sdcard_cmd_x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static const char * const tdm_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) "tdm_a_din0", "tdm_a_din1", "tdm_a_fs", "tdm_a_sclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) "tdm_a_slv_fs", "tdm_a_slv_sclk", "tdm_a_dout0", "tdm_a_dout1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static const char * const uart_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) "uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static const char * const uart_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) "uart_b_tx_x", "uart_b_rx_x", "uart_b_tx_f", "uart_b_rx_f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static const char * const uart_c_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "uart_c_tx_x0", "uart_c_rx_x1", "uart_c_cts", "uart_c_rts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) "uart_c_tx_x15", "uart_c_rx_x16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) static const char * const i2c0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) "i2c0_sck_f11", "i2c0_sda_f12", "i2c0_sck_f9", "i2c0_sda_f10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static const char * const i2c1_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) "i2c1_sda_x", "i2c1_sck_x", "i2c1_sda_a", "i2c1_sck_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) static const char * const i2c2_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) "i2c2_sck_x0", "i2c2_sda_x1", "i2c2_sck_x15", "i2c2_sda_x16",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) "i2c2_sck_a4", "i2c2_sda_a5", "i2c2_sck_a8", "i2c2_sda_a9",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static const char * const i2c3_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) "i2c3_sck_x", "i2c3_sda_x", "i2c3_sck_f", "i2c3_sda_f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static const char * const spi_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) "spi_a_mosi_x2", "spi_a_ss0_x3", "spi_a_sclk_x4", "spi_a_miso_x5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) "spi_a_mosi_x7", "spi_a_miso_x8", "spi_a_ss0_x9", "spi_a_sclk_x10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) "spi_a_mosi_a", "spi_a_miso_a", "spi_a_ss0_a", "spi_a_sclk_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static const char * const pdm_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) "pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_dclk_x", "pdm_din2_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) "pdm_din1_a", "pdm_din0_a", "pdm_dclk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) static const char * const gen_clk_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) "gen_clk_x", "gen_clk_f8", "gen_clk_f10", "gen_clk_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static const char * const remote_input_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) "remote_input_f",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) "remote_input_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static const char * const jtag_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) "jtag_a_clk", "jtag_a_tms", "jtag_a_tdi", "jtag_a_tdo",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static const char * const clk_32k_in_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) "clk_32k_in",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static const char * const remote_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) "remote_out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) static const char * const spdif_in_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) "spdif_in_f6", "spdif_in_f7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) static const char * const sw_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) "swclk", "swdio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static const char * const clk25_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) "clk_25",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static const char * const cec_a_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) "cec_a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) static const char * const cec_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) "cec_b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static const char * const clk12_24_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) "clk12_24",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static const char * const mclk_0_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) "mclk_0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) static const char * const tdm_b_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) "tdm_b_din0", "tdm_b_din1", "tdm_b_din2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "tdm_b_sclk", "tdm_b_fs", "tdm_b_dout0", "tdm_b_dout1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) "tdm_b_dout2", "tdm_b_dout3", "tdm_b_dout4", "tdm_b_dout5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) "tdm_b_slv_sclk", "tdm_b_slv_fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) static const char * const mclk_vad_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) "mclk_vad",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const char * const tdm_vad_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) "tdm_vad_sclk_a1", "tdm_vad_fs_a2", "tdm_vad_sclk_a5", "tdm_vad_fs_a6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) static const char * const tst_out_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) "tst_out0", "tst_out1", "tst_out2", "tst_out3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) "tst_out4", "tst_out5", "tst_out6", "tst_out7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) "tst_out8", "tst_out9", "tst_out10", "tst_out11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static const char * const mute_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) "mute_key", "mute_en",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static struct meson_pmx_func meson_a1_periphs_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) FUNCTION(gpio_periphs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) FUNCTION(psram),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) FUNCTION(pwm_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) FUNCTION(pwm_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) FUNCTION(pwm_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) FUNCTION(pwm_d),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) FUNCTION(pwm_e),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) FUNCTION(pwm_f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) FUNCTION(pwm_a_hiz),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) FUNCTION(pwm_b_hiz),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) FUNCTION(pwm_c_hiz),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) FUNCTION(spif),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) FUNCTION(sdcard),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) FUNCTION(tdm_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) FUNCTION(uart_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) FUNCTION(uart_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) FUNCTION(uart_c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) FUNCTION(i2c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) FUNCTION(i2c1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) FUNCTION(i2c2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) FUNCTION(i2c3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) FUNCTION(spi_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) FUNCTION(pdm),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) FUNCTION(gen_clk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) FUNCTION(remote_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) FUNCTION(jtag_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) FUNCTION(clk_32k_in),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) FUNCTION(remote_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) FUNCTION(spdif_in),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) FUNCTION(sw),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) FUNCTION(clk25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) FUNCTION(cec_a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) FUNCTION(cec_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) FUNCTION(clk12_24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) FUNCTION(mclk_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) FUNCTION(tdm_b),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) FUNCTION(mclk_vad),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) FUNCTION(tdm_vad),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) FUNCTION(tst_out),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) FUNCTION(mute),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) static struct meson_bank meson_a1_periphs_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) /* name first last irq pullen pull dir out in ds*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) BANK_DS("P", GPIOP_0, GPIOP_12, 0, 12, 0x3, 0, 0x4, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) 0x2, 0, 0x1, 0, 0x0, 0, 0x5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) BANK_DS("B", GPIOB_0, GPIOB_6, 13, 19, 0x13, 0, 0x14, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) 0x12, 0, 0x11, 0, 0x10, 0, 0x15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) BANK_DS("X", GPIOX_0, GPIOX_16, 20, 36, 0x23, 0, 0x24, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) 0x22, 0, 0x21, 0, 0x20, 0, 0x25, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) BANK_DS("F", GPIOF_0, GPIOF_12, 37, 49, 0x33, 0, 0x34, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) 0x32, 0, 0x31, 0, 0x30, 0, 0x35, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) BANK_DS("A", GPIOA_0, GPIOA_11, 50, 61, 0x43, 0, 0x44, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 0x42, 0, 0x41, 0, 0x40, 0, 0x45, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) /* name first lask reg offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) BANK_PMX("P", GPIOP_0, GPIOP_12, 0x0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) BANK_PMX("B", GPIOB_0, GPIOB_6, 0x2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) BANK_PMX("X", GPIOX_0, GPIOX_16, 0x3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) BANK_PMX("F", GPIOF_0, GPIOF_12, 0x6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) BANK_PMX("A", GPIOA_0, GPIOA_11, 0x8, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) static struct meson_axg_pmx_data meson_a1_periphs_pmx_banks_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .pmx_banks = meson_a1_periphs_pmx_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .num_pmx_banks = ARRAY_SIZE(meson_a1_periphs_pmx_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) static struct meson_pinctrl_data meson_a1_periphs_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) .name = "periphs-banks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .pins = meson_a1_periphs_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .groups = meson_a1_periphs_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) .funcs = meson_a1_periphs_functions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .banks = meson_a1_periphs_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) .num_pins = ARRAY_SIZE(meson_a1_periphs_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .num_groups = ARRAY_SIZE(meson_a1_periphs_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .num_funcs = ARRAY_SIZE(meson_a1_periphs_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) .num_banks = ARRAY_SIZE(meson_a1_periphs_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .pmx_ops = &meson_axg_pmx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .pmx_data = &meson_a1_periphs_pmx_banks_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .parse_dt = &meson_a1_parse_dt_extra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) static const struct of_device_id meson_a1_pinctrl_dt_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .compatible = "amlogic,meson-a1-periphs-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .data = &meson_a1_periphs_pinctrl_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) MODULE_DEVICE_TABLE(of, meson_a1_pinctrl_dt_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) static struct platform_driver meson_a1_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .probe = meson_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .name = "meson-a1-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) .of_match_table = meson_a1_pinctrl_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) module_platform_driver(meson_a1_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) MODULE_LICENSE("Dual BSD/GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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