^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014-2018 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Maoguang Meng <maoguang.meng@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Sean Wang <sean.wang@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __MTK_EINT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __MTK_EINT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct mtk_eint_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) unsigned int stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned int ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) unsigned int mask_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) unsigned int mask_clr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned int sens;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned int sens_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int sens_clr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned int soft;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int soft_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned int soft_clr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int pol_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int pol_clr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned int dom_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned int dbnc_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int dbnc_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int dbnc_clr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct mtk_eint_hw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 port_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int ap_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int db_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct mtk_eint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct mtk_eint_xt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int (*get_gpio_n)(void *data, unsigned long eint_n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int *gpio_n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct gpio_chip **gpio_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int (*get_gpio_state)(void *data, unsigned long eint_n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int (*set_gpio_as_eint)(void *data, unsigned long eint_n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct mtk_eint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int *dual_edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 *wake_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 *cur_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* Used to fit into various EINT device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) const struct mtk_eint_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) const struct mtk_eint_regs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Used to fit into various pinctrl device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void *pctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) const struct mtk_eint_xt *gpio_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #if IS_ENABLED(CONFIG_EINT_MTK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int mtk_eint_do_init(struct mtk_eint *eint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int mtk_eint_do_suspend(struct mtk_eint *eint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int mtk_eint_do_resume(struct mtk_eint *eint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static inline int mtk_eint_do_init(struct mtk_eint *eint)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static inline int mtk_eint_do_suspend(struct mtk_eint *eint)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline int mtk_eint_do_resume(struct mtk_eint *eint)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static inline int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned int debounce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static inline int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif /* __MTK_EINT_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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