^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Intel Emmitsburg PCH pinctrl/GPIO driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2020, Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pinctrl-intel.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define EBG_PAD_OWN 0x0a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define EBG_PADCFGLOCK 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define EBG_HOSTSW_OWN 0x130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define EBG_GPI_IS 0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define EBG_GPI_IE 0x210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define EBG_GPP(r, s, e) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .reg_num = (r), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .base = (s), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .size = ((e) - (s) + 1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define EBG_COMMUNITY(b, s, e, g) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .barno = (b), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .padown_offset = EBG_PAD_OWN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .padcfglock_offset = EBG_PADCFGLOCK, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .hostown_offset = EBG_HOSTSW_OWN, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .is_offset = EBG_GPI_IS, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .ie_offset = EBG_GPI_IE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .pin_base = (s), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .npins = ((e) - (s) + 1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .gpps = (g), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .ngpps = ARRAY_SIZE(g), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Emmitsburg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static const struct pinctrl_pin_desc ebg_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* GPP_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) PINCTRL_PIN(0, "ESPI_ALERT0B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) PINCTRL_PIN(1, "ESPI_ALERT1B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PINCTRL_PIN(2, "ESPI_IO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) PINCTRL_PIN(3, "ESPI_IO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) PINCTRL_PIN(4, "ESPI_IO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) PINCTRL_PIN(5, "ESPI_IO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) PINCTRL_PIN(6, "ESPI_CS0B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) PINCTRL_PIN(7, "ESPI_CS1B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) PINCTRL_PIN(8, "ESPI_RESETB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) PINCTRL_PIN(9, "ESPI_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) PINCTRL_PIN(10, "SRCCLKREQB_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) PINCTRL_PIN(11, "SRCCLKREQB_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) PINCTRL_PIN(12, "SRCCLKREQB_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PINCTRL_PIN(13, "SRCCLKREQB_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) PINCTRL_PIN(14, "SRCCLKREQB_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) PINCTRL_PIN(15, "SRCCLKREQB_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) PINCTRL_PIN(16, "SRCCLKREQB_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) PINCTRL_PIN(17, "SRCCLKREQB_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) PINCTRL_PIN(18, "SRCCLKREQB_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) PINCTRL_PIN(19, "SRCCLKREQB_9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PINCTRL_PIN(20, "ESPI_CLK_LOOPBK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* GPP_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) PINCTRL_PIN(21, "GSXDOUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) PINCTRL_PIN(22, "GSXSLOAD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) PINCTRL_PIN(23, "GSXDIN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) PINCTRL_PIN(24, "GSXSRESETB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) PINCTRL_PIN(25, "GSXCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) PINCTRL_PIN(26, "USB2_OCB_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) PINCTRL_PIN(27, "USB2_OCB_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) PINCTRL_PIN(28, "USB2_OCB_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PINCTRL_PIN(29, "USB2_OCB_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PINCTRL_PIN(30, "USB2_OCB_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PINCTRL_PIN(31, "USB2_OCB_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PINCTRL_PIN(32, "USB2_OCB_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) PINCTRL_PIN(33, "HS_UART0_RXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) PINCTRL_PIN(34, "HS_UART0_TXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PINCTRL_PIN(35, "HS_UART0_RTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PINCTRL_PIN(36, "HS_UART0_CTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PINCTRL_PIN(37, "HS_UART1_RXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PINCTRL_PIN(38, "HS_UART1_TXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) PINCTRL_PIN(39, "HS_UART1_RTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) PINCTRL_PIN(40, "HS_UART1_CTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) PINCTRL_PIN(41, "GPPC_B_20"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) PINCTRL_PIN(42, "GPPC_B_21"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) PINCTRL_PIN(43, "GPPC_B_22"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) PINCTRL_PIN(44, "PS_ONB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PINCTRL_PIN(45, "SPI0_IO_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) PINCTRL_PIN(46, "SPI0_IO_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PINCTRL_PIN(47, "SPI0_MOSI_IO_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) PINCTRL_PIN(48, "SPI0_MISO_IO_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PINCTRL_PIN(49, "SPI0_TPM_CSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PINCTRL_PIN(50, "SPI0_FLASH_0_CSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PINCTRL_PIN(51, "SPI0_FLASH_1_CSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) PINCTRL_PIN(52, "SPI0_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) PINCTRL_PIN(53, "TIME_SYNC_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) PINCTRL_PIN(54, "SPKR"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) PINCTRL_PIN(55, "CPU_GP_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PINCTRL_PIN(56, "CPU_GP_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PINCTRL_PIN(57, "CPU_GP_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PINCTRL_PIN(58, "CPU_GP_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PINCTRL_PIN(59, "SUSWARNB_SUSPWRDNACK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PINCTRL_PIN(60, "SUSACKB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PINCTRL_PIN(61, "NMIB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) PINCTRL_PIN(62, "SMIB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) PINCTRL_PIN(63, "GPPC_S_10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) PINCTRL_PIN(64, "GPPC_S_11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) PINCTRL_PIN(65, "SPI_CLK_LOOPBK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* GPP_C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) PINCTRL_PIN(66, "ME_SML0CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PINCTRL_PIN(67, "ME_SML0DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) PINCTRL_PIN(68, "ME_SML0ALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PINCTRL_PIN(69, "ME_SML0BDATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PINCTRL_PIN(70, "ME_SML0BCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) PINCTRL_PIN(71, "ME_SML0BALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) PINCTRL_PIN(72, "ME_SML1CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) PINCTRL_PIN(73, "ME_SML1DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PINCTRL_PIN(74, "ME_SML1ALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) PINCTRL_PIN(75, "ME_SML2CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PINCTRL_PIN(76, "ME_SML2DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) PINCTRL_PIN(77, "ME_SML2ALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PINCTRL_PIN(78, "ME_SML3CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) PINCTRL_PIN(79, "ME_SML3DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PINCTRL_PIN(80, "ME_SML3ALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PINCTRL_PIN(81, "ME_SML4CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PINCTRL_PIN(82, "ME_SML4DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PINCTRL_PIN(83, "ME_SML4ALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PINCTRL_PIN(84, "GPPC_C_18"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) PINCTRL_PIN(85, "MC_SMBCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) PINCTRL_PIN(86, "MC_SMBDATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) PINCTRL_PIN(87, "MC_SMBALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* GPP_D */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) PINCTRL_PIN(88, "HS_SMBCLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) PINCTRL_PIN(89, "HS_SMBDATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PINCTRL_PIN(90, "HS_SMBALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) PINCTRL_PIN(91, "GBE_SMB_ALRT_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) PINCTRL_PIN(92, "GBE_SMB_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) PINCTRL_PIN(93, "GBE_SMB_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) PINCTRL_PIN(94, "GBE_GPIO10"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) PINCTRL_PIN(95, "GBE_GPIO11"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) PINCTRL_PIN(96, "CRASHLOG_TRIG_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) PINCTRL_PIN(97, "PMEB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) PINCTRL_PIN(98, "BM_BUSYB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PINCTRL_PIN(99, "PLTRSTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) PINCTRL_PIN(100, "PCHHOTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) PINCTRL_PIN(101, "ADR_COMPLETE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) PINCTRL_PIN(102, "ADR_TRIGGER_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) PINCTRL_PIN(103, "VRALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) PINCTRL_PIN(104, "ADR_ACK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) PINCTRL_PIN(105, "THERMTRIP_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PINCTRL_PIN(106, "MEMTRIP_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) PINCTRL_PIN(107, "MSMI_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) PINCTRL_PIN(108, "CATERR_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) PINCTRL_PIN(109, "GLB_RST_WARN_B"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) PINCTRL_PIN(110, "USB2_OCB_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) PINCTRL_PIN(111, "GPP_D_23"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* GPP_E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) PINCTRL_PIN(112, "SATA1_XPCIE_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) PINCTRL_PIN(113, "SATA1_XPCIE_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) PINCTRL_PIN(114, "SATA1_XPCIE_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) PINCTRL_PIN(115, "SATA1_XPCIE_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) PINCTRL_PIN(116, "SATA0_XPCIE_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) PINCTRL_PIN(117, "SATA0_XPCIE_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) PINCTRL_PIN(118, "SATA0_USB3_XPCIE_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) PINCTRL_PIN(119, "SATA0_USB3_XPCIE_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PINCTRL_PIN(120, "SATA0_SCLOCK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) PINCTRL_PIN(121, "SATA0_SLOAD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) PINCTRL_PIN(122, "SATA0_SDATAOUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) PINCTRL_PIN(123, "SATA1_SCLOCK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) PINCTRL_PIN(124, "SATA1_SLOAD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) PINCTRL_PIN(125, "SATA1_SDATAOUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PINCTRL_PIN(126, "SATA2_SCLOCK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PINCTRL_PIN(127, "SATA2_SLOAD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) PINCTRL_PIN(128, "SATA2_SDATAOUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) PINCTRL_PIN(129, "ERR0_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PINCTRL_PIN(130, "ERR1_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PINCTRL_PIN(131, "ERR2_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) PINCTRL_PIN(132, "GBE_UART_RXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) PINCTRL_PIN(133, "GBE_UART_TXD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) PINCTRL_PIN(134, "GBE_UART_RTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PINCTRL_PIN(135, "GBE_UART_CTSB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* JTAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) PINCTRL_PIN(136, "JTAG_TDO"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PINCTRL_PIN(137, "JTAG_TDI"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PINCTRL_PIN(138, "JTAG_TCK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) PINCTRL_PIN(139, "JTAG_TMS"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PINCTRL_PIN(140, "JTAGX"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) PINCTRL_PIN(141, "PRDYB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PINCTRL_PIN(142, "PREQB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) PINCTRL_PIN(143, "GLB_PC_DISABLE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PINCTRL_PIN(144, "DBG_PMODE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PINCTRL_PIN(145, "GLB_EXT_ACC_DISABLE"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* GPP_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) PINCTRL_PIN(146, "GBE_GPIO12"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) PINCTRL_PIN(147, "GBE_GPIO13"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PINCTRL_PIN(148, "GBE_SDP_TIMESYNC0_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PINCTRL_PIN(149, "GBE_SDP_TIMESYNC1_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) PINCTRL_PIN(150, "GBE_SDP_TIMESYNC2_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) PINCTRL_PIN(151, "GBE_SDP_TIMESYNC3_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) PINCTRL_PIN(152, "GPPC_H_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) PINCTRL_PIN(153, "GPPC_H_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PINCTRL_PIN(154, "NCSI_CLK_IN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PINCTRL_PIN(155, "NCSI_CRS_DV"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) PINCTRL_PIN(156, "NCSI_RXD0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PINCTRL_PIN(157, "NCSI_RXD1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) PINCTRL_PIN(158, "NCSI_TX_EN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) PINCTRL_PIN(159, "NCSI_TXD0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) PINCTRL_PIN(160, "NCSI_TXD1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) PINCTRL_PIN(161, "NAC_NCSI_CLK_OUT_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PINCTRL_PIN(162, "NAC_NCSI_CLK_OUT_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) PINCTRL_PIN(163, "NAC_NCSI_CLK_OUT_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) PINCTRL_PIN(164, "PMCALERTB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PINCTRL_PIN(165, "GPPC_H_19"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* GPP_J */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PINCTRL_PIN(166, "CPUPWRGD"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) PINCTRL_PIN(167, "CPU_THRMTRIP_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PINCTRL_PIN(168, "PLTRST_CPUB"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) PINCTRL_PIN(169, "TRIGGER0_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) PINCTRL_PIN(170, "TRIGGER1_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) PINCTRL_PIN(171, "CPU_PWR_DEBUG_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) PINCTRL_PIN(172, "CPU_MEMTRIP_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) PINCTRL_PIN(173, "CPU_MSMI_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) PINCTRL_PIN(174, "ME_PECI"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) PINCTRL_PIN(175, "NAC_SPARE0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) PINCTRL_PIN(176, "NAC_SPARE1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) PINCTRL_PIN(177, "NAC_SPARE2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) PINCTRL_PIN(178, "CPU_ERR0_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) PINCTRL_PIN(179, "CPU_CATERR_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) PINCTRL_PIN(180, "CPU_ERR1_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) PINCTRL_PIN(181, "CPU_ERR2_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) PINCTRL_PIN(182, "GPP_J_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) PINCTRL_PIN(183, "GPP_J_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* GPP_I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) PINCTRL_PIN(184, "GBE_GPIO4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) PINCTRL_PIN(185, "GBE_GPIO5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) PINCTRL_PIN(186, "GBE_GPIO6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) PINCTRL_PIN(187, "GBE_GPIO7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) PINCTRL_PIN(188, "GBE1_LED1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) PINCTRL_PIN(189, "GBE1_LED2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) PINCTRL_PIN(190, "GBE2_LED0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) PINCTRL_PIN(191, "GBE2_LED1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) PINCTRL_PIN(192, "GBE2_LED2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) PINCTRL_PIN(193, "GBE3_LED0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) PINCTRL_PIN(194, "GBE3_LED1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) PINCTRL_PIN(195, "GBE3_LED2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) PINCTRL_PIN(196, "GBE0_I2C_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) PINCTRL_PIN(197, "GBE0_I2C_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) PINCTRL_PIN(198, "GBE1_I2C_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) PINCTRL_PIN(199, "GBE1_I2C_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) PINCTRL_PIN(200, "GBE2_I2C_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) PINCTRL_PIN(201, "GBE2_I2C_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) PINCTRL_PIN(202, "GBE3_I2C_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) PINCTRL_PIN(203, "GBE3_I2C_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) PINCTRL_PIN(204, "GBE4_I2C_CLK"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) PINCTRL_PIN(205, "GBE4_I2C_DATA"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) PINCTRL_PIN(206, "GBE_GPIO8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) PINCTRL_PIN(207, "GBE_GPIO9"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* GPP_L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) PINCTRL_PIN(208, "PM_SYNC_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) PINCTRL_PIN(209, "PM_DOWN_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) PINCTRL_PIN(210, "PM_SYNC_CLK_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) PINCTRL_PIN(211, "GPP_L_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) PINCTRL_PIN(212, "GPP_L_4"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) PINCTRL_PIN(213, "GPP_L_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) PINCTRL_PIN(214, "GPP_L_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) PINCTRL_PIN(215, "GPP_L_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) PINCTRL_PIN(216, "GPP_L_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PINCTRL_PIN(217, "NAC_GBE_GPIO0_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PINCTRL_PIN(218, "NAC_GBE_GPIO1_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) PINCTRL_PIN(219, "NAC_GBE_GPIO2_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) PINCTRL_PIN(220, "NAC_GBE_GPIO3_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PINCTRL_PIN(221, "NAC_GBE_SMB_DATA_IN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PINCTRL_PIN(222, "NAC_GBE_SMB_DATA_OUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PINCTRL_PIN(223, "NAC_GBE_SMB_ALRT_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PINCTRL_PIN(224, "NAC_GBE_SMB_CLK_IN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) PINCTRL_PIN(225, "NAC_GBE_SMB_CLK_OUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* GPP_M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) PINCTRL_PIN(226, "GPP_M_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) PINCTRL_PIN(227, "GPP_M_1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) PINCTRL_PIN(228, "GPP_M_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) PINCTRL_PIN(229, "GPP_M_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) PINCTRL_PIN(230, "NAC_WAKE_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) PINCTRL_PIN(231, "GPP_M_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) PINCTRL_PIN(232, "GPP_M_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) PINCTRL_PIN(233, "GPP_M_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) PINCTRL_PIN(234, "GPP_M_8"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) PINCTRL_PIN(235, "NAC_SBLINK_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) PINCTRL_PIN(236, "NAC_SBLINK_N2S"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) PINCTRL_PIN(237, "NAC_SBLINK_CLK_N2S"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) PINCTRL_PIN(238, "NAC_SBLINK_CLK_S2N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) PINCTRL_PIN(239, "NAC_XTAL_VALID"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) PINCTRL_PIN(240, "NAC_RESET_NAC_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) PINCTRL_PIN(241, "GPP_M_15"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) PINCTRL_PIN(242, "GPP_M_16"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) PINCTRL_PIN(243, "GPP_M_17"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* GPP_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) PINCTRL_PIN(244, "GPP_N_0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) PINCTRL_PIN(245, "NAC_NCSI_TXD0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) PINCTRL_PIN(246, "GPP_N_2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) PINCTRL_PIN(247, "GPP_N_3"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) PINCTRL_PIN(248, "NAC_NCSI_REFCLK_IN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) PINCTRL_PIN(249, "GPP_N_5"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PINCTRL_PIN(250, "GPP_N_6"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PINCTRL_PIN(251, "GPP_N_7"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PINCTRL_PIN(252, "NAC_NCSI_RXD0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) PINCTRL_PIN(253, "NAC_NCSI_RXD1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) PINCTRL_PIN(254, "NAC_NCSI_CRS_DV"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) PINCTRL_PIN(255, "NAC_NCSI_CLK_IN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) PINCTRL_PIN(256, "NAC_NCSI_REFCLK_OUT"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) PINCTRL_PIN(257, "NAC_NCSI_TX_EN"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PINCTRL_PIN(258, "NAC_NCSI_TXD1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) PINCTRL_PIN(259, "NAC_NCSI_OE_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) PINCTRL_PIN(260, "NAC_GR_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) PINCTRL_PIN(261, "NAC_INIT_SX_WAKE_N"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static const struct intel_padgroup ebg_community0_gpps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) EBG_GPP(0, 0, 20), /* GPP_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) EBG_GPP(1, 21, 44), /* GPP_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) EBG_GPP(2, 45, 65), /* SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static const struct intel_padgroup ebg_community1_gpps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) EBG_GPP(0, 66, 87), /* GPP_C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) EBG_GPP(1, 88, 111), /* GPP_D */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static const struct intel_padgroup ebg_community3_gpps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) EBG_GPP(0, 112, 135), /* GPP_E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) EBG_GPP(1, 136, 145), /* JTAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static const struct intel_padgroup ebg_community4_gpps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) EBG_GPP(0, 146, 165), /* GPP_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) EBG_GPP(1, 166, 183), /* GPP_J */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static const struct intel_padgroup ebg_community5_gpps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) EBG_GPP(0, 184, 207), /* GPP_I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) EBG_GPP(1, 208, 225), /* GPP_L */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) EBG_GPP(2, 226, 243), /* GPP_M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) EBG_GPP(3, 244, 261), /* GPP_N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static const struct intel_community ebg_communities[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) EBG_COMMUNITY(0, 0, 65, ebg_community0_gpps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) EBG_COMMUNITY(1, 66, 111, ebg_community1_gpps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) EBG_COMMUNITY(2, 112, 145, ebg_community3_gpps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) EBG_COMMUNITY(3, 146, 183, ebg_community4_gpps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) EBG_COMMUNITY(4, 184, 261, ebg_community5_gpps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static const struct intel_pinctrl_soc_data ebg_soc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .pins = ebg_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .npins = ARRAY_SIZE(ebg_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .communities = ebg_communities,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .ncommunities = ARRAY_SIZE(ebg_communities),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static const struct acpi_device_id ebg_pinctrl_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) { "INTC1071", (kernel_ulong_t)&ebg_soc_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MODULE_DEVICE_TABLE(acpi, ebg_pinctrl_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static INTEL_PINCTRL_PM_OPS(ebg_pinctrl_pm_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static struct platform_driver ebg_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .probe = intel_pinctrl_probe_by_hid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .name = "emmitsburg-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .acpi_match_table = ebg_pinctrl_acpi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .pm = &ebg_pinctrl_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) module_platform_driver(ebg_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MODULE_DESCRIPTION("Intel Emmitsburg PCH pinctrl/GPIO driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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