^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // VF610 pinctrl driver based on imx pinmux and pinconf core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright 2013 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "pinctrl-imx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) enum vf610_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) VF610_PAD_PTA6 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) VF610_PAD_PTA8 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) VF610_PAD_PTA9 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) VF610_PAD_PTA10 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) VF610_PAD_PTA11 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) VF610_PAD_PTA12 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) VF610_PAD_PTA16 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) VF610_PAD_PTA17 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) VF610_PAD_PTA18 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) VF610_PAD_PTA19 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) VF610_PAD_PTA20 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) VF610_PAD_PTA21 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) VF610_PAD_PTA22 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) VF610_PAD_PTA23 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) VF610_PAD_PTA24 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) VF610_PAD_PTA25 = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) VF610_PAD_PTA26 = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) VF610_PAD_PTA27 = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) VF610_PAD_PTA28 = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) VF610_PAD_PTA29 = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) VF610_PAD_PTA30 = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) VF610_PAD_PTA31 = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) VF610_PAD_PTB0 = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) VF610_PAD_PTB1 = 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) VF610_PAD_PTB2 = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) VF610_PAD_PTB3 = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) VF610_PAD_PTB4 = 26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) VF610_PAD_PTB5 = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) VF610_PAD_PTB6 = 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) VF610_PAD_PTB7 = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) VF610_PAD_PTB8 = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) VF610_PAD_PTB9 = 31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) VF610_PAD_PTB10 = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) VF610_PAD_PTB11 = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) VF610_PAD_PTB12 = 34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) VF610_PAD_PTB13 = 35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) VF610_PAD_PTB14 = 36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) VF610_PAD_PTB15 = 37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) VF610_PAD_PTB16 = 38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) VF610_PAD_PTB17 = 39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) VF610_PAD_PTB18 = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) VF610_PAD_PTB19 = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) VF610_PAD_PTB20 = 42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) VF610_PAD_PTB21 = 43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) VF610_PAD_PTB22 = 44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) VF610_PAD_PTC0 = 45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) VF610_PAD_PTC1 = 46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) VF610_PAD_PTC2 = 47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) VF610_PAD_PTC3 = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) VF610_PAD_PTC4 = 49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) VF610_PAD_PTC5 = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) VF610_PAD_PTC6 = 51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) VF610_PAD_PTC7 = 52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) VF610_PAD_PTC8 = 53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) VF610_PAD_PTC9 = 54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) VF610_PAD_PTC10 = 55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) VF610_PAD_PTC11 = 56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) VF610_PAD_PTC12 = 57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) VF610_PAD_PTC13 = 58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) VF610_PAD_PTC14 = 59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) VF610_PAD_PTC15 = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) VF610_PAD_PTC16 = 61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) VF610_PAD_PTC17 = 62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) VF610_PAD_PTD31 = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) VF610_PAD_PTD30 = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) VF610_PAD_PTD29 = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) VF610_PAD_PTD28 = 66,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) VF610_PAD_PTD27 = 67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) VF610_PAD_PTD26 = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) VF610_PAD_PTD25 = 69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) VF610_PAD_PTD24 = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) VF610_PAD_PTD23 = 71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) VF610_PAD_PTD22 = 72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) VF610_PAD_PTD21 = 73,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) VF610_PAD_PTD20 = 74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) VF610_PAD_PTD19 = 75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) VF610_PAD_PTD18 = 76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) VF610_PAD_PTD17 = 77,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) VF610_PAD_PTD16 = 78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) VF610_PAD_PTD0 = 79,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) VF610_PAD_PTD1 = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) VF610_PAD_PTD2 = 81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) VF610_PAD_PTD3 = 82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) VF610_PAD_PTD4 = 83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) VF610_PAD_PTD5 = 84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) VF610_PAD_PTD6 = 85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) VF610_PAD_PTD7 = 86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) VF610_PAD_PTD8 = 87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) VF610_PAD_PTD9 = 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) VF610_PAD_PTD10 = 89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) VF610_PAD_PTD11 = 90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) VF610_PAD_PTD12 = 91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) VF610_PAD_PTD13 = 92,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) VF610_PAD_PTB23 = 93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) VF610_PAD_PTB24 = 94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) VF610_PAD_PTB25 = 95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) VF610_PAD_PTB26 = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) VF610_PAD_PTB27 = 97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) VF610_PAD_PTB28 = 98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) VF610_PAD_PTC26 = 99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) VF610_PAD_PTC27 = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) VF610_PAD_PTC28 = 101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) VF610_PAD_PTC29 = 102,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) VF610_PAD_PTC30 = 103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) VF610_PAD_PTC31 = 104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) VF610_PAD_PTE0 = 105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) VF610_PAD_PTE1 = 106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) VF610_PAD_PTE2 = 107,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) VF610_PAD_PTE3 = 108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) VF610_PAD_PTE4 = 109,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) VF610_PAD_PTE5 = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) VF610_PAD_PTE6 = 111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) VF610_PAD_PTE7 = 112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) VF610_PAD_PTE8 = 113,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) VF610_PAD_PTE9 = 114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) VF610_PAD_PTE10 = 115,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) VF610_PAD_PTE11 = 116,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) VF610_PAD_PTE12 = 117,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) VF610_PAD_PTE13 = 118,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) VF610_PAD_PTE14 = 119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) VF610_PAD_PTE15 = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) VF610_PAD_PTE16 = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) VF610_PAD_PTE17 = 122,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) VF610_PAD_PTE18 = 123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) VF610_PAD_PTE19 = 124,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) VF610_PAD_PTE20 = 125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) VF610_PAD_PTE21 = 126,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) VF610_PAD_PTE22 = 127,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) VF610_PAD_PTE23 = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) VF610_PAD_PTE24 = 129,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) VF610_PAD_PTE25 = 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) VF610_PAD_PTE26 = 131,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) VF610_PAD_PTE27 = 132,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) VF610_PAD_PTE28 = 133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) VF610_PAD_PTA7 = 134,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static const struct pinctrl_pin_desc vf610_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) IMX_PINCTRL_PIN(VF610_PAD_PTA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) IMX_PINCTRL_PIN(VF610_PAD_PTA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) IMX_PINCTRL_PIN(VF610_PAD_PTA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) IMX_PINCTRL_PIN(VF610_PAD_PTA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) IMX_PINCTRL_PIN(VF610_PAD_PTA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) IMX_PINCTRL_PIN(VF610_PAD_PTA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) IMX_PINCTRL_PIN(VF610_PAD_PTA16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) IMX_PINCTRL_PIN(VF610_PAD_PTA17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) IMX_PINCTRL_PIN(VF610_PAD_PTA18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) IMX_PINCTRL_PIN(VF610_PAD_PTA19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) IMX_PINCTRL_PIN(VF610_PAD_PTA20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) IMX_PINCTRL_PIN(VF610_PAD_PTA21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) IMX_PINCTRL_PIN(VF610_PAD_PTA22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) IMX_PINCTRL_PIN(VF610_PAD_PTA23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) IMX_PINCTRL_PIN(VF610_PAD_PTA24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) IMX_PINCTRL_PIN(VF610_PAD_PTA25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) IMX_PINCTRL_PIN(VF610_PAD_PTA26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) IMX_PINCTRL_PIN(VF610_PAD_PTA27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) IMX_PINCTRL_PIN(VF610_PAD_PTA28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) IMX_PINCTRL_PIN(VF610_PAD_PTA29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) IMX_PINCTRL_PIN(VF610_PAD_PTA30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) IMX_PINCTRL_PIN(VF610_PAD_PTA31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) IMX_PINCTRL_PIN(VF610_PAD_PTB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) IMX_PINCTRL_PIN(VF610_PAD_PTB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) IMX_PINCTRL_PIN(VF610_PAD_PTB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) IMX_PINCTRL_PIN(VF610_PAD_PTB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) IMX_PINCTRL_PIN(VF610_PAD_PTB4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) IMX_PINCTRL_PIN(VF610_PAD_PTB5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) IMX_PINCTRL_PIN(VF610_PAD_PTB6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) IMX_PINCTRL_PIN(VF610_PAD_PTB7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) IMX_PINCTRL_PIN(VF610_PAD_PTB8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) IMX_PINCTRL_PIN(VF610_PAD_PTB9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) IMX_PINCTRL_PIN(VF610_PAD_PTB10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) IMX_PINCTRL_PIN(VF610_PAD_PTB11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) IMX_PINCTRL_PIN(VF610_PAD_PTB12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) IMX_PINCTRL_PIN(VF610_PAD_PTB13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) IMX_PINCTRL_PIN(VF610_PAD_PTB14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) IMX_PINCTRL_PIN(VF610_PAD_PTB15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) IMX_PINCTRL_PIN(VF610_PAD_PTB16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) IMX_PINCTRL_PIN(VF610_PAD_PTB17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) IMX_PINCTRL_PIN(VF610_PAD_PTB18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) IMX_PINCTRL_PIN(VF610_PAD_PTB19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) IMX_PINCTRL_PIN(VF610_PAD_PTB20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) IMX_PINCTRL_PIN(VF610_PAD_PTB21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) IMX_PINCTRL_PIN(VF610_PAD_PTB22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) IMX_PINCTRL_PIN(VF610_PAD_PTC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) IMX_PINCTRL_PIN(VF610_PAD_PTC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) IMX_PINCTRL_PIN(VF610_PAD_PTC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) IMX_PINCTRL_PIN(VF610_PAD_PTC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) IMX_PINCTRL_PIN(VF610_PAD_PTC4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) IMX_PINCTRL_PIN(VF610_PAD_PTC5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) IMX_PINCTRL_PIN(VF610_PAD_PTC6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) IMX_PINCTRL_PIN(VF610_PAD_PTC7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) IMX_PINCTRL_PIN(VF610_PAD_PTC8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) IMX_PINCTRL_PIN(VF610_PAD_PTC9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) IMX_PINCTRL_PIN(VF610_PAD_PTC10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IMX_PINCTRL_PIN(VF610_PAD_PTC11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) IMX_PINCTRL_PIN(VF610_PAD_PTC12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) IMX_PINCTRL_PIN(VF610_PAD_PTC13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) IMX_PINCTRL_PIN(VF610_PAD_PTC14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) IMX_PINCTRL_PIN(VF610_PAD_PTC15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IMX_PINCTRL_PIN(VF610_PAD_PTC16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) IMX_PINCTRL_PIN(VF610_PAD_PTC17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) IMX_PINCTRL_PIN(VF610_PAD_PTD31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) IMX_PINCTRL_PIN(VF610_PAD_PTD30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) IMX_PINCTRL_PIN(VF610_PAD_PTD29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) IMX_PINCTRL_PIN(VF610_PAD_PTD28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IMX_PINCTRL_PIN(VF610_PAD_PTD27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) IMX_PINCTRL_PIN(VF610_PAD_PTD26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) IMX_PINCTRL_PIN(VF610_PAD_PTD25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) IMX_PINCTRL_PIN(VF610_PAD_PTD24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) IMX_PINCTRL_PIN(VF610_PAD_PTD23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) IMX_PINCTRL_PIN(VF610_PAD_PTD22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IMX_PINCTRL_PIN(VF610_PAD_PTD21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IMX_PINCTRL_PIN(VF610_PAD_PTD20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) IMX_PINCTRL_PIN(VF610_PAD_PTD19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IMX_PINCTRL_PIN(VF610_PAD_PTD18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) IMX_PINCTRL_PIN(VF610_PAD_PTD17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) IMX_PINCTRL_PIN(VF610_PAD_PTD16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) IMX_PINCTRL_PIN(VF610_PAD_PTD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) IMX_PINCTRL_PIN(VF610_PAD_PTD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) IMX_PINCTRL_PIN(VF610_PAD_PTD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) IMX_PINCTRL_PIN(VF610_PAD_PTD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) IMX_PINCTRL_PIN(VF610_PAD_PTD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) IMX_PINCTRL_PIN(VF610_PAD_PTD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) IMX_PINCTRL_PIN(VF610_PAD_PTD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IMX_PINCTRL_PIN(VF610_PAD_PTD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) IMX_PINCTRL_PIN(VF610_PAD_PTD8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) IMX_PINCTRL_PIN(VF610_PAD_PTD9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) IMX_PINCTRL_PIN(VF610_PAD_PTD10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) IMX_PINCTRL_PIN(VF610_PAD_PTD11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) IMX_PINCTRL_PIN(VF610_PAD_PTD12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) IMX_PINCTRL_PIN(VF610_PAD_PTD13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) IMX_PINCTRL_PIN(VF610_PAD_PTB23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IMX_PINCTRL_PIN(VF610_PAD_PTB24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) IMX_PINCTRL_PIN(VF610_PAD_PTB25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) IMX_PINCTRL_PIN(VF610_PAD_PTB26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) IMX_PINCTRL_PIN(VF610_PAD_PTB27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) IMX_PINCTRL_PIN(VF610_PAD_PTB28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) IMX_PINCTRL_PIN(VF610_PAD_PTC26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) IMX_PINCTRL_PIN(VF610_PAD_PTC27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IMX_PINCTRL_PIN(VF610_PAD_PTC28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) IMX_PINCTRL_PIN(VF610_PAD_PTC29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) IMX_PINCTRL_PIN(VF610_PAD_PTC30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) IMX_PINCTRL_PIN(VF610_PAD_PTC31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) IMX_PINCTRL_PIN(VF610_PAD_PTE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) IMX_PINCTRL_PIN(VF610_PAD_PTE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) IMX_PINCTRL_PIN(VF610_PAD_PTE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IMX_PINCTRL_PIN(VF610_PAD_PTE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) IMX_PINCTRL_PIN(VF610_PAD_PTE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) IMX_PINCTRL_PIN(VF610_PAD_PTE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) IMX_PINCTRL_PIN(VF610_PAD_PTE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) IMX_PINCTRL_PIN(VF610_PAD_PTE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) IMX_PINCTRL_PIN(VF610_PAD_PTE8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) IMX_PINCTRL_PIN(VF610_PAD_PTE9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) IMX_PINCTRL_PIN(VF610_PAD_PTE10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) IMX_PINCTRL_PIN(VF610_PAD_PTE11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) IMX_PINCTRL_PIN(VF610_PAD_PTE12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) IMX_PINCTRL_PIN(VF610_PAD_PTE13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) IMX_PINCTRL_PIN(VF610_PAD_PTE14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) IMX_PINCTRL_PIN(VF610_PAD_PTE15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) IMX_PINCTRL_PIN(VF610_PAD_PTE16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) IMX_PINCTRL_PIN(VF610_PAD_PTE17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) IMX_PINCTRL_PIN(VF610_PAD_PTE18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) IMX_PINCTRL_PIN(VF610_PAD_PTE19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) IMX_PINCTRL_PIN(VF610_PAD_PTE20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) IMX_PINCTRL_PIN(VF610_PAD_PTE21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) IMX_PINCTRL_PIN(VF610_PAD_PTE22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) IMX_PINCTRL_PIN(VF610_PAD_PTE23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) IMX_PINCTRL_PIN(VF610_PAD_PTE24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) IMX_PINCTRL_PIN(VF610_PAD_PTE25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) IMX_PINCTRL_PIN(VF610_PAD_PTE26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) IMX_PINCTRL_PIN(VF610_PAD_PTE27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) IMX_PINCTRL_PIN(VF610_PAD_PTE28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) IMX_PINCTRL_PIN(VF610_PAD_PTA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int vf610_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct pinctrl_gpio_range *range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) unsigned offset, bool input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) const struct imx_pin_reg *pin_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) pin_reg = &ipctl->pin_regs[offset];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (pin_reg->mux_reg == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* IBE always enabled allows us to read the value "on the wire" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) reg = readl(ipctl->base + pin_reg->mux_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) reg &= ~0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) reg |= 0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) writel(reg, ipctl->base + pin_reg->mux_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static const struct imx_pinctrl_soc_info vf610_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .pins = vf610_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .npins = ARRAY_SIZE(vf610_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .flags = SHARE_MUX_CONF_REG | ZERO_OFFSET_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .gpio_set_direction = vf610_pmx_gpio_set_direction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .mux_mask = 0x700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .mux_shift = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static const struct of_device_id vf610_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) { .compatible = "fsl,vf610-iomuxc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static int vf610_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return imx_pinctrl_probe(pdev, &vf610_pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static struct platform_driver vf610_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .name = "vf610-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .of_match_table = vf610_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .probe = vf610_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int __init vf610_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return platform_driver_register(&vf610_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) arch_initcall(vf610_pinctrl_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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