Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright 2012 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/pinctrl/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/pinctrl/pinconf.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/pinctrl/pinmux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include "../core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "pinctrl-mxs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define SUFFIX_LEN	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) struct mxs_pinctrl_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct pinctrl_dev *pctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct mxs_pinctrl_soc_data *soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	return d->soc->ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 				      unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	return d->soc->groups[group].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 			      const unsigned **pins, unsigned *num_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	*pins = d->soc->groups[group].pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	*num_pins = d->soc->groups[group].npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			     unsigned offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	seq_printf(s, " %s", dev_name(pctldev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 			      struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 			      struct pinctrl_map **map, unsigned *num_maps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct pinctrl_map *new_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	char *group = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	unsigned new_num = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	unsigned long config = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned long *pconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	int length = strlen(np->name) + SUFFIX_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	bool purecfg = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u32 val, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	int ret, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	/* Check for pin config node which has no 'reg' property */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (of_property_read_u32(np, "reg", &reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		purecfg = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	ret = of_property_read_u32(np, "fsl,drive-strength", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		config = val | MA_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	ret = of_property_read_u32(np, "fsl,voltage", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		config |= val << VOL_SHIFT | VOL_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	ret = of_property_read_u32(np, "fsl,pull-up", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		config |= val << PULL_SHIFT | PULL_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* Check for group node which has both mux and config settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (!purecfg && config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		new_num = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	new_map = kcalloc(new_num, sizeof(*new_map), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (!new_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (!purecfg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		new_map[i].data.mux.function = np->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		/* Compose group name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		group = kzalloc(length, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		if (!group) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		snprintf(group, length, "%s.%d", np->name, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		new_map[i].data.mux.group = group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (config) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		if (!pconfig) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 			goto free_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		new_map[i].data.configs.group_or_pin = purecfg ? np->name :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 								 group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		new_map[i].data.configs.configs = pconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		new_map[i].data.configs.num_configs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	*map = new_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	*num_maps = new_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) free_group:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (!purecfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		kfree(group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	kfree(new_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			    struct pinctrl_map *map, unsigned num_maps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	for (i = 0; i < num_maps; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			kfree(map[i].data.mux.group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 			kfree(map[i].data.configs.configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static const struct pinctrl_ops mxs_pinctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.get_groups_count = mxs_get_groups_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	.get_group_name = mxs_get_group_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.get_group_pins = mxs_get_group_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	.pin_dbg_show = mxs_pin_dbg_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	.dt_node_to_map = mxs_dt_node_to_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	.dt_free_map = mxs_dt_free_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	return d->soc->nfunctions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 					     unsigned function)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return d->soc->functions[function].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				       unsigned group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				       const char * const **groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				       unsigned * const num_groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	*groups = d->soc->functions[group].groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	*num_groups = d->soc->functions[group].ngroups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	tmp = readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	tmp &= ~(mask << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	tmp |= value << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	writel(tmp, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			       unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	struct mxs_group *g = &d->soc->groups[group];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	u8 bank, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	u16 pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	for (i = 0; i < g->npins; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		bank = PINID_TO_BANK(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		pin = PINID_TO_PIN(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		reg = d->base + d->soc->regs->muxsel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		reg += bank * 0x20 + pin / 16 * 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		shift = pin % 16 * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const struct pinmux_ops mxs_pinmux_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	.get_functions_count = mxs_pinctrl_get_funcs_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.get_function_name = mxs_pinctrl_get_func_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.get_function_groups = mxs_pinctrl_get_func_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.set_mux = mxs_pinctrl_set_mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 			   unsigned pin, unsigned long *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			   unsigned pin, unsigned long *configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			   unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				 unsigned group, unsigned long *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	*config = d->soc->groups[group].config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 				 unsigned group, unsigned long *configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				 unsigned num_configs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	struct mxs_group *g = &d->soc->groups[group];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	u8 ma, vol, pull, bank, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	u16 pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	for (n = 0; n < num_configs; n++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		config = configs[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		ma = CONFIG_TO_MA(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		vol = CONFIG_TO_VOL(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		pull = CONFIG_TO_PULL(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		for (i = 0; i < g->npins; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			bank = PINID_TO_BANK(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			pin = PINID_TO_PIN(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			/* drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			reg = d->base + d->soc->regs->drive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			reg += bank * 0x40 + pin / 8 * 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 			/* mA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 			if (config & MA_PRESENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 				shift = pin % 8 * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 				mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 			/* vol */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 			if (config & VOL_PRESENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 				shift = pin % 8 * 4 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 				if (vol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 					writel(1 << shift, reg + SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 				else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 					writel(1 << shift, reg + CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			/* pull */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			if (config & PULL_PRESENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				reg = d->base + d->soc->regs->pull;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 				reg += bank * 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 				shift = pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 				if (pull)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 					writel(1 << shift, reg + SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 				else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 					writel(1 << shift, reg + CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		/* cache the config value for mxs_pinconf_group_get() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		g->config = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	} /* for each config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 				 struct seq_file *s, unsigned pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	/* Not support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 				       struct seq_file *s, unsigned group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	unsigned long config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	if (!mxs_pinconf_group_get(pctldev, group, &config))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		seq_printf(s, "0x%lx", config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static const struct pinconf_ops mxs_pinconf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.pin_config_get = mxs_pinconf_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	.pin_config_set = mxs_pinconf_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	.pin_config_group_get = mxs_pinconf_group_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	.pin_config_group_set = mxs_pinconf_group_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	.pin_config_dbg_show = mxs_pinconf_dbg_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	.pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static struct pinctrl_desc mxs_pinctrl_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	.pctlops = &mxs_pinctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	.pmxops = &mxs_pinmux_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	.confops = &mxs_pinconf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static int mxs_pinctrl_parse_group(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 				   struct device_node *np, int idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 				   const char **out_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	struct mxs_group *g = &d->soc->groups[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	const char *propname = "fsl,pinmux-ids";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	char *group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	int length = strlen(np->name) + SUFFIX_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	u32 val, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	if (!group)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	if (of_property_read_u32(np, "reg", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		snprintf(group, length, "%s", np->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		snprintf(group, length, "%s.%d", np->name, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	g->name = group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	prop = of_find_property(np, propname, &length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	if (!prop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	g->npins = length / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	g->pins = devm_kcalloc(&pdev->dev, g->npins, sizeof(*g->pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 			       GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	if (!g->pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	g->muxsel = devm_kcalloc(&pdev->dev, g->npins, sizeof(*g->muxsel),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 				 GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (!g->muxsel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	of_property_read_u32_array(np, propname, g->pins, g->npins);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	for (i = 0; i < g->npins; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		g->pins[i] = MUXID_TO_PINID(g->pins[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	if (out_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		*out_name = g->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 				struct mxs_pinctrl_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	struct mxs_pinctrl_soc_data *soc = d->soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	struct mxs_function *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	const char *gpio_compat = "fsl,mxs-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	const char *fn, *fnull = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	int i = 0, idxf = 0, idxg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	child = of_get_next_child(np, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (!child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		dev_err(&pdev->dev, "no group is defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	/* Count total functions and groups */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	fn = fnull;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	for_each_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		if (of_device_is_compatible(child, gpio_compat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		soc->ngroups++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		/* Skip pure pinconf node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		if (of_property_read_u32(child, "reg", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		if (strcmp(fn, child->name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			fn = child->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 			soc->nfunctions++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	soc->functions = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 				      soc->nfunctions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 				      sizeof(*soc->functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 				      GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	if (!soc->functions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	soc->groups = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 				   soc->ngroups, sizeof(*soc->groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 				   GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	if (!soc->groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	/* Count groups for each function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	fn = fnull;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	f = &soc->functions[idxf];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	for_each_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		if (of_device_is_compatible(child, gpio_compat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		if (of_property_read_u32(child, "reg", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		if (strcmp(fn, child->name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 			struct device_node *child2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 			 * This reference is dropped by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 			 * of_get_next_child(np, * child)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 			of_node_get(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 			 * The logic parsing the functions from dt currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 			 * doesn't handle if functions with the same name are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 			 * not grouped together. Only the first contiguous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 			 * cluster is usable for each function name. This is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 			 * bug that is not trivial to fix, but at least warn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 			 * about it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 			for (child2 = of_get_next_child(np, child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 			     child2 != NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 			     child2 = of_get_next_child(np, child2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 				if (!strcmp(child2->name, fn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 					dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 						 "function nodes must be grouped by name (failed for: %s)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 						 fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 			f = &soc->functions[idxf++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 			f->name = fn = child->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		f->ngroups++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	/* Get groups for each function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	idxf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	fn = fnull;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	for_each_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		if (of_device_is_compatible(child, gpio_compat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		if (of_property_read_u32(child, "reg", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 			ret = mxs_pinctrl_parse_group(pdev, child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 						      idxg++, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 			if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 				of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 		if (strcmp(fn, child->name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 			f = &soc->functions[idxf++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 			f->groups = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 						 f->ngroups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 						 sizeof(*f->groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 						 GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 			if (!f->groups) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 				of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 				return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 			fn = child->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 			i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 		ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 					      &f->groups[i++]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 			of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) int mxs_pinctrl_probe(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 		      struct mxs_pinctrl_soc_data *soc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	struct mxs_pinctrl_data *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	if (!d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	d->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	d->soc = soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	d->base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	if (!d->base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 		return -EADDRNOTAVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	mxs_pinctrl_desc.pins = d->soc->pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	mxs_pinctrl_desc.npins = d->soc->npins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	mxs_pinctrl_desc.name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	platform_set_drvdata(pdev, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	ret = mxs_pinctrl_probe_dt(pdev, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 		dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	if (IS_ERR(d->pctl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 		dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 		ret = PTR_ERR(d->pctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	iounmap(d->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }