^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2017~2018 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Dong Aisheng <aisheng.dong@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <dt-bindings/pinctrl/pads-imx8qm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/firmware/imx/sci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "pinctrl-imx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static const struct pinctrl_pin_desc imx8qm_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) IMX_PINCTRL_PIN(IMX8QM_SIM0_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) IMX_PINCTRL_PIN(IMX8QM_SIM0_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) IMX_PINCTRL_PIN(IMX8QM_SIM0_IO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) IMX_PINCTRL_PIN(IMX8QM_SIM0_PD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) IMX_PINCTRL_PIN(IMX8QM_SIM0_POWER_EN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) IMX_PINCTRL_PIN(IMX8QM_SIM0_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) IMX_PINCTRL_PIN(IMX8QM_GPT0_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) IMX_PINCTRL_PIN(IMX8QM_GPT0_CAPTURE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) IMX_PINCTRL_PIN(IMX8QM_GPT0_COMPARE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) IMX_PINCTRL_PIN(IMX8QM_GPT1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) IMX_PINCTRL_PIN(IMX8QM_GPT1_CAPTURE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) IMX_PINCTRL_PIN(IMX8QM_GPT1_COMPARE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) IMX_PINCTRL_PIN(IMX8QM_UART0_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) IMX_PINCTRL_PIN(IMX8QM_UART0_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) IMX_PINCTRL_PIN(IMX8QM_UART0_RTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) IMX_PINCTRL_PIN(IMX8QM_UART0_CTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) IMX_PINCTRL_PIN(IMX8QM_UART1_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) IMX_PINCTRL_PIN(IMX8QM_UART1_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) IMX_PINCTRL_PIN(IMX8QM_UART1_RTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) IMX_PINCTRL_PIN(IMX8QM_UART1_CTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) IMX_PINCTRL_PIN(IMX8QM_SCU_PMIC_MEMC_ON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) IMX_PINCTRL_PIN(IMX8QM_SCU_WDOG_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) IMX_PINCTRL_PIN(IMX8QM_PMIC_EARLY_WARNING),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) IMX_PINCTRL_PIN(IMX8QM_PMIC_INT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_MCLK_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_MCLK_OUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) IMX_PINCTRL_PIN(IMX8QM_ESAI1_FSR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) IMX_PINCTRL_PIN(IMX8QM_ESAI1_FST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX2_RX3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX3_RX2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX4_RX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX5_RX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) IMX_PINCTRL_PIN(IMX8QM_SPDIF0_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) IMX_PINCTRL_PIN(IMX8QM_SPDIF0_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) IMX_PINCTRL_PIN(IMX8QM_SPDIF0_EXT_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) IMX_PINCTRL_PIN(IMX8QM_SPI3_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) IMX_PINCTRL_PIN(IMX8QM_SPI3_SDO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) IMX_PINCTRL_PIN(IMX8QM_SPI3_SDI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) IMX_PINCTRL_PIN(IMX8QM_SPI3_CS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) IMX_PINCTRL_PIN(IMX8QM_SPI3_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) IMX_PINCTRL_PIN(IMX8QM_ESAI0_FSR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) IMX_PINCTRL_PIN(IMX8QM_ESAI0_FST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX2_RX3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX3_RX2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX4_RX1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX5_RX0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) IMX_PINCTRL_PIN(IMX8QM_MCLK_IN0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) IMX_PINCTRL_PIN(IMX8QM_MCLK_OUT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) IMX_PINCTRL_PIN(IMX8QM_SPI0_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) IMX_PINCTRL_PIN(IMX8QM_SPI0_SDO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) IMX_PINCTRL_PIN(IMX8QM_SPI0_SDI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) IMX_PINCTRL_PIN(IMX8QM_SPI0_CS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) IMX_PINCTRL_PIN(IMX8QM_SPI0_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) IMX_PINCTRL_PIN(IMX8QM_SPI2_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) IMX_PINCTRL_PIN(IMX8QM_SPI2_SDO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) IMX_PINCTRL_PIN(IMX8QM_SPI2_SDI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) IMX_PINCTRL_PIN(IMX8QM_SPI2_CS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) IMX_PINCTRL_PIN(IMX8QM_SPI2_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) IMX_PINCTRL_PIN(IMX8QM_SAI1_RXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) IMX_PINCTRL_PIN(IMX8QM_SAI1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) IMX_PINCTRL_PIN(IMX8QM_SAI1_RXFS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) IMX_PINCTRL_PIN(IMX8QM_SAI1_TXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) IMX_PINCTRL_PIN(IMX8QM_SAI1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) IMX_PINCTRL_PIN(IMX8QM_SAI1_TXFS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) IMX_PINCTRL_PIN(IMX8QM_ADC_IN7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) IMX_PINCTRL_PIN(IMX8QM_ADC_IN6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) IMX_PINCTRL_PIN(IMX8QM_ADC_IN5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) IMX_PINCTRL_PIN(IMX8QM_ADC_IN4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) IMX_PINCTRL_PIN(IMX8QM_ADC_IN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) IMX_PINCTRL_PIN(IMX8QM_ADC_IN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) IMX_PINCTRL_PIN(IMX8QM_ADC_IN1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) IMX_PINCTRL_PIN(IMX8QM_ADC_IN0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) IMX_PINCTRL_PIN(IMX8QM_MLB_SIG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) IMX_PINCTRL_PIN(IMX8QM_MLB_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) IMX_PINCTRL_PIN(IMX8QM_MLB_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_USB3IO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) IMX_PINCTRL_PIN(IMX8QM_USDHC1_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) IMX_PINCTRL_PIN(IMX8QM_USDHC1_VSELECT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) IMX_PINCTRL_PIN(IMX8QM_USDHC2_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) IMX_PINCTRL_PIN(IMX8QM_USDHC2_VSELECT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) IMX_PINCTRL_PIN(IMX8QM_USDHC2_WP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) IMX_PINCTRL_PIN(IMX8QM_USDHC2_CD_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) IMX_PINCTRL_PIN(IMX8QM_ENET0_MDIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) IMX_PINCTRL_PIN(IMX8QM_ENET0_MDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) IMX_PINCTRL_PIN(IMX8QM_ENET0_REFCLK_125M_25M),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) IMX_PINCTRL_PIN(IMX8QM_ENET1_REFCLK_125M_25M),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) IMX_PINCTRL_PIN(IMX8QM_ENET1_MDIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) IMX_PINCTRL_PIN(IMX8QM_ENET1_MDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS0_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS1_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DQS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DQS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS0_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS1_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DQS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS0_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS1_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_CLKREQ_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_WAKE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_PERST_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_CLKREQ_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_WAKE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_PERST_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_STROBE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_0_HSIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_1_HSIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IMX_PINCTRL_PIN(IMX8QM_EMMC0_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IMX_PINCTRL_PIN(IMX8QM_EMMC0_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) IMX_PINCTRL_PIN(IMX8QM_EMMC0_STROBE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) IMX_PINCTRL_PIN(IMX8QM_EMMC0_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IMX_PINCTRL_PIN(IMX8QM_USDHC1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) IMX_PINCTRL_PIN(IMX8QM_USDHC1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_RE_P_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_DQS_P_N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) IMX_PINCTRL_PIN(IMX8QM_USDHC1_STROBE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) IMX_PINCTRL_PIN(IMX8QM_USDHC2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IMX_PINCTRL_PIN(IMX8QM_USDHC2_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static const struct imx_pinctrl_soc_info imx8qm_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .pins = imx8qm_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .npins = ARRAY_SIZE(imx8qm_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .flags = IMX_USE_SCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .imx_pinconf_get = imx_pinconf_get_scu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .imx_pinconf_set = imx_pinconf_set_scu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const struct of_device_id imx8qm_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) { .compatible = "fsl,imx8qm-iomuxc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MODULE_DEVICE_TABLE(of, imx8qm_pinctrl_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static int imx8qm_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ret = imx_pinctrl_sc_ipc_init(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return imx_pinctrl_probe(pdev, &imx8qm_pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static struct platform_driver imx8qm_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .name = "imx8qm-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .of_match_table = of_match_ptr(imx8qm_pinctrl_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .probe = imx8qm_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static int __init imx8qm_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return platform_driver_register(&imx8qm_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) arch_initcall(imx8qm_pinctrl_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_DESCRIPTION("NXP i.MX8QM pinctrl driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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