Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Freescale imx7d pinctrl driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Author: Anson Huang <Anson.Huang@freescale.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "pinctrl-imx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) enum imx7d_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	MX7D_PAD_RESERVE0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	MX7D_PAD_RESERVE1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	MX7D_PAD_RESERVE2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	MX7D_PAD_RESERVE3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	MX7D_PAD_RESERVE4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	MX7D_PAD_GPIO1_IO08 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	MX7D_PAD_GPIO1_IO09 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	MX7D_PAD_GPIO1_IO10 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	MX7D_PAD_GPIO1_IO11 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	MX7D_PAD_GPIO1_IO12 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	MX7D_PAD_GPIO1_IO13 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	MX7D_PAD_GPIO1_IO14 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	MX7D_PAD_GPIO1_IO15 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	MX7D_PAD_EPDC_DATA00 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	MX7D_PAD_EPDC_DATA01 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	MX7D_PAD_EPDC_DATA02 = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	MX7D_PAD_EPDC_DATA03 = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	MX7D_PAD_EPDC_DATA04 = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	MX7D_PAD_EPDC_DATA05 = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	MX7D_PAD_EPDC_DATA06 = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	MX7D_PAD_EPDC_DATA07 = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	MX7D_PAD_EPDC_DATA08 = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	MX7D_PAD_EPDC_DATA09 = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	MX7D_PAD_EPDC_DATA10 = 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	MX7D_PAD_EPDC_DATA11 = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	MX7D_PAD_EPDC_DATA12 = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	MX7D_PAD_EPDC_DATA13 = 26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	MX7D_PAD_EPDC_DATA14 = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	MX7D_PAD_EPDC_DATA15 = 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	MX7D_PAD_EPDC_SDCLK = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	MX7D_PAD_EPDC_SDLE = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	MX7D_PAD_EPDC_SDOE = 31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	MX7D_PAD_EPDC_SDSHR = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	MX7D_PAD_EPDC_SDCE0 = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	MX7D_PAD_EPDC_SDCE1 = 34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	MX7D_PAD_EPDC_SDCE2 = 35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	MX7D_PAD_EPDC_SDCE3 = 36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	MX7D_PAD_EPDC_GDCLK = 37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	MX7D_PAD_EPDC_GDOE = 38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	MX7D_PAD_EPDC_GDRL = 39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	MX7D_PAD_EPDC_GDSP = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	MX7D_PAD_EPDC_BDR0 = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	MX7D_PAD_EPDC_BDR1 = 42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	MX7D_PAD_EPDC_PWR_COM = 43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	MX7D_PAD_EPDC_PWR_STAT = 44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	MX7D_PAD_LCD_CLK = 45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	MX7D_PAD_LCD_ENABLE = 46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	MX7D_PAD_LCD_HSYNC = 47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	MX7D_PAD_LCD_VSYNC = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	MX7D_PAD_LCD_RESET = 49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	MX7D_PAD_LCD_DATA00 = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	MX7D_PAD_LCD_DATA01 = 51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	MX7D_PAD_LCD_DATA02 = 52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	MX7D_PAD_LCD_DATA03 = 53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	MX7D_PAD_LCD_DATA04 = 54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	MX7D_PAD_LCD_DATA05 = 55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	MX7D_PAD_LCD_DATA06 = 56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	MX7D_PAD_LCD_DATA07 = 57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	MX7D_PAD_LCD_DATA08 = 58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	MX7D_PAD_LCD_DATA09 = 59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	MX7D_PAD_LCD_DATA10 = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	MX7D_PAD_LCD_DATA11 = 61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	MX7D_PAD_LCD_DATA12 = 62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	MX7D_PAD_LCD_DATA13 = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	MX7D_PAD_LCD_DATA14 = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	MX7D_PAD_LCD_DATA15 = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	MX7D_PAD_LCD_DATA16 = 66,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	MX7D_PAD_LCD_DATA17 = 67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	MX7D_PAD_LCD_DATA18 = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	MX7D_PAD_LCD_DATA19 = 69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	MX7D_PAD_LCD_DATA20 = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	MX7D_PAD_LCD_DATA21 = 71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	MX7D_PAD_LCD_DATA22 = 72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	MX7D_PAD_LCD_DATA23 = 73,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	MX7D_PAD_UART1_RX_DATA = 74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	MX7D_PAD_UART1_TX_DATA = 75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	MX7D_PAD_UART2_RX_DATA = 76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	MX7D_PAD_UART2_TX_DATA = 77,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	MX7D_PAD_UART3_RX_DATA = 78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	MX7D_PAD_UART3_TX_DATA = 79,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	MX7D_PAD_UART3_RTS_B = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	MX7D_PAD_UART3_CTS_B = 81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	MX7D_PAD_I2C1_SCL = 82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	MX7D_PAD_I2C1_SDA = 83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	MX7D_PAD_I2C2_SCL = 84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	MX7D_PAD_I2C2_SDA = 85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	MX7D_PAD_I2C3_SCL = 86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	MX7D_PAD_I2C3_SDA = 87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	MX7D_PAD_I2C4_SCL = 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	MX7D_PAD_I2C4_SDA = 89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	MX7D_PAD_ECSPI1_SCLK = 90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	MX7D_PAD_ECSPI1_MOSI = 91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	MX7D_PAD_ECSPI1_MISO = 92,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	MX7D_PAD_ECSPI1_SS0 = 93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	MX7D_PAD_ECSPI2_SCLK = 94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	MX7D_PAD_ECSPI2_MOSI = 95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	MX7D_PAD_ECSPI2_MISO = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	MX7D_PAD_ECSPI2_SS0 = 97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	MX7D_PAD_SD1_CD_B = 98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	MX7D_PAD_SD1_WP = 99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	MX7D_PAD_SD1_RESET_B = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	MX7D_PAD_SD1_CLK = 101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	MX7D_PAD_SD1_CMD = 102,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	MX7D_PAD_SD1_DATA0 = 103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	MX7D_PAD_SD1_DATA1 = 104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	MX7D_PAD_SD1_DATA2 = 105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	MX7D_PAD_SD1_DATA3 = 106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	MX7D_PAD_SD2_CD_B = 107,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	MX7D_PAD_SD2_WP = 108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	MX7D_PAD_SD2_RESET_B = 109,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	MX7D_PAD_SD2_CLK = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	MX7D_PAD_SD2_CMD = 111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	MX7D_PAD_SD2_DATA0 = 112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	MX7D_PAD_SD2_DATA1 = 113,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	MX7D_PAD_SD2_DATA2 = 114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	MX7D_PAD_SD2_DATA3 = 115,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	MX7D_PAD_SD3_CLK = 116,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	MX7D_PAD_SD3_CMD = 117,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	MX7D_PAD_SD3_DATA0 = 118,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	MX7D_PAD_SD3_DATA1 = 119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	MX7D_PAD_SD3_DATA2 = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	MX7D_PAD_SD3_DATA3 = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	MX7D_PAD_SD3_DATA4 = 122,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	MX7D_PAD_SD3_DATA5 = 123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	MX7D_PAD_SD3_DATA6 = 124,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	MX7D_PAD_SD3_DATA7 = 125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	MX7D_PAD_SD3_STROBE = 126,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	MX7D_PAD_SD3_RESET_B = 127,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	MX7D_PAD_SAI1_RX_DATA = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	MX7D_PAD_SAI1_TX_BCLK = 129,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	MX7D_PAD_SAI1_TX_SYNC = 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	MX7D_PAD_SAI1_TX_DATA = 131,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	MX7D_PAD_SAI1_RX_SYNC = 132,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	MX7D_PAD_SAI1_RX_BCLK = 133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	MX7D_PAD_SAI1_MCLK = 134,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	MX7D_PAD_SAI2_TX_SYNC = 135,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	MX7D_PAD_SAI2_TX_BCLK = 136,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	MX7D_PAD_SAI2_RX_DATA = 137,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	MX7D_PAD_SAI2_TX_DATA = 138,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	MX7D_PAD_ENET1_RGMII_RD0 = 139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	MX7D_PAD_ENET1_RGMII_RD1 = 140,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	MX7D_PAD_ENET1_RGMII_RD2 = 141,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	MX7D_PAD_ENET1_RGMII_RD3 = 142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	MX7D_PAD_ENET1_RGMII_RX_CTL = 143,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	MX7D_PAD_ENET1_RGMII_RXC = 144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	MX7D_PAD_ENET1_RGMII_TD0 = 145,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	MX7D_PAD_ENET1_RGMII_TD1 = 146,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	MX7D_PAD_ENET1_RGMII_TD2 = 147,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	MX7D_PAD_ENET1_RGMII_TD3 = 148,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	MX7D_PAD_ENET1_RGMII_TX_CTL = 149,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	MX7D_PAD_ENET1_RGMII_TXC = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	MX7D_PAD_ENET1_TX_CLK = 151,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	MX7D_PAD_ENET1_RX_CLK = 152,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	MX7D_PAD_ENET1_CRS = 153,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	MX7D_PAD_ENET1_COL = 154,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) enum imx7d_lpsr_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	MX7D_PAD_GPIO1_IO00 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	MX7D_PAD_GPIO1_IO01 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	MX7D_PAD_GPIO1_IO02 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	MX7D_PAD_GPIO1_IO03 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	MX7D_PAD_GPIO1_IO04 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	MX7D_PAD_GPIO1_IO05 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	MX7D_PAD_GPIO1_IO06 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	MX7D_PAD_GPIO1_IO07 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	IMX_PINCTRL_PIN(MX7D_PAD_RESERVE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDSHR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDRL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDSP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_COM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_STAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	IMX_PINCTRL_PIN(MX7D_PAD_UART1_RX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	IMX_PINCTRL_PIN(MX7D_PAD_UART1_TX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	IMX_PINCTRL_PIN(MX7D_PAD_UART2_RX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	IMX_PINCTRL_PIN(MX7D_PAD_UART2_TX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	IMX_PINCTRL_PIN(MX7D_PAD_UART3_RX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	IMX_PINCTRL_PIN(MX7D_PAD_UART3_TX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	IMX_PINCTRL_PIN(MX7D_PAD_UART3_RTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	IMX_PINCTRL_PIN(MX7D_PAD_UART3_CTS_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_CD_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_WP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_CD_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_WP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_STROBE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	IMX_PINCTRL_PIN(MX7D_PAD_SD3_RESET_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_BCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_BCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI1_MCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_BCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI2_RX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TX_CTL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_TX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_CRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.pins = imx7d_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.npins = ARRAY_SIZE(imx7d_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.gpr_compatible = "fsl,imx7d-iomuxc-gpr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static const struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.pins = imx7d_lpsr_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	.npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	.flags = ZERO_OFFSET_VALID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static const struct of_device_id imx7d_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	{ .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	{ .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static int imx7d_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	const struct imx_pinctrl_soc_info *pinctrl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	pinctrl_info = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (!pinctrl_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	return imx_pinctrl_probe(pdev, pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static struct platform_driver imx7d_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		.name = "imx7d-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		.of_match_table = of_match_ptr(imx7d_pinctrl_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	.probe = imx7d_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static int __init imx7d_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	return platform_driver_register(&imx7d_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) arch_initcall(imx7d_pinctrl_init);