^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Freescale imx6sl pinctrl driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Author: Shawn Guo <shawn.guo@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (C) 2013 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pinctrl-imx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum imx6sl_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MX6SL_PAD_RESERVE0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MX6SL_PAD_RESERVE1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MX6SL_PAD_RESERVE2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MX6SL_PAD_RESERVE3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MX6SL_PAD_RESERVE4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MX6SL_PAD_RESERVE5 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MX6SL_PAD_RESERVE6 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MX6SL_PAD_RESERVE7 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MX6SL_PAD_RESERVE8 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MX6SL_PAD_RESERVE9 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MX6SL_PAD_RESERVE10 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MX6SL_PAD_RESERVE11 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MX6SL_PAD_RESERVE12 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MX6SL_PAD_RESERVE13 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MX6SL_PAD_RESERVE14 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MX6SL_PAD_RESERVE15 = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MX6SL_PAD_RESERVE16 = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MX6SL_PAD_RESERVE17 = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MX6SL_PAD_RESERVE18 = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MX6SL_PAD_AUD_MCLK = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MX6SL_PAD_AUD_RXC = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MX6SL_PAD_AUD_RXD = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MX6SL_PAD_AUD_RXFS = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MX6SL_PAD_AUD_TXC = 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MX6SL_PAD_AUD_TXD = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MX6SL_PAD_AUD_TXFS = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MX6SL_PAD_ECSPI1_MISO = 26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MX6SL_PAD_ECSPI1_MOSI = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MX6SL_PAD_ECSPI1_SCLK = 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MX6SL_PAD_ECSPI1_SS0 = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MX6SL_PAD_ECSPI2_MISO = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MX6SL_PAD_ECSPI2_MOSI = 31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MX6SL_PAD_ECSPI2_SCLK = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MX6SL_PAD_ECSPI2_SS0 = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MX6SL_PAD_EPDC_BDR0 = 34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MX6SL_PAD_EPDC_BDR1 = 35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MX6SL_PAD_EPDC_D0 = 36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MX6SL_PAD_EPDC_D1 = 37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MX6SL_PAD_EPDC_D10 = 38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MX6SL_PAD_EPDC_D11 = 39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MX6SL_PAD_EPDC_D12 = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MX6SL_PAD_EPDC_D13 = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MX6SL_PAD_EPDC_D14 = 42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MX6SL_PAD_EPDC_D15 = 43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MX6SL_PAD_EPDC_D2 = 44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MX6SL_PAD_EPDC_D3 = 45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MX6SL_PAD_EPDC_D4 = 46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MX6SL_PAD_EPDC_D5 = 47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MX6SL_PAD_EPDC_D6 = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MX6SL_PAD_EPDC_D7 = 49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MX6SL_PAD_EPDC_D8 = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MX6SL_PAD_EPDC_D9 = 51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MX6SL_PAD_EPDC_GDCLK = 52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MX6SL_PAD_EPDC_GDOE = 53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MX6SL_PAD_EPDC_GDRL = 54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MX6SL_PAD_EPDC_GDSP = 55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MX6SL_PAD_EPDC_PWRCOM = 56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MX6SL_PAD_EPDC_PWRCTRL0 = 57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MX6SL_PAD_EPDC_PWRCTRL1 = 58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MX6SL_PAD_EPDC_PWRCTRL2 = 59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MX6SL_PAD_EPDC_PWRCTRL3 = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MX6SL_PAD_EPDC_PWRINT = 61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MX6SL_PAD_EPDC_PWRSTAT = 62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MX6SL_PAD_EPDC_PWRWAKEUP = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MX6SL_PAD_EPDC_SDCE0 = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MX6SL_PAD_EPDC_SDCE1 = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MX6SL_PAD_EPDC_SDCE2 = 66,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MX6SL_PAD_EPDC_SDCE3 = 67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MX6SL_PAD_EPDC_SDCLK = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MX6SL_PAD_EPDC_SDLE = 69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MX6SL_PAD_EPDC_SDOE = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MX6SL_PAD_EPDC_SDSHR = 71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MX6SL_PAD_EPDC_VCOM0 = 72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MX6SL_PAD_EPDC_VCOM1 = 73,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MX6SL_PAD_FEC_CRS_DV = 74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MX6SL_PAD_FEC_MDC = 75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MX6SL_PAD_FEC_MDIO = 76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MX6SL_PAD_FEC_REF_CLK = 77,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MX6SL_PAD_FEC_RX_ER = 78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MX6SL_PAD_FEC_RXD0 = 79,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MX6SL_PAD_FEC_RXD1 = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MX6SL_PAD_FEC_TX_CLK = 81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MX6SL_PAD_FEC_TX_EN = 82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MX6SL_PAD_FEC_TXD0 = 83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MX6SL_PAD_FEC_TXD1 = 84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MX6SL_PAD_HSIC_DAT = 85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MX6SL_PAD_HSIC_STROBE = 86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MX6SL_PAD_I2C1_SCL = 87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MX6SL_PAD_I2C1_SDA = 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MX6SL_PAD_I2C2_SCL = 89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MX6SL_PAD_I2C2_SDA = 90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MX6SL_PAD_KEY_COL0 = 91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MX6SL_PAD_KEY_COL1 = 92,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MX6SL_PAD_KEY_COL2 = 93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MX6SL_PAD_KEY_COL3 = 94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MX6SL_PAD_KEY_COL4 = 95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MX6SL_PAD_KEY_COL5 = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MX6SL_PAD_KEY_COL6 = 97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) MX6SL_PAD_KEY_COL7 = 98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MX6SL_PAD_KEY_ROW0 = 99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MX6SL_PAD_KEY_ROW1 = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MX6SL_PAD_KEY_ROW2 = 101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MX6SL_PAD_KEY_ROW3 = 102,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MX6SL_PAD_KEY_ROW4 = 103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MX6SL_PAD_KEY_ROW5 = 104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MX6SL_PAD_KEY_ROW6 = 105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MX6SL_PAD_KEY_ROW7 = 106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MX6SL_PAD_LCD_CLK = 107,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MX6SL_PAD_LCD_DAT0 = 108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MX6SL_PAD_LCD_DAT1 = 109,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MX6SL_PAD_LCD_DAT10 = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MX6SL_PAD_LCD_DAT11 = 111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MX6SL_PAD_LCD_DAT12 = 112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MX6SL_PAD_LCD_DAT13 = 113,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MX6SL_PAD_LCD_DAT14 = 114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MX6SL_PAD_LCD_DAT15 = 115,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MX6SL_PAD_LCD_DAT16 = 116,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MX6SL_PAD_LCD_DAT17 = 117,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MX6SL_PAD_LCD_DAT18 = 118,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MX6SL_PAD_LCD_DAT19 = 119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MX6SL_PAD_LCD_DAT2 = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MX6SL_PAD_LCD_DAT20 = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MX6SL_PAD_LCD_DAT21 = 122,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MX6SL_PAD_LCD_DAT22 = 123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MX6SL_PAD_LCD_DAT23 = 124,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MX6SL_PAD_LCD_DAT3 = 125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MX6SL_PAD_LCD_DAT4 = 126,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MX6SL_PAD_LCD_DAT5 = 127,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) MX6SL_PAD_LCD_DAT6 = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MX6SL_PAD_LCD_DAT7 = 129,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MX6SL_PAD_LCD_DAT8 = 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MX6SL_PAD_LCD_DAT9 = 131,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MX6SL_PAD_LCD_ENABLE = 132,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MX6SL_PAD_LCD_HSYNC = 133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MX6SL_PAD_LCD_RESET = 134,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MX6SL_PAD_LCD_VSYNC = 135,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MX6SL_PAD_PWM1 = 136,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MX6SL_PAD_REF_CLK_24M = 137,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MX6SL_PAD_REF_CLK_32K = 138,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MX6SL_PAD_SD1_CLK = 139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MX6SL_PAD_SD1_CMD = 140,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MX6SL_PAD_SD1_DAT0 = 141,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MX6SL_PAD_SD1_DAT1 = 142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MX6SL_PAD_SD1_DAT2 = 143,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MX6SL_PAD_SD1_DAT3 = 144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MX6SL_PAD_SD1_DAT4 = 145,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MX6SL_PAD_SD1_DAT5 = 146,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MX6SL_PAD_SD1_DAT6 = 147,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MX6SL_PAD_SD1_DAT7 = 148,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MX6SL_PAD_SD2_CLK = 149,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MX6SL_PAD_SD2_CMD = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MX6SL_PAD_SD2_DAT0 = 151,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MX6SL_PAD_SD2_DAT1 = 152,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MX6SL_PAD_SD2_DAT2 = 153,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MX6SL_PAD_SD2_DAT3 = 154,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MX6SL_PAD_SD2_DAT4 = 155,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MX6SL_PAD_SD2_DAT5 = 156,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MX6SL_PAD_SD2_DAT6 = 157,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) MX6SL_PAD_SD2_DAT7 = 158,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) MX6SL_PAD_SD2_RST = 159,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MX6SL_PAD_SD3_CLK = 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MX6SL_PAD_SD3_CMD = 161,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MX6SL_PAD_SD3_DAT0 = 162,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MX6SL_PAD_SD3_DAT1 = 163,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MX6SL_PAD_SD3_DAT2 = 164,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MX6SL_PAD_SD3_DAT3 = 165,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MX6SL_PAD_UART1_RXD = 166,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MX6SL_PAD_UART1_TXD = 167,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MX6SL_PAD_WDOG_B = 168,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const struct pinctrl_pin_desc imx6sl_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_MCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXFS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXFS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDRL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDSP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCOM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRINT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRSTAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRWAKEUP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDOE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDSHR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_CRS_DV),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_REF_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RX_ER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_EN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_DAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_STROBE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) IMX_PINCTRL_PIN(MX6SL_PAD_LCD_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) IMX_PINCTRL_PIN(MX6SL_PAD_PWM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_24M),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_32K),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) IMX_PINCTRL_PIN(MX6SL_PAD_SD2_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) IMX_PINCTRL_PIN(MX6SL_PAD_UART1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) IMX_PINCTRL_PIN(MX6SL_PAD_UART1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) IMX_PINCTRL_PIN(MX6SL_PAD_WDOG_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static const struct imx_pinctrl_soc_info imx6sl_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .pins = imx6sl_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .npins = ARRAY_SIZE(imx6sl_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .gpr_compatible = "fsl,imx6sl-iomuxc-gpr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static const struct of_device_id imx6sl_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) { .compatible = "fsl,imx6sl-iomuxc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static int imx6sl_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return imx_pinctrl_probe(pdev, &imx6sl_pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static struct platform_driver imx6sl_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .name = "imx6sl-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .of_match_table = imx6sl_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .probe = imx6sl_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static int __init imx6sl_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return platform_driver_register(&imx6sl_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) arch_initcall(imx6sl_pinctrl_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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