^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // imx51 pinctrl driver based on imx pinmux core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2012 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright (C) 2012 Linaro, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // Author: Dong Aisheng <dong.aisheng@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "pinctrl-imx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum imx51_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MX51_PAD_RESERVE0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MX51_PAD_RESERVE1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MX51_PAD_RESERVE2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MX51_PAD_RESERVE3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MX51_PAD_RESERVE4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MX51_PAD_RESERVE5 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MX51_PAD_RESERVE6 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MX51_PAD_EIM_DA0 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MX51_PAD_EIM_DA1 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MX51_PAD_EIM_DA2 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MX51_PAD_EIM_DA3 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MX51_PAD_EIM_DA4 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MX51_PAD_EIM_DA5 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MX51_PAD_EIM_DA6 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MX51_PAD_EIM_DA7 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MX51_PAD_EIM_DA8 = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MX51_PAD_EIM_DA9 = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MX51_PAD_EIM_DA10 = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MX51_PAD_EIM_DA11 = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MX51_PAD_EIM_DA12 = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MX51_PAD_EIM_DA13 = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MX51_PAD_EIM_DA14 = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MX51_PAD_EIM_DA15 = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MX51_PAD_EIM_D16 = 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MX51_PAD_EIM_D17 = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MX51_PAD_EIM_D18 = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MX51_PAD_EIM_D19 = 26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MX51_PAD_EIM_D20 = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MX51_PAD_EIM_D21 = 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MX51_PAD_EIM_D22 = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MX51_PAD_EIM_D23 = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MX51_PAD_EIM_D24 = 31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MX51_PAD_EIM_D25 = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MX51_PAD_EIM_D26 = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MX51_PAD_EIM_D27 = 34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MX51_PAD_EIM_D28 = 35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MX51_PAD_EIM_D29 = 36,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MX51_PAD_EIM_D30 = 37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MX51_PAD_EIM_D31 = 38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MX51_PAD_EIM_A16 = 39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MX51_PAD_EIM_A17 = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MX51_PAD_EIM_A18 = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MX51_PAD_EIM_A19 = 42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MX51_PAD_EIM_A20 = 43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MX51_PAD_EIM_A21 = 44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MX51_PAD_EIM_A22 = 45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MX51_PAD_EIM_A23 = 46,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MX51_PAD_EIM_A24 = 47,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MX51_PAD_EIM_A25 = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MX51_PAD_EIM_A26 = 49,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MX51_PAD_EIM_A27 = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MX51_PAD_EIM_EB0 = 51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MX51_PAD_EIM_EB1 = 52,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MX51_PAD_EIM_EB2 = 53,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MX51_PAD_EIM_EB3 = 54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MX51_PAD_EIM_OE = 55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MX51_PAD_EIM_CS0 = 56,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MX51_PAD_EIM_CS1 = 57,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MX51_PAD_EIM_CS2 = 58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MX51_PAD_EIM_CS3 = 59,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MX51_PAD_EIM_CS4 = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MX51_PAD_EIM_CS5 = 61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MX51_PAD_EIM_DTACK = 62,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MX51_PAD_EIM_LBA = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MX51_PAD_EIM_CRE = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MX51_PAD_DRAM_CS1 = 65,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MX51_PAD_NANDF_WE_B = 66,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MX51_PAD_NANDF_RE_B = 67,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MX51_PAD_NANDF_ALE = 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MX51_PAD_NANDF_CLE = 69,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MX51_PAD_NANDF_WP_B = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MX51_PAD_NANDF_RB0 = 71,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MX51_PAD_NANDF_RB1 = 72,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MX51_PAD_NANDF_RB2 = 73,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MX51_PAD_NANDF_RB3 = 74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MX51_PAD_GPIO_NAND = 75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MX51_PAD_NANDF_CS0 = 76,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MX51_PAD_NANDF_CS1 = 77,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MX51_PAD_NANDF_CS2 = 78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MX51_PAD_NANDF_CS3 = 79,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MX51_PAD_NANDF_CS4 = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MX51_PAD_NANDF_CS5 = 81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MX51_PAD_NANDF_CS6 = 82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MX51_PAD_NANDF_CS7 = 83,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MX51_PAD_NANDF_RDY_INT = 84,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MX51_PAD_NANDF_D15 = 85,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MX51_PAD_NANDF_D14 = 86,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MX51_PAD_NANDF_D13 = 87,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MX51_PAD_NANDF_D12 = 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MX51_PAD_NANDF_D11 = 89,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MX51_PAD_NANDF_D10 = 90,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MX51_PAD_NANDF_D9 = 91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MX51_PAD_NANDF_D8 = 92,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MX51_PAD_NANDF_D7 = 93,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MX51_PAD_NANDF_D6 = 94,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MX51_PAD_NANDF_D5 = 95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) MX51_PAD_NANDF_D4 = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MX51_PAD_NANDF_D3 = 97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MX51_PAD_NANDF_D2 = 98,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MX51_PAD_NANDF_D1 = 99,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MX51_PAD_NANDF_D0 = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MX51_PAD_CSI1_D8 = 101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MX51_PAD_CSI1_D9 = 102,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MX51_PAD_CSI1_D10 = 103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MX51_PAD_CSI1_D11 = 104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MX51_PAD_CSI1_D12 = 105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MX51_PAD_CSI1_D13 = 106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MX51_PAD_CSI1_D14 = 107,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MX51_PAD_CSI1_D15 = 108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MX51_PAD_CSI1_D16 = 109,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MX51_PAD_CSI1_D17 = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MX51_PAD_CSI1_D18 = 111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MX51_PAD_CSI1_D19 = 112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MX51_PAD_CSI1_VSYNC = 113,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MX51_PAD_CSI1_HSYNC = 114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MX51_PAD_CSI2_D12 = 115,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MX51_PAD_CSI2_D13 = 116,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MX51_PAD_CSI2_D14 = 117,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MX51_PAD_CSI2_D15 = 118,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MX51_PAD_CSI2_D16 = 119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MX51_PAD_CSI2_D17 = 120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MX51_PAD_CSI2_D18 = 121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MX51_PAD_CSI2_D19 = 122,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MX51_PAD_CSI2_VSYNC = 123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MX51_PAD_CSI2_HSYNC = 124,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MX51_PAD_CSI2_PIXCLK = 125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) MX51_PAD_I2C1_CLK = 126,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MX51_PAD_I2C1_DAT = 127,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MX51_PAD_AUD3_BB_TXD = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MX51_PAD_AUD3_BB_RXD = 129,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MX51_PAD_AUD3_BB_CK = 130,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MX51_PAD_AUD3_BB_FS = 131,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MX51_PAD_CSPI1_MOSI = 132,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MX51_PAD_CSPI1_MISO = 133,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MX51_PAD_CSPI1_SS0 = 134,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MX51_PAD_CSPI1_SS1 = 135,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MX51_PAD_CSPI1_RDY = 136,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MX51_PAD_CSPI1_SCLK = 137,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MX51_PAD_UART1_RXD = 138,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MX51_PAD_UART1_TXD = 139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MX51_PAD_UART1_RTS = 140,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MX51_PAD_UART1_CTS = 141,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MX51_PAD_UART2_RXD = 142,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MX51_PAD_UART2_TXD = 143,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MX51_PAD_UART3_RXD = 144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MX51_PAD_UART3_TXD = 145,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MX51_PAD_OWIRE_LINE = 146,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MX51_PAD_KEY_ROW0 = 147,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MX51_PAD_KEY_ROW1 = 148,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MX51_PAD_KEY_ROW2 = 149,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MX51_PAD_KEY_ROW3 = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MX51_PAD_KEY_COL0 = 151,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MX51_PAD_KEY_COL1 = 152,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MX51_PAD_KEY_COL2 = 153,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MX51_PAD_KEY_COL3 = 154,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MX51_PAD_KEY_COL4 = 155,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) MX51_PAD_KEY_COL5 = 156,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) MX51_PAD_RESERVE7 = 157,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MX51_PAD_USBH1_CLK = 158,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MX51_PAD_USBH1_DIR = 159,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MX51_PAD_USBH1_STP = 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MX51_PAD_USBH1_NXT = 161,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MX51_PAD_USBH1_DATA0 = 162,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MX51_PAD_USBH1_DATA1 = 163,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MX51_PAD_USBH1_DATA2 = 164,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MX51_PAD_USBH1_DATA3 = 165,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MX51_PAD_USBH1_DATA4 = 166,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) MX51_PAD_USBH1_DATA5 = 167,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MX51_PAD_USBH1_DATA6 = 168,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MX51_PAD_USBH1_DATA7 = 169,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) MX51_PAD_DI1_PIN11 = 170,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MX51_PAD_DI1_PIN12 = 171,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MX51_PAD_DI1_PIN13 = 172,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MX51_PAD_DI1_D0_CS = 173,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MX51_PAD_DI1_D1_CS = 174,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MX51_PAD_DISPB2_SER_DIN = 175,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MX51_PAD_DISPB2_SER_DIO = 176,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MX51_PAD_DISPB2_SER_CLK = 177,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MX51_PAD_DISPB2_SER_RS = 178,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MX51_PAD_DISP1_DAT0 = 179,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MX51_PAD_DISP1_DAT1 = 180,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MX51_PAD_DISP1_DAT2 = 181,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MX51_PAD_DISP1_DAT3 = 182,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MX51_PAD_DISP1_DAT4 = 183,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MX51_PAD_DISP1_DAT5 = 184,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MX51_PAD_DISP1_DAT6 = 185,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MX51_PAD_DISP1_DAT7 = 186,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MX51_PAD_DISP1_DAT8 = 187,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MX51_PAD_DISP1_DAT9 = 188,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) MX51_PAD_DISP1_DAT10 = 189,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) MX51_PAD_DISP1_DAT11 = 190,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) MX51_PAD_DISP1_DAT12 = 191,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) MX51_PAD_DISP1_DAT13 = 192,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MX51_PAD_DISP1_DAT14 = 193,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MX51_PAD_DISP1_DAT15 = 194,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MX51_PAD_DISP1_DAT16 = 195,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MX51_PAD_DISP1_DAT17 = 196,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) MX51_PAD_DISP1_DAT18 = 197,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) MX51_PAD_DISP1_DAT19 = 198,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MX51_PAD_DISP1_DAT20 = 199,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MX51_PAD_DISP1_DAT21 = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MX51_PAD_DISP1_DAT22 = 201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MX51_PAD_DISP1_DAT23 = 202,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MX51_PAD_DI1_PIN3 = 203,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) MX51_PAD_DI1_PIN2 = 204,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MX51_PAD_RESERVE8 = 205,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MX51_PAD_DI_GP2 = 206,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MX51_PAD_DI_GP3 = 207,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MX51_PAD_DI2_PIN4 = 208,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MX51_PAD_DI2_PIN2 = 209,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) MX51_PAD_DI2_PIN3 = 210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MX51_PAD_DI2_DISP_CLK = 211,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MX51_PAD_DI_GP4 = 212,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) MX51_PAD_DISP2_DAT0 = 213,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) MX51_PAD_DISP2_DAT1 = 214,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MX51_PAD_DISP2_DAT2 = 215,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) MX51_PAD_DISP2_DAT3 = 216,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) MX51_PAD_DISP2_DAT4 = 217,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) MX51_PAD_DISP2_DAT5 = 218,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MX51_PAD_DISP2_DAT6 = 219,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MX51_PAD_DISP2_DAT7 = 220,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MX51_PAD_DISP2_DAT8 = 221,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MX51_PAD_DISP2_DAT9 = 222,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MX51_PAD_DISP2_DAT10 = 223,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MX51_PAD_DISP2_DAT11 = 224,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MX51_PAD_DISP2_DAT12 = 225,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MX51_PAD_DISP2_DAT13 = 226,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) MX51_PAD_DISP2_DAT14 = 227,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) MX51_PAD_DISP2_DAT15 = 228,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MX51_PAD_SD1_CMD = 229,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MX51_PAD_SD1_CLK = 230,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MX51_PAD_SD1_DATA0 = 231,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MX51_PAD_SD1_DATA1 = 232,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MX51_PAD_SD1_DATA2 = 233,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MX51_PAD_SD1_DATA3 = 234,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MX51_PAD_GPIO1_0 = 235,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MX51_PAD_GPIO1_1 = 236,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MX51_PAD_SD2_CMD = 237,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MX51_PAD_SD2_CLK = 238,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MX51_PAD_SD2_DATA0 = 239,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MX51_PAD_SD2_DATA1 = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MX51_PAD_SD2_DATA2 = 241,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MX51_PAD_SD2_DATA3 = 242,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MX51_PAD_GPIO1_2 = 243,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MX51_PAD_GPIO1_3 = 244,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MX51_PAD_PMIC_INT_REQ = 245,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MX51_PAD_GPIO1_4 = 246,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MX51_PAD_GPIO1_5 = 247,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MX51_PAD_GPIO1_6 = 248,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MX51_PAD_GPIO1_7 = 249,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MX51_PAD_GPIO1_8 = 250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MX51_PAD_GPIO1_9 = 251,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MX51_PAD_RESERVE9 = 252,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MX51_PAD_RESERVE10 = 253,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MX51_PAD_RESERVE11 = 254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MX51_PAD_RESERVE12 = 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MX51_PAD_RESERVE13 = 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MX51_PAD_RESERVE14 = 257,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MX51_PAD_RESERVE15 = 258,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MX51_PAD_RESERVE16 = 259,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MX51_PAD_RESERVE17 = 260,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MX51_PAD_RESERVE18 = 261,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MX51_PAD_RESERVE19 = 262,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MX51_PAD_RESERVE20 = 263,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MX51_PAD_RESERVE21 = 264,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MX51_PAD_RESERVE22 = 265,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MX51_PAD_RESERVE23 = 266,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MX51_PAD_RESERVE24 = 267,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MX51_PAD_RESERVE25 = 268,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MX51_PAD_RESERVE26 = 269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MX51_PAD_RESERVE27 = 270,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MX51_PAD_RESERVE28 = 271,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) MX51_PAD_RESERVE29 = 272,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MX51_PAD_RESERVE30 = 273,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) MX51_PAD_RESERVE31 = 274,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) MX51_PAD_RESERVE32 = 275,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MX51_PAD_RESERVE33 = 276,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MX51_PAD_RESERVE34 = 277,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MX51_PAD_RESERVE35 = 278,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MX51_PAD_RESERVE36 = 279,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MX51_PAD_RESERVE37 = 280,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MX51_PAD_RESERVE38 = 281,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MX51_PAD_RESERVE39 = 282,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MX51_PAD_RESERVE40 = 283,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MX51_PAD_RESERVE41 = 284,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MX51_PAD_RESERVE42 = 285,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MX51_PAD_RESERVE43 = 286,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MX51_PAD_RESERVE44 = 287,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MX51_PAD_RESERVE45 = 288,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MX51_PAD_RESERVE46 = 289,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MX51_PAD_RESERVE47 = 290,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MX51_PAD_RESERVE48 = 291,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MX51_PAD_RESERVE49 = 292,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MX51_PAD_RESERVE50 = 293,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MX51_PAD_RESERVE51 = 294,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MX51_PAD_RESERVE52 = 295,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MX51_PAD_RESERVE53 = 296,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MX51_PAD_RESERVE54 = 297,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MX51_PAD_RESERVE55 = 298,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) MX51_PAD_RESERVE56 = 299,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MX51_PAD_RESERVE57 = 300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MX51_PAD_RESERVE58 = 301,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MX51_PAD_RESERVE59 = 302,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MX51_PAD_RESERVE60 = 303,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MX51_PAD_RESERVE61 = 304,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MX51_PAD_RESERVE62 = 305,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MX51_PAD_RESERVE63 = 306,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MX51_PAD_RESERVE64 = 307,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MX51_PAD_RESERVE65 = 308,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MX51_PAD_RESERVE66 = 309,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MX51_PAD_RESERVE67 = 310,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MX51_PAD_RESERVE68 = 311,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MX51_PAD_RESERVE69 = 312,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MX51_PAD_RESERVE70 = 313,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MX51_PAD_RESERVE71 = 314,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MX51_PAD_RESERVE72 = 315,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MX51_PAD_RESERVE73 = 316,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MX51_PAD_RESERVE74 = 317,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MX51_PAD_RESERVE75 = 318,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MX51_PAD_RESERVE76 = 319,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MX51_PAD_RESERVE77 = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MX51_PAD_RESERVE78 = 321,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MX51_PAD_RESERVE79 = 322,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MX51_PAD_RESERVE80 = 323,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MX51_PAD_RESERVE81 = 324,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MX51_PAD_RESERVE82 = 325,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MX51_PAD_RESERVE83 = 326,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MX51_PAD_RESERVE84 = 327,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MX51_PAD_RESERVE85 = 328,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MX51_PAD_RESERVE86 = 329,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MX51_PAD_RESERVE87 = 330,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) MX51_PAD_RESERVE88 = 331,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MX51_PAD_RESERVE89 = 332,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MX51_PAD_RESERVE90 = 333,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MX51_PAD_RESERVE91 = 334,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MX51_PAD_RESERVE92 = 335,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) MX51_PAD_RESERVE93 = 336,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MX51_PAD_RESERVE94 = 337,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MX51_PAD_RESERVE95 = 338,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) MX51_PAD_RESERVE96 = 339,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MX51_PAD_RESERVE97 = 340,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MX51_PAD_RESERVE98 = 341,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MX51_PAD_RESERVE99 = 342,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MX51_PAD_RESERVE100 = 343,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MX51_PAD_RESERVE101 = 344,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MX51_PAD_RESERVE102 = 345,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MX51_PAD_RESERVE103 = 346,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) MX51_PAD_RESERVE104 = 347,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) MX51_PAD_RESERVE105 = 348,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) MX51_PAD_RESERVE106 = 349,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MX51_PAD_RESERVE107 = 350,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MX51_PAD_RESERVE108 = 351,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MX51_PAD_RESERVE109 = 352,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) MX51_PAD_RESERVE110 = 353,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MX51_PAD_RESERVE111 = 354,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) MX51_PAD_RESERVE112 = 355,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) MX51_PAD_RESERVE113 = 356,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) MX51_PAD_RESERVE114 = 357,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) MX51_PAD_RESERVE115 = 358,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MX51_PAD_RESERVE116 = 359,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) MX51_PAD_RESERVE117 = 360,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MX51_PAD_RESERVE118 = 361,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) MX51_PAD_RESERVE119 = 362,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) MX51_PAD_RESERVE120 = 363,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) MX51_PAD_RESERVE121 = 364,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MX51_PAD_CSI1_PIXCLK = 365,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MX51_PAD_CSI1_MCLK = 366,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const struct pinctrl_pin_desc imx51_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) IMX_PINCTRL_PIN(MX51_PAD_RESERVE0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) IMX_PINCTRL_PIN(MX51_PAD_RESERVE1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) IMX_PINCTRL_PIN(MX51_PAD_RESERVE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) IMX_PINCTRL_PIN(MX51_PAD_RESERVE3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) IMX_PINCTRL_PIN(MX51_PAD_RESERVE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) IMX_PINCTRL_PIN(MX51_PAD_RESERVE5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) IMX_PINCTRL_PIN(MX51_PAD_RESERVE6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) IMX_PINCTRL_PIN(MX51_PAD_EIM_DA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) IMX_PINCTRL_PIN(MX51_PAD_EIM_D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) IMX_PINCTRL_PIN(MX51_PAD_EIM_D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) IMX_PINCTRL_PIN(MX51_PAD_EIM_D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) IMX_PINCTRL_PIN(MX51_PAD_EIM_D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) IMX_PINCTRL_PIN(MX51_PAD_EIM_D20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) IMX_PINCTRL_PIN(MX51_PAD_EIM_D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) IMX_PINCTRL_PIN(MX51_PAD_EIM_D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) IMX_PINCTRL_PIN(MX51_PAD_EIM_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) IMX_PINCTRL_PIN(MX51_PAD_EIM_D24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) IMX_PINCTRL_PIN(MX51_PAD_EIM_D25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) IMX_PINCTRL_PIN(MX51_PAD_EIM_D26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) IMX_PINCTRL_PIN(MX51_PAD_EIM_D27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) IMX_PINCTRL_PIN(MX51_PAD_EIM_D28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) IMX_PINCTRL_PIN(MX51_PAD_EIM_D29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) IMX_PINCTRL_PIN(MX51_PAD_EIM_D30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) IMX_PINCTRL_PIN(MX51_PAD_EIM_D31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) IMX_PINCTRL_PIN(MX51_PAD_EIM_A16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) IMX_PINCTRL_PIN(MX51_PAD_EIM_A17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) IMX_PINCTRL_PIN(MX51_PAD_EIM_A18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) IMX_PINCTRL_PIN(MX51_PAD_EIM_A19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) IMX_PINCTRL_PIN(MX51_PAD_EIM_A20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) IMX_PINCTRL_PIN(MX51_PAD_EIM_A21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) IMX_PINCTRL_PIN(MX51_PAD_EIM_A22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) IMX_PINCTRL_PIN(MX51_PAD_EIM_A23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) IMX_PINCTRL_PIN(MX51_PAD_EIM_A24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) IMX_PINCTRL_PIN(MX51_PAD_EIM_A25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) IMX_PINCTRL_PIN(MX51_PAD_EIM_A26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) IMX_PINCTRL_PIN(MX51_PAD_EIM_A27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) IMX_PINCTRL_PIN(MX51_PAD_EIM_EB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) IMX_PINCTRL_PIN(MX51_PAD_EIM_EB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) IMX_PINCTRL_PIN(MX51_PAD_EIM_EB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) IMX_PINCTRL_PIN(MX51_PAD_EIM_EB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) IMX_PINCTRL_PIN(MX51_PAD_EIM_OE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) IMX_PINCTRL_PIN(MX51_PAD_EIM_CS5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) IMX_PINCTRL_PIN(MX51_PAD_EIM_DTACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) IMX_PINCTRL_PIN(MX51_PAD_EIM_LBA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) IMX_PINCTRL_PIN(MX51_PAD_EIM_CRE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) IMX_PINCTRL_PIN(MX51_PAD_DRAM_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) IMX_PINCTRL_PIN(MX51_PAD_NANDF_WE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) IMX_PINCTRL_PIN(MX51_PAD_NANDF_ALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) IMX_PINCTRL_PIN(MX51_PAD_NANDF_WP_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) IMX_PINCTRL_PIN(MX51_PAD_GPIO_NAND),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) IMX_PINCTRL_PIN(MX51_PAD_NANDF_RDY_INT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) IMX_PINCTRL_PIN(MX51_PAD_NANDF_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) IMX_PINCTRL_PIN(MX51_PAD_CSI1_D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) IMX_PINCTRL_PIN(MX51_PAD_CSI1_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) IMX_PINCTRL_PIN(MX51_PAD_CSI1_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) IMX_PINCTRL_PIN(MX51_PAD_CSI2_D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) IMX_PINCTRL_PIN(MX51_PAD_CSI2_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) IMX_PINCTRL_PIN(MX51_PAD_CSI2_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) IMX_PINCTRL_PIN(MX51_PAD_CSI2_PIXCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) IMX_PINCTRL_PIN(MX51_PAD_I2C1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) IMX_PINCTRL_PIN(MX51_PAD_I2C1_DAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_CK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_RDY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) IMX_PINCTRL_PIN(MX51_PAD_UART1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) IMX_PINCTRL_PIN(MX51_PAD_UART1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) IMX_PINCTRL_PIN(MX51_PAD_UART1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) IMX_PINCTRL_PIN(MX51_PAD_UART1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) IMX_PINCTRL_PIN(MX51_PAD_UART2_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) IMX_PINCTRL_PIN(MX51_PAD_UART2_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) IMX_PINCTRL_PIN(MX51_PAD_UART3_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) IMX_PINCTRL_PIN(MX51_PAD_UART3_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) IMX_PINCTRL_PIN(MX51_PAD_OWIRE_LINE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) IMX_PINCTRL_PIN(MX51_PAD_KEY_COL5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) IMX_PINCTRL_PIN(MX51_PAD_RESERVE7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) IMX_PINCTRL_PIN(MX51_PAD_USBH1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DIR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) IMX_PINCTRL_PIN(MX51_PAD_USBH1_STP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) IMX_PINCTRL_PIN(MX51_PAD_USBH1_NXT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) IMX_PINCTRL_PIN(MX51_PAD_DI1_D0_CS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) IMX_PINCTRL_PIN(MX51_PAD_DI1_D1_CS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_RS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) IMX_PINCTRL_PIN(MX51_PAD_RESERVE8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) IMX_PINCTRL_PIN(MX51_PAD_DI_GP2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) IMX_PINCTRL_PIN(MX51_PAD_DI_GP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) IMX_PINCTRL_PIN(MX51_PAD_DI2_DISP_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) IMX_PINCTRL_PIN(MX51_PAD_DI_GP4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) IMX_PINCTRL_PIN(MX51_PAD_SD1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) IMX_PINCTRL_PIN(MX51_PAD_SD1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) IMX_PINCTRL_PIN(MX51_PAD_SD2_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) IMX_PINCTRL_PIN(MX51_PAD_SD2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) IMX_PINCTRL_PIN(MX51_PAD_PMIC_INT_REQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) IMX_PINCTRL_PIN(MX51_PAD_GPIO1_9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) IMX_PINCTRL_PIN(MX51_PAD_RESERVE9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) IMX_PINCTRL_PIN(MX51_PAD_RESERVE10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) IMX_PINCTRL_PIN(MX51_PAD_RESERVE11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) IMX_PINCTRL_PIN(MX51_PAD_RESERVE12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) IMX_PINCTRL_PIN(MX51_PAD_RESERVE13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) IMX_PINCTRL_PIN(MX51_PAD_RESERVE14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) IMX_PINCTRL_PIN(MX51_PAD_RESERVE15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) IMX_PINCTRL_PIN(MX51_PAD_RESERVE16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) IMX_PINCTRL_PIN(MX51_PAD_RESERVE17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) IMX_PINCTRL_PIN(MX51_PAD_RESERVE18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) IMX_PINCTRL_PIN(MX51_PAD_RESERVE19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) IMX_PINCTRL_PIN(MX51_PAD_RESERVE20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) IMX_PINCTRL_PIN(MX51_PAD_RESERVE21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) IMX_PINCTRL_PIN(MX51_PAD_RESERVE22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) IMX_PINCTRL_PIN(MX51_PAD_RESERVE23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) IMX_PINCTRL_PIN(MX51_PAD_RESERVE24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) IMX_PINCTRL_PIN(MX51_PAD_RESERVE25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) IMX_PINCTRL_PIN(MX51_PAD_RESERVE26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) IMX_PINCTRL_PIN(MX51_PAD_RESERVE27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) IMX_PINCTRL_PIN(MX51_PAD_RESERVE28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) IMX_PINCTRL_PIN(MX51_PAD_RESERVE29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) IMX_PINCTRL_PIN(MX51_PAD_RESERVE30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) IMX_PINCTRL_PIN(MX51_PAD_RESERVE31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) IMX_PINCTRL_PIN(MX51_PAD_RESERVE32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) IMX_PINCTRL_PIN(MX51_PAD_RESERVE33),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) IMX_PINCTRL_PIN(MX51_PAD_RESERVE34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) IMX_PINCTRL_PIN(MX51_PAD_RESERVE35),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) IMX_PINCTRL_PIN(MX51_PAD_RESERVE36),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) IMX_PINCTRL_PIN(MX51_PAD_RESERVE37),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) IMX_PINCTRL_PIN(MX51_PAD_RESERVE38),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) IMX_PINCTRL_PIN(MX51_PAD_RESERVE39),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) IMX_PINCTRL_PIN(MX51_PAD_RESERVE40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) IMX_PINCTRL_PIN(MX51_PAD_RESERVE41),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) IMX_PINCTRL_PIN(MX51_PAD_RESERVE42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) IMX_PINCTRL_PIN(MX51_PAD_RESERVE43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) IMX_PINCTRL_PIN(MX51_PAD_RESERVE44),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) IMX_PINCTRL_PIN(MX51_PAD_RESERVE45),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) IMX_PINCTRL_PIN(MX51_PAD_RESERVE46),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) IMX_PINCTRL_PIN(MX51_PAD_RESERVE47),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) IMX_PINCTRL_PIN(MX51_PAD_RESERVE48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) IMX_PINCTRL_PIN(MX51_PAD_RESERVE49),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) IMX_PINCTRL_PIN(MX51_PAD_RESERVE50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) IMX_PINCTRL_PIN(MX51_PAD_RESERVE51),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) IMX_PINCTRL_PIN(MX51_PAD_RESERVE52),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) IMX_PINCTRL_PIN(MX51_PAD_RESERVE53),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) IMX_PINCTRL_PIN(MX51_PAD_RESERVE54),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) IMX_PINCTRL_PIN(MX51_PAD_RESERVE55),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) IMX_PINCTRL_PIN(MX51_PAD_RESERVE56),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) IMX_PINCTRL_PIN(MX51_PAD_RESERVE57),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) IMX_PINCTRL_PIN(MX51_PAD_RESERVE58),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) IMX_PINCTRL_PIN(MX51_PAD_RESERVE59),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) IMX_PINCTRL_PIN(MX51_PAD_RESERVE60),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) IMX_PINCTRL_PIN(MX51_PAD_RESERVE61),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) IMX_PINCTRL_PIN(MX51_PAD_RESERVE62),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) IMX_PINCTRL_PIN(MX51_PAD_RESERVE63),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) IMX_PINCTRL_PIN(MX51_PAD_RESERVE64),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) IMX_PINCTRL_PIN(MX51_PAD_RESERVE65),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) IMX_PINCTRL_PIN(MX51_PAD_RESERVE66),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) IMX_PINCTRL_PIN(MX51_PAD_RESERVE67),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) IMX_PINCTRL_PIN(MX51_PAD_RESERVE68),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) IMX_PINCTRL_PIN(MX51_PAD_RESERVE69),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) IMX_PINCTRL_PIN(MX51_PAD_RESERVE70),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) IMX_PINCTRL_PIN(MX51_PAD_RESERVE71),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) IMX_PINCTRL_PIN(MX51_PAD_RESERVE72),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) IMX_PINCTRL_PIN(MX51_PAD_RESERVE73),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) IMX_PINCTRL_PIN(MX51_PAD_RESERVE74),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) IMX_PINCTRL_PIN(MX51_PAD_RESERVE75),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) IMX_PINCTRL_PIN(MX51_PAD_RESERVE76),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) IMX_PINCTRL_PIN(MX51_PAD_RESERVE77),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) IMX_PINCTRL_PIN(MX51_PAD_RESERVE78),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) IMX_PINCTRL_PIN(MX51_PAD_RESERVE79),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) IMX_PINCTRL_PIN(MX51_PAD_RESERVE80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) IMX_PINCTRL_PIN(MX51_PAD_RESERVE81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) IMX_PINCTRL_PIN(MX51_PAD_RESERVE82),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) IMX_PINCTRL_PIN(MX51_PAD_RESERVE83),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) IMX_PINCTRL_PIN(MX51_PAD_RESERVE84),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) IMX_PINCTRL_PIN(MX51_PAD_RESERVE85),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) IMX_PINCTRL_PIN(MX51_PAD_RESERVE86),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) IMX_PINCTRL_PIN(MX51_PAD_RESERVE87),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) IMX_PINCTRL_PIN(MX51_PAD_RESERVE88),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) IMX_PINCTRL_PIN(MX51_PAD_RESERVE89),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) IMX_PINCTRL_PIN(MX51_PAD_RESERVE90),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) IMX_PINCTRL_PIN(MX51_PAD_RESERVE91),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) IMX_PINCTRL_PIN(MX51_PAD_RESERVE92),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) IMX_PINCTRL_PIN(MX51_PAD_RESERVE93),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) IMX_PINCTRL_PIN(MX51_PAD_RESERVE94),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) IMX_PINCTRL_PIN(MX51_PAD_RESERVE95),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) IMX_PINCTRL_PIN(MX51_PAD_RESERVE96),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) IMX_PINCTRL_PIN(MX51_PAD_RESERVE97),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) IMX_PINCTRL_PIN(MX51_PAD_RESERVE98),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) IMX_PINCTRL_PIN(MX51_PAD_RESERVE99),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) IMX_PINCTRL_PIN(MX51_PAD_RESERVE100),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) IMX_PINCTRL_PIN(MX51_PAD_RESERVE101),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) IMX_PINCTRL_PIN(MX51_PAD_RESERVE102),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) IMX_PINCTRL_PIN(MX51_PAD_RESERVE103),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) IMX_PINCTRL_PIN(MX51_PAD_RESERVE104),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) IMX_PINCTRL_PIN(MX51_PAD_RESERVE105),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) IMX_PINCTRL_PIN(MX51_PAD_RESERVE106),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) IMX_PINCTRL_PIN(MX51_PAD_RESERVE107),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) IMX_PINCTRL_PIN(MX51_PAD_RESERVE108),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) IMX_PINCTRL_PIN(MX51_PAD_RESERVE109),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) IMX_PINCTRL_PIN(MX51_PAD_RESERVE110),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) IMX_PINCTRL_PIN(MX51_PAD_RESERVE111),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) IMX_PINCTRL_PIN(MX51_PAD_RESERVE112),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) IMX_PINCTRL_PIN(MX51_PAD_RESERVE113),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) IMX_PINCTRL_PIN(MX51_PAD_RESERVE114),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) IMX_PINCTRL_PIN(MX51_PAD_RESERVE115),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) IMX_PINCTRL_PIN(MX51_PAD_RESERVE116),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) IMX_PINCTRL_PIN(MX51_PAD_RESERVE117),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) IMX_PINCTRL_PIN(MX51_PAD_RESERVE118),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) IMX_PINCTRL_PIN(MX51_PAD_RESERVE119),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) IMX_PINCTRL_PIN(MX51_PAD_RESERVE120),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) IMX_PINCTRL_PIN(MX51_PAD_RESERVE121),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) IMX_PINCTRL_PIN(MX51_PAD_CSI1_PIXCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) IMX_PINCTRL_PIN(MX51_PAD_CSI1_MCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static const struct imx_pinctrl_soc_info imx51_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .pins = imx51_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .npins = ARRAY_SIZE(imx51_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static const struct of_device_id imx51_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) { .compatible = "fsl,imx51-iomuxc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static int imx51_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) return imx_pinctrl_probe(pdev, &imx51_pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static struct platform_driver imx51_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .name = "imx51-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .of_match_table = imx51_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .probe = imx51_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static int __init imx51_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return platform_driver_register(&imx51_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) arch_initcall(imx51_pinctrl_init);