^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Freescale i.MX28 pinctrl driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Author: Shawn Guo <shawn.guo@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright 2012 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pinctrl-mxs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) enum imx28_pin_enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) GPMI_D00 = PINID(0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) GPMI_D01 = PINID(0, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) GPMI_D02 = PINID(0, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) GPMI_D03 = PINID(0, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) GPMI_D04 = PINID(0, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) GPMI_D05 = PINID(0, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) GPMI_D06 = PINID(0, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) GPMI_D07 = PINID(0, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) GPMI_CE0N = PINID(0, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) GPMI_CE1N = PINID(0, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) GPMI_CE2N = PINID(0, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) GPMI_CE3N = PINID(0, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) GPMI_RDY0 = PINID(0, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) GPMI_RDY1 = PINID(0, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) GPMI_RDY2 = PINID(0, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) GPMI_RDY3 = PINID(0, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) GPMI_RDN = PINID(0, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) GPMI_WRN = PINID(0, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) GPMI_ALE = PINID(0, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) GPMI_CLE = PINID(0, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) GPMI_RESETN = PINID(0, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) LCD_D00 = PINID(1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) LCD_D01 = PINID(1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) LCD_D02 = PINID(1, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) LCD_D03 = PINID(1, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) LCD_D04 = PINID(1, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) LCD_D05 = PINID(1, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) LCD_D06 = PINID(1, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) LCD_D07 = PINID(1, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) LCD_D08 = PINID(1, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) LCD_D09 = PINID(1, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) LCD_D10 = PINID(1, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) LCD_D11 = PINID(1, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) LCD_D12 = PINID(1, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) LCD_D13 = PINID(1, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) LCD_D14 = PINID(1, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) LCD_D15 = PINID(1, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) LCD_D16 = PINID(1, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) LCD_D17 = PINID(1, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) LCD_D18 = PINID(1, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) LCD_D19 = PINID(1, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) LCD_D20 = PINID(1, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) LCD_D21 = PINID(1, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) LCD_D22 = PINID(1, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) LCD_D23 = PINID(1, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) LCD_RD_E = PINID(1, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) LCD_WR_RWN = PINID(1, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) LCD_RS = PINID(1, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) LCD_CS = PINID(1, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) LCD_VSYNC = PINID(1, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) LCD_HSYNC = PINID(1, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) LCD_DOTCLK = PINID(1, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) LCD_ENABLE = PINID(1, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) SSP0_DATA0 = PINID(2, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SSP0_DATA1 = PINID(2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) SSP0_DATA2 = PINID(2, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) SSP0_DATA3 = PINID(2, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) SSP0_DATA4 = PINID(2, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) SSP0_DATA5 = PINID(2, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) SSP0_DATA6 = PINID(2, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) SSP0_DATA7 = PINID(2, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) SSP0_CMD = PINID(2, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) SSP0_DETECT = PINID(2, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) SSP0_SCK = PINID(2, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) SSP1_SCK = PINID(2, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) SSP1_CMD = PINID(2, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) SSP1_DATA0 = PINID(2, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) SSP1_DATA3 = PINID(2, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) SSP2_SCK = PINID(2, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) SSP2_MOSI = PINID(2, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SSP2_MISO = PINID(2, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) SSP2_SS0 = PINID(2, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) SSP2_SS1 = PINID(2, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) SSP2_SS2 = PINID(2, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) SSP3_SCK = PINID(2, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) SSP3_MOSI = PINID(2, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) SSP3_MISO = PINID(2, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) SSP3_SS0 = PINID(2, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) AUART0_RX = PINID(3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) AUART0_TX = PINID(3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) AUART0_CTS = PINID(3, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) AUART0_RTS = PINID(3, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) AUART1_RX = PINID(3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) AUART1_TX = PINID(3, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) AUART1_CTS = PINID(3, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) AUART1_RTS = PINID(3, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) AUART2_RX = PINID(3, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) AUART2_TX = PINID(3, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) AUART2_CTS = PINID(3, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) AUART2_RTS = PINID(3, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) AUART3_RX = PINID(3, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) AUART3_TX = PINID(3, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) AUART3_CTS = PINID(3, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) AUART3_RTS = PINID(3, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PWM0 = PINID(3, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PWM1 = PINID(3, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PWM2 = PINID(3, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SAIF0_MCLK = PINID(3, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SAIF0_LRCLK = PINID(3, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SAIF0_BITCLK = PINID(3, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) SAIF0_SDATA0 = PINID(3, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) I2C0_SCL = PINID(3, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) I2C0_SDA = PINID(3, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) SAIF1_SDATA0 = PINID(3, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) SPDIF = PINID(3, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) PWM3 = PINID(3, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) PWM4 = PINID(3, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) LCD_RESET = PINID(3, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ENET0_MDC = PINID(4, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ENET0_MDIO = PINID(4, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ENET0_RX_EN = PINID(4, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ENET0_RXD0 = PINID(4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ENET0_RXD1 = PINID(4, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ENET0_TX_CLK = PINID(4, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ENET0_TX_EN = PINID(4, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ENET0_TXD0 = PINID(4, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ENET0_TXD1 = PINID(4, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ENET0_RXD2 = PINID(4, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ENET0_RXD3 = PINID(4, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ENET0_TXD2 = PINID(4, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ENET0_TXD3 = PINID(4, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ENET0_RX_CLK = PINID(4, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ENET0_COL = PINID(4, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ENET0_CRS = PINID(4, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ENET_CLK = PINID(4, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) JTAG_RTCK = PINID(4, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) EMI_D00 = PINID(5, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) EMI_D01 = PINID(5, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) EMI_D02 = PINID(5, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) EMI_D03 = PINID(5, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) EMI_D04 = PINID(5, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) EMI_D05 = PINID(5, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) EMI_D06 = PINID(5, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) EMI_D07 = PINID(5, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) EMI_D08 = PINID(5, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) EMI_D09 = PINID(5, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) EMI_D10 = PINID(5, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) EMI_D11 = PINID(5, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) EMI_D12 = PINID(5, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) EMI_D13 = PINID(5, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) EMI_D14 = PINID(5, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) EMI_D15 = PINID(5, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) EMI_ODT0 = PINID(5, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) EMI_DQM0 = PINID(5, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) EMI_ODT1 = PINID(5, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) EMI_DQM1 = PINID(5, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) EMI_DDR_OPEN_FB = PINID(5, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) EMI_CLK = PINID(5, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) EMI_DQS0 = PINID(5, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) EMI_DQS1 = PINID(5, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) EMI_DDR_OPEN = PINID(5, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) EMI_A00 = PINID(6, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) EMI_A01 = PINID(6, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) EMI_A02 = PINID(6, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) EMI_A03 = PINID(6, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) EMI_A04 = PINID(6, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) EMI_A05 = PINID(6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) EMI_A06 = PINID(6, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) EMI_A07 = PINID(6, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) EMI_A08 = PINID(6, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) EMI_A09 = PINID(6, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) EMI_A10 = PINID(6, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) EMI_A11 = PINID(6, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) EMI_A12 = PINID(6, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) EMI_A13 = PINID(6, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) EMI_A14 = PINID(6, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) EMI_BA0 = PINID(6, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) EMI_BA1 = PINID(6, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) EMI_BA2 = PINID(6, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) EMI_CASN = PINID(6, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) EMI_RASN = PINID(6, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) EMI_WEN = PINID(6, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) EMI_CE0N = PINID(6, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) EMI_CE1N = PINID(6, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) EMI_CKE = PINID(6, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static const struct pinctrl_pin_desc imx28_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MXS_PINCTRL_PIN(GPMI_D00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MXS_PINCTRL_PIN(GPMI_D01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MXS_PINCTRL_PIN(GPMI_D02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MXS_PINCTRL_PIN(GPMI_D03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MXS_PINCTRL_PIN(GPMI_D04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MXS_PINCTRL_PIN(GPMI_D05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MXS_PINCTRL_PIN(GPMI_D06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MXS_PINCTRL_PIN(GPMI_D07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MXS_PINCTRL_PIN(GPMI_CE0N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MXS_PINCTRL_PIN(GPMI_CE1N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MXS_PINCTRL_PIN(GPMI_CE2N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MXS_PINCTRL_PIN(GPMI_CE3N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MXS_PINCTRL_PIN(GPMI_RDY0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MXS_PINCTRL_PIN(GPMI_RDY1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MXS_PINCTRL_PIN(GPMI_RDY2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MXS_PINCTRL_PIN(GPMI_RDY3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MXS_PINCTRL_PIN(GPMI_RDN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) MXS_PINCTRL_PIN(GPMI_WRN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) MXS_PINCTRL_PIN(GPMI_ALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) MXS_PINCTRL_PIN(GPMI_CLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) MXS_PINCTRL_PIN(GPMI_RESETN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) MXS_PINCTRL_PIN(LCD_D00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MXS_PINCTRL_PIN(LCD_D01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MXS_PINCTRL_PIN(LCD_D02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MXS_PINCTRL_PIN(LCD_D03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) MXS_PINCTRL_PIN(LCD_D04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) MXS_PINCTRL_PIN(LCD_D05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MXS_PINCTRL_PIN(LCD_D06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MXS_PINCTRL_PIN(LCD_D07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MXS_PINCTRL_PIN(LCD_D08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MXS_PINCTRL_PIN(LCD_D09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MXS_PINCTRL_PIN(LCD_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) MXS_PINCTRL_PIN(LCD_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) MXS_PINCTRL_PIN(LCD_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MXS_PINCTRL_PIN(LCD_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) MXS_PINCTRL_PIN(LCD_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MXS_PINCTRL_PIN(LCD_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MXS_PINCTRL_PIN(LCD_D16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) MXS_PINCTRL_PIN(LCD_D17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MXS_PINCTRL_PIN(LCD_D18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MXS_PINCTRL_PIN(LCD_D19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) MXS_PINCTRL_PIN(LCD_D20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) MXS_PINCTRL_PIN(LCD_D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MXS_PINCTRL_PIN(LCD_D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) MXS_PINCTRL_PIN(LCD_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) MXS_PINCTRL_PIN(LCD_RD_E),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) MXS_PINCTRL_PIN(LCD_WR_RWN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) MXS_PINCTRL_PIN(LCD_RS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MXS_PINCTRL_PIN(LCD_CS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) MXS_PINCTRL_PIN(LCD_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MXS_PINCTRL_PIN(LCD_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MXS_PINCTRL_PIN(LCD_DOTCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MXS_PINCTRL_PIN(LCD_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MXS_PINCTRL_PIN(SSP0_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MXS_PINCTRL_PIN(SSP0_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) MXS_PINCTRL_PIN(SSP0_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) MXS_PINCTRL_PIN(SSP0_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MXS_PINCTRL_PIN(SSP0_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) MXS_PINCTRL_PIN(SSP0_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) MXS_PINCTRL_PIN(SSP0_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) MXS_PINCTRL_PIN(SSP0_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) MXS_PINCTRL_PIN(SSP0_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) MXS_PINCTRL_PIN(SSP0_DETECT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) MXS_PINCTRL_PIN(SSP0_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) MXS_PINCTRL_PIN(SSP1_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MXS_PINCTRL_PIN(SSP1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MXS_PINCTRL_PIN(SSP1_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MXS_PINCTRL_PIN(SSP1_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MXS_PINCTRL_PIN(SSP2_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MXS_PINCTRL_PIN(SSP2_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MXS_PINCTRL_PIN(SSP2_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) MXS_PINCTRL_PIN(SSP2_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MXS_PINCTRL_PIN(SSP2_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MXS_PINCTRL_PIN(SSP2_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MXS_PINCTRL_PIN(SSP3_SCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MXS_PINCTRL_PIN(SSP3_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) MXS_PINCTRL_PIN(SSP3_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) MXS_PINCTRL_PIN(SSP3_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MXS_PINCTRL_PIN(AUART0_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) MXS_PINCTRL_PIN(AUART0_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MXS_PINCTRL_PIN(AUART0_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MXS_PINCTRL_PIN(AUART0_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MXS_PINCTRL_PIN(AUART1_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) MXS_PINCTRL_PIN(AUART1_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MXS_PINCTRL_PIN(AUART1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MXS_PINCTRL_PIN(AUART1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MXS_PINCTRL_PIN(AUART2_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) MXS_PINCTRL_PIN(AUART2_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) MXS_PINCTRL_PIN(AUART2_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MXS_PINCTRL_PIN(AUART2_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) MXS_PINCTRL_PIN(AUART3_RX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) MXS_PINCTRL_PIN(AUART3_TX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) MXS_PINCTRL_PIN(AUART3_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MXS_PINCTRL_PIN(AUART3_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) MXS_PINCTRL_PIN(PWM0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MXS_PINCTRL_PIN(PWM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MXS_PINCTRL_PIN(PWM2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MXS_PINCTRL_PIN(SAIF0_MCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) MXS_PINCTRL_PIN(SAIF0_LRCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) MXS_PINCTRL_PIN(SAIF0_BITCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) MXS_PINCTRL_PIN(SAIF0_SDATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MXS_PINCTRL_PIN(I2C0_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) MXS_PINCTRL_PIN(I2C0_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) MXS_PINCTRL_PIN(SAIF1_SDATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MXS_PINCTRL_PIN(SPDIF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MXS_PINCTRL_PIN(PWM3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) MXS_PINCTRL_PIN(PWM4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MXS_PINCTRL_PIN(LCD_RESET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) MXS_PINCTRL_PIN(ENET0_MDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MXS_PINCTRL_PIN(ENET0_MDIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MXS_PINCTRL_PIN(ENET0_RX_EN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) MXS_PINCTRL_PIN(ENET0_RXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) MXS_PINCTRL_PIN(ENET0_RXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) MXS_PINCTRL_PIN(ENET0_TX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) MXS_PINCTRL_PIN(ENET0_TX_EN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MXS_PINCTRL_PIN(ENET0_TXD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) MXS_PINCTRL_PIN(ENET0_TXD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MXS_PINCTRL_PIN(ENET0_RXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) MXS_PINCTRL_PIN(ENET0_RXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MXS_PINCTRL_PIN(ENET0_TXD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MXS_PINCTRL_PIN(ENET0_TXD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) MXS_PINCTRL_PIN(ENET0_RX_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) MXS_PINCTRL_PIN(ENET0_COL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MXS_PINCTRL_PIN(ENET0_CRS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) MXS_PINCTRL_PIN(ENET_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) MXS_PINCTRL_PIN(JTAG_RTCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) MXS_PINCTRL_PIN(EMI_D00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) MXS_PINCTRL_PIN(EMI_D01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MXS_PINCTRL_PIN(EMI_D02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MXS_PINCTRL_PIN(EMI_D03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MXS_PINCTRL_PIN(EMI_D04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MXS_PINCTRL_PIN(EMI_D05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MXS_PINCTRL_PIN(EMI_D06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MXS_PINCTRL_PIN(EMI_D07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MXS_PINCTRL_PIN(EMI_D08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MXS_PINCTRL_PIN(EMI_D09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MXS_PINCTRL_PIN(EMI_D10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MXS_PINCTRL_PIN(EMI_D11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MXS_PINCTRL_PIN(EMI_D12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MXS_PINCTRL_PIN(EMI_D13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MXS_PINCTRL_PIN(EMI_D14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MXS_PINCTRL_PIN(EMI_D15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MXS_PINCTRL_PIN(EMI_ODT0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MXS_PINCTRL_PIN(EMI_DQM0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) MXS_PINCTRL_PIN(EMI_ODT1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MXS_PINCTRL_PIN(EMI_DQM1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MXS_PINCTRL_PIN(EMI_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MXS_PINCTRL_PIN(EMI_DQS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MXS_PINCTRL_PIN(EMI_DQS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MXS_PINCTRL_PIN(EMI_DDR_OPEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MXS_PINCTRL_PIN(EMI_A00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MXS_PINCTRL_PIN(EMI_A01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MXS_PINCTRL_PIN(EMI_A02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MXS_PINCTRL_PIN(EMI_A03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MXS_PINCTRL_PIN(EMI_A04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MXS_PINCTRL_PIN(EMI_A05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MXS_PINCTRL_PIN(EMI_A06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MXS_PINCTRL_PIN(EMI_A07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) MXS_PINCTRL_PIN(EMI_A08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MXS_PINCTRL_PIN(EMI_A09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MXS_PINCTRL_PIN(EMI_A10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MXS_PINCTRL_PIN(EMI_A11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) MXS_PINCTRL_PIN(EMI_A12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) MXS_PINCTRL_PIN(EMI_A13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) MXS_PINCTRL_PIN(EMI_A14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) MXS_PINCTRL_PIN(EMI_BA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) MXS_PINCTRL_PIN(EMI_BA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) MXS_PINCTRL_PIN(EMI_BA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) MXS_PINCTRL_PIN(EMI_CASN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) MXS_PINCTRL_PIN(EMI_RASN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) MXS_PINCTRL_PIN(EMI_WEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) MXS_PINCTRL_PIN(EMI_CE0N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) MXS_PINCTRL_PIN(EMI_CE1N),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) MXS_PINCTRL_PIN(EMI_CKE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static const struct mxs_regs imx28_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .muxsel = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .drive = 0x300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .pull = 0x600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static struct mxs_pinctrl_soc_data imx28_pinctrl_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .regs = &imx28_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .pins = imx28_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .npins = ARRAY_SIZE(imx28_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static int imx28_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return mxs_pinctrl_probe(pdev, &imx28_pinctrl_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static const struct of_device_id imx28_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) { .compatible = "fsl,imx28-pinctrl", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static struct platform_driver imx28_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .name = "imx28-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .of_match_table = imx28_pinctrl_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .probe = imx28_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static int __init imx28_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return platform_driver_register(&imx28_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) postcore_initcall(imx28_pinctrl_init);