^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // imx27 pinctrl driver based on imx pinmux core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2013 Pengutronix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Author: Markus Pargmann <mpa@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "pinctrl-imx1.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PAD_ID(port, pin) (port*32 + pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PD 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PF 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum imx27_pads {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MX27_PAD_USBH2_CLK = PAD_ID(PA, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MX27_PAD_USBH2_DIR = PAD_ID(PA, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MX27_PAD_USBH2_NXT = PAD_ID(PA, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MX27_PAD_USBH2_STP = PAD_ID(PA, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) MX27_PAD_LSCLK = PAD_ID(PA, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MX27_PAD_LD0 = PAD_ID(PA, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MX27_PAD_LD1 = PAD_ID(PA, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MX27_PAD_LD2 = PAD_ID(PA, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MX27_PAD_LD3 = PAD_ID(PA, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MX27_PAD_LD4 = PAD_ID(PA, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MX27_PAD_LD5 = PAD_ID(PA, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) MX27_PAD_LD6 = PAD_ID(PA, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MX27_PAD_LD7 = PAD_ID(PA, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MX27_PAD_LD8 = PAD_ID(PA, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MX27_PAD_LD9 = PAD_ID(PA, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MX27_PAD_LD10 = PAD_ID(PA, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MX27_PAD_LD11 = PAD_ID(PA, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MX27_PAD_LD12 = PAD_ID(PA, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) MX27_PAD_LD13 = PAD_ID(PA, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MX27_PAD_LD14 = PAD_ID(PA, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MX27_PAD_LD15 = PAD_ID(PA, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) MX27_PAD_LD16 = PAD_ID(PA, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) MX27_PAD_LD17 = PAD_ID(PA, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) MX27_PAD_REV = PAD_ID(PA, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MX27_PAD_CLS = PAD_ID(PA, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MX27_PAD_PS = PAD_ID(PA, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MX27_PAD_SPL_SPR = PAD_ID(PA, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) MX27_PAD_HSYNC = PAD_ID(PA, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) MX27_PAD_VSYNC = PAD_ID(PA, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MX27_PAD_CONTRAST = PAD_ID(PA, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MX27_PAD_OE_ACD = PAD_ID(PA, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MX27_PAD_SD2_D0 = PAD_ID(PB, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MX27_PAD_SD2_D1 = PAD_ID(PB, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MX27_PAD_SD2_D2 = PAD_ID(PB, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MX27_PAD_SD2_D3 = PAD_ID(PB, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MX27_PAD_SD2_CMD = PAD_ID(PB, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MX27_PAD_SD2_CLK = PAD_ID(PB, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MX27_PAD_CSI_D0 = PAD_ID(PB, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MX27_PAD_CSI_D1 = PAD_ID(PB, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MX27_PAD_CSI_D2 = PAD_ID(PB, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MX27_PAD_CSI_D3 = PAD_ID(PB, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MX27_PAD_CSI_D4 = PAD_ID(PB, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MX27_PAD_CSI_MCLK = PAD_ID(PB, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MX27_PAD_CSI_D5 = PAD_ID(PB, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MX27_PAD_CSI_D6 = PAD_ID(PB, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MX27_PAD_CSI_D7 = PAD_ID(PB, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MX27_PAD_USB_PWR = PAD_ID(PB, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MX27_PAD_USB_OC_B = PAD_ID(PB, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MX27_PAD_USBH1_RCV = PAD_ID(PB, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MX27_PAD_USBH1_FS = PAD_ID(PB, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MX27_PAD_I2C2_SDA = PAD_ID(PC, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MX27_PAD_I2C2_SCL = PAD_ID(PC, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MX27_PAD_TOUT = PAD_ID(PC, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MX27_PAD_TIN = PAD_ID(PC, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MX27_PAD_SSI4_FS = PAD_ID(PC, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MX27_PAD_SSI4_CLK = PAD_ID(PC, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MX27_PAD_SSI1_FS = PAD_ID(PC, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MX27_PAD_SSI1_CLK = PAD_ID(PC, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MX27_PAD_SSI2_FS = PAD_ID(PC, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MX27_PAD_SSI2_CLK = PAD_ID(PC, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MX27_PAD_SSI3_FS = PAD_ID(PC, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MX27_PAD_SSI3_CLK = PAD_ID(PC, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MX27_PAD_SD3_CMD = PAD_ID(PD, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MX27_PAD_SD3_CLK = PAD_ID(PD, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) MX27_PAD_I2C_DATA = PAD_ID(PD, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) MX27_PAD_I2C_CLK = PAD_ID(PD, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) MX27_PAD_PWMO = PAD_ID(PE, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MX27_PAD_UART3_RXD = PAD_ID(PE, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MX27_PAD_UART3_CTS = PAD_ID(PE, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MX27_PAD_UART3_RTS = PAD_ID(PE, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MX27_PAD_UART1_TXD = PAD_ID(PE, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MX27_PAD_UART1_RXD = PAD_ID(PE, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MX27_PAD_UART1_CTS = PAD_ID(PE, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MX27_PAD_UART1_RTS = PAD_ID(PE, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) MX27_PAD_RTCK = PAD_ID(PE, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) MX27_PAD_SD1_D0 = PAD_ID(PE, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) MX27_PAD_SD1_D1 = PAD_ID(PE, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) MX27_PAD_SD1_D2 = PAD_ID(PE, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) MX27_PAD_SD1_D3 = PAD_ID(PE, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) MX27_PAD_SD1_CMD = PAD_ID(PE, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) MX27_PAD_SD1_CLK = PAD_ID(PE, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) MX27_PAD_NFRB = PAD_ID(PF, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MX27_PAD_NFCLE = PAD_ID(PF, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MX27_PAD_NFWP_B = PAD_ID(PF, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MX27_PAD_NFCE_B = PAD_ID(PF, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MX27_PAD_NFALE = PAD_ID(PF, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MX27_PAD_NFRE_B = PAD_ID(PF, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MX27_PAD_NFWE_B = PAD_ID(PF, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MX27_PAD_PC_POE = PAD_ID(PF, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MX27_PAD_PC_RW_B = PAD_ID(PF, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MX27_PAD_IOIS16 = PAD_ID(PF, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) MX27_PAD_PC_RST = PAD_ID(PF, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MX27_PAD_PC_BVD2 = PAD_ID(PF, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MX27_PAD_PC_BVD1 = PAD_ID(PF, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) MX27_PAD_PC_VS2 = PAD_ID(PF, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MX27_PAD_PC_VS1 = PAD_ID(PF, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MX27_PAD_CLKO = PAD_ID(PF, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MX27_PAD_PC_PWRON = PAD_ID(PF, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MX27_PAD_PC_READY = PAD_ID(PF, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MX27_PAD_PC_CD2_B = PAD_ID(PF, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MX27_PAD_PC_CD1_B = PAD_ID(PF, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MX27_PAD_CS4_B = PAD_ID(PF, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MX27_PAD_CS5_B = PAD_ID(PF, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Pad names for the pinmux subsystem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) IMX_PINCTRL_PIN(MX27_PAD_LSCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) IMX_PINCTRL_PIN(MX27_PAD_LD0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) IMX_PINCTRL_PIN(MX27_PAD_LD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) IMX_PINCTRL_PIN(MX27_PAD_LD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) IMX_PINCTRL_PIN(MX27_PAD_LD3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) IMX_PINCTRL_PIN(MX27_PAD_LD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) IMX_PINCTRL_PIN(MX27_PAD_LD5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IMX_PINCTRL_PIN(MX27_PAD_LD6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) IMX_PINCTRL_PIN(MX27_PAD_LD7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) IMX_PINCTRL_PIN(MX27_PAD_LD8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) IMX_PINCTRL_PIN(MX27_PAD_LD9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) IMX_PINCTRL_PIN(MX27_PAD_LD10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) IMX_PINCTRL_PIN(MX27_PAD_LD11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IMX_PINCTRL_PIN(MX27_PAD_LD12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) IMX_PINCTRL_PIN(MX27_PAD_LD13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) IMX_PINCTRL_PIN(MX27_PAD_LD14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) IMX_PINCTRL_PIN(MX27_PAD_LD15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) IMX_PINCTRL_PIN(MX27_PAD_LD16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) IMX_PINCTRL_PIN(MX27_PAD_LD17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IMX_PINCTRL_PIN(MX27_PAD_REV),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IMX_PINCTRL_PIN(MX27_PAD_CLS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) IMX_PINCTRL_PIN(MX27_PAD_PS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) IMX_PINCTRL_PIN(MX27_PAD_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) IMX_PINCTRL_PIN(MX27_PAD_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) IMX_PINCTRL_PIN(MX27_PAD_CONTRAST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) IMX_PINCTRL_PIN(MX27_PAD_OE_ACD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) IMX_PINCTRL_PIN(MX27_PAD_SD2_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) IMX_PINCTRL_PIN(MX27_PAD_SD2_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) IMX_PINCTRL_PIN(MX27_PAD_SD2_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) IMX_PINCTRL_PIN(MX27_PAD_SD2_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) IMX_PINCTRL_PIN(MX27_PAD_CSI_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) IMX_PINCTRL_PIN(MX27_PAD_CSI_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) IMX_PINCTRL_PIN(MX27_PAD_CSI_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) IMX_PINCTRL_PIN(MX27_PAD_CSI_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) IMX_PINCTRL_PIN(MX27_PAD_CSI_D4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) IMX_PINCTRL_PIN(MX27_PAD_CSI_D5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) IMX_PINCTRL_PIN(MX27_PAD_CSI_D6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) IMX_PINCTRL_PIN(MX27_PAD_CSI_D7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) IMX_PINCTRL_PIN(MX27_PAD_USB_PWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) IMX_PINCTRL_PIN(MX27_PAD_TOUT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) IMX_PINCTRL_PIN(MX27_PAD_TIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) IMX_PINCTRL_PIN(MX27_PAD_PWMO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) IMX_PINCTRL_PIN(MX27_PAD_RTCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) IMX_PINCTRL_PIN(MX27_PAD_SD1_D0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) IMX_PINCTRL_PIN(MX27_PAD_SD1_D1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) IMX_PINCTRL_PIN(MX27_PAD_SD1_D2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) IMX_PINCTRL_PIN(MX27_PAD_SD1_D3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) IMX_PINCTRL_PIN(MX27_PAD_NFRB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) IMX_PINCTRL_PIN(MX27_PAD_NFCLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) IMX_PINCTRL_PIN(MX27_PAD_NFWP_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) IMX_PINCTRL_PIN(MX27_PAD_NFCE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) IMX_PINCTRL_PIN(MX27_PAD_NFALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) IMX_PINCTRL_PIN(MX27_PAD_NFRE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) IMX_PINCTRL_PIN(MX27_PAD_NFWE_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) IMX_PINCTRL_PIN(MX27_PAD_PC_POE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) IMX_PINCTRL_PIN(MX27_PAD_IOIS16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) IMX_PINCTRL_PIN(MX27_PAD_PC_RST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) IMX_PINCTRL_PIN(MX27_PAD_PC_VS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) IMX_PINCTRL_PIN(MX27_PAD_PC_VS1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) IMX_PINCTRL_PIN(MX27_PAD_CLKO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) IMX_PINCTRL_PIN(MX27_PAD_PC_READY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) IMX_PINCTRL_PIN(MX27_PAD_CS4_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) IMX_PINCTRL_PIN(MX27_PAD_CS5_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static struct imx1_pinctrl_soc_info imx27_pinctrl_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .pins = imx27_pinctrl_pads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .npins = ARRAY_SIZE(imx27_pinctrl_pads),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) static const struct of_device_id imx27_pinctrl_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) { .compatible = "fsl,imx27-iomuxc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static int imx27_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static struct platform_driver imx27_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .name = "imx27-pinctrl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .of_match_table = of_match_ptr(imx27_pinctrl_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .probe = imx27_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int __init imx27_pinctrl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return platform_driver_register(&imx27_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) arch_initcall(imx27_pinctrl_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags