Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2018 Rafał Miłecki <rafal@milecki.pl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/pinctrl/pinconf-generic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/pinctrl/pinctrl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/pinctrl/pinmux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define FLAG_BCM4708		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define FLAG_BCM4709		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define FLAG_BCM53012		BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) struct ns_pinctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	unsigned int chipset_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct pinctrl_dev *pctldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct pinctrl_desc pctldesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct ns_pinctrl_group *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	unsigned int num_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct ns_pinctrl_function *functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	unsigned int num_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * Pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static const struct pinctrl_pin_desc ns_pinctrl_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	{ 0, "spi_clk", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	{ 1, "spi_ss", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{ 2, "spi_mosi", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	{ 3, "spi_miso", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	{ 4, "i2c_scl", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	{ 5, "i2c_sda", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	{ 6, "mdc", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	{ 7, "mdio", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	{ 8, "pwm0", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	{ 9, "pwm1", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	{ 10, "pwm2", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	{ 11, "pwm3", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	{ 12, "uart1_rx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	{ 13, "uart1_tx", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{ 14, "uart1_cts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	{ 15, "uart1_rts", (void *)(FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	{ 16, "uart2_rx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	{ 17, "uart2_tx", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /* TODO { ??, "xtal_out", (void *)(FLAG_BCM4709) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	{ 22, "sdio_pwr", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	{ 23, "sdio_en_1p8v", (void *)(FLAG_BCM4709 | FLAG_BCM53012) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * Groups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) struct ns_pinctrl_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	const unsigned int *pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	const unsigned int num_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	unsigned int chipsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static const unsigned int spi_pins[] = { 0, 1, 2, 3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static const unsigned int i2c_pins[] = { 4, 5 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static const unsigned int mdio_pins[] = { 6, 7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static const unsigned int pwm0_pins[] = { 8 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static const unsigned int pwm1_pins[] = { 9 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static const unsigned int pwm2_pins[] = { 10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static const unsigned int pwm3_pins[] = { 11 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static const unsigned int uart1_pins[] = { 12, 13, 14, 15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static const unsigned int uart2_pins[] = { 16, 17 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) static const unsigned int sdio_pwr_pins[] = { 22 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static const unsigned int sdio_1p8v_pins[] = { 23 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define NS_GROUP(_name, _pins, _chipsets)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.name = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.pins = _pins,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.num_pins = ARRAY_SIZE(_pins),			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	.chipsets = _chipsets,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static const struct ns_pinctrl_group ns_pinctrl_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	NS_GROUP("spi_grp", spi_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	NS_GROUP("i2c_grp", i2c_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	NS_GROUP("mdio_grp", mdio_pins, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	NS_GROUP("pwm0_grp", pwm0_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	NS_GROUP("pwm1_grp", pwm1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	NS_GROUP("pwm2_grp", pwm2_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	NS_GROUP("pwm3_grp", pwm3_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	NS_GROUP("uart1_grp", uart1_pins, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	NS_GROUP("uart2_grp", uart2_pins, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	NS_GROUP("sdio_pwr_grp", sdio_pwr_pins, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	NS_GROUP("sdio_1p8v_grp", sdio_1p8v_pins, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * Functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct ns_pinctrl_function {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	const char * const *groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	const unsigned int num_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	unsigned int chipsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const char * const spi_groups[] = { "spi_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static const char * const i2c_groups[] = { "i2c_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const char * const mdio_groups[] = { "mdio_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static const char * const pwm_groups[] = { "pwm0_grp", "pwm1_grp", "pwm2_grp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 					   "pwm3_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static const char * const uart1_groups[] = { "uart1_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const char * const uart2_groups[] = { "uart2_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const char * const sdio_groups[] = { "sdio_pwr_grp", "sdio_1p8v_grp" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define NS_FUNCTION(_name, _groups, _chipsets)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.name = _name,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.groups = _groups,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.num_groups = ARRAY_SIZE(_groups),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.chipsets = _chipsets,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static const struct ns_pinctrl_function ns_pinctrl_functions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	NS_FUNCTION("spi", spi_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	NS_FUNCTION("i2c", i2c_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	NS_FUNCTION("mdio", mdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	NS_FUNCTION("pwm", pwm_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	NS_FUNCTION("uart1", uart1_groups, FLAG_BCM4708 | FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	NS_FUNCTION("uart2", uart2_groups, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	NS_FUNCTION("sdio", sdio_groups, FLAG_BCM4709 | FLAG_BCM53012),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  * Groups code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int ns_pinctrl_get_groups_count(struct pinctrl_dev *pctrl_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	return ns_pinctrl->num_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const char *ns_pinctrl_get_group_name(struct pinctrl_dev *pctrl_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 					     unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	return ns_pinctrl->groups[selector].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int ns_pinctrl_get_group_pins(struct pinctrl_dev *pctrl_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 				     unsigned int selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 				     const unsigned int **pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 				     unsigned int *num_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	*pins = ns_pinctrl->groups[selector].pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	*num_pins = ns_pinctrl->groups[selector].num_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static const struct pinctrl_ops ns_pinctrl_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.get_groups_count = ns_pinctrl_get_groups_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.get_group_name = ns_pinctrl_get_group_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.get_group_pins = ns_pinctrl_get_group_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.dt_node_to_map = pinconf_generic_dt_node_to_map_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.dt_free_map = pinconf_generic_dt_free_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  * Functions code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int ns_pinctrl_get_functions_count(struct pinctrl_dev *pctrl_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return ns_pinctrl->num_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static const char *ns_pinctrl_get_function_name(struct pinctrl_dev *pctrl_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 						unsigned int selector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	return ns_pinctrl->functions[selector].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int ns_pinctrl_get_function_groups(struct pinctrl_dev *pctrl_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 					  unsigned int selector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 					  const char * const **groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 					  unsigned * const num_groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	*groups = ns_pinctrl->functions[selector].groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	*num_groups = ns_pinctrl->functions[selector].num_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int ns_pinctrl_set_mux(struct pinctrl_dev *pctrl_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			      unsigned int func_select,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			      unsigned int grp_select)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	struct ns_pinctrl *ns_pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	u32 unset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	u32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	for (i = 0; i < ns_pinctrl->groups[grp_select].num_pins; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		int pin_number = ns_pinctrl->groups[grp_select].pins[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		unset |= BIT(pin_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	tmp = readl(ns_pinctrl->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	tmp &= ~unset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	writel(tmp, ns_pinctrl->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static const struct pinmux_ops ns_pinctrl_pmxops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	.get_functions_count = ns_pinctrl_get_functions_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	.get_function_name = ns_pinctrl_get_function_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.get_function_groups = ns_pinctrl_get_function_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.set_mux = ns_pinctrl_set_mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)  * Controller code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static struct pinctrl_desc ns_pinctrl_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.name = "pinctrl-ns",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	.pctlops = &ns_pinctrl_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	.pmxops = &ns_pinctrl_pmxops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const struct of_device_id ns_pinctrl_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	{ .compatible = "brcm,bcm4708-pinmux", .data = (void *)FLAG_BCM4708, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	{ .compatible = "brcm,bcm4709-pinmux", .data = (void *)FLAG_BCM4709, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	{ .compatible = "brcm,bcm53012-pinmux", .data = (void *)FLAG_BCM53012, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int ns_pinctrl_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	const struct of_device_id *of_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct ns_pinctrl *ns_pinctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	struct pinctrl_desc *pctldesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	struct pinctrl_pin_desc *pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct ns_pinctrl_group *group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct ns_pinctrl_function *function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	if (!ns_pinctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	pctldesc = &ns_pinctrl->pctldesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	platform_set_drvdata(pdev, ns_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	/* Set basic properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	ns_pinctrl->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	of_id = of_match_device(ns_pinctrl_of_match_table, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (!of_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	ns_pinctrl->chipset_flag = (uintptr_t)of_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 					   "cru_gpio_control");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	ns_pinctrl->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	if (IS_ERR(ns_pinctrl->base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		dev_err(dev, "Failed to map pinctrl regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		return PTR_ERR(ns_pinctrl->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	/* Set pinctrl properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	pctldesc->pins = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 				      sizeof(struct pinctrl_pin_desc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 				      GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (!pctldesc->pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	     i < ARRAY_SIZE(ns_pinctrl_pins); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		const struct pinctrl_pin_desc *src = &ns_pinctrl_pins[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		unsigned int chipsets = (uintptr_t)src->drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		if (chipsets & ns_pinctrl->chipset_flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 			memcpy(pin++, src, sizeof(*src));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 			pctldesc->npins++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	ns_pinctrl->groups = devm_kcalloc(dev, ARRAY_SIZE(ns_pinctrl_groups),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 					  sizeof(struct ns_pinctrl_group),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 					  GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (!ns_pinctrl->groups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	for (i = 0, group = &ns_pinctrl->groups[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	     i < ARRAY_SIZE(ns_pinctrl_groups); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		const struct ns_pinctrl_group *src = &ns_pinctrl_groups[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		if (src->chipsets & ns_pinctrl->chipset_flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			memcpy(group++, src, sizeof(*src));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			ns_pinctrl->num_groups++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	ns_pinctrl->functions = devm_kcalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 					     ARRAY_SIZE(ns_pinctrl_functions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 					     sizeof(struct ns_pinctrl_function),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 					     GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	if (!ns_pinctrl->functions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	for (i = 0, function = &ns_pinctrl->functions[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	     i < ARRAY_SIZE(ns_pinctrl_functions); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		const struct ns_pinctrl_function *src = &ns_pinctrl_functions[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		if (src->chipsets & ns_pinctrl->chipset_flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			memcpy(function++, src, sizeof(*src));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			ns_pinctrl->num_functions++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	/* Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	ns_pinctrl->pctldev = devm_pinctrl_register(dev, pctldesc, ns_pinctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (IS_ERR(ns_pinctrl->pctldev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		dev_err(dev, "Failed to register pinctrl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		return PTR_ERR(ns_pinctrl->pctldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static struct platform_driver ns_pinctrl_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.probe = ns_pinctrl_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		.name = "ns-pinmux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		.of_match_table = ns_pinctrl_of_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) module_platform_driver(ns_pinctrl_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MODULE_AUTHOR("Rafał Miłecki");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) MODULE_DEVICE_TABLE(of, ns_pinctrl_of_match_table);