^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # Broadcom pinctrl drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) config PINCTRL_BCM281XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) bool "Broadcom BCM281xx pinctrl driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select REGMAP_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) default ARCH_BCM_MOBILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) framework. GPIO is provided by a separate GPIO driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) config PINCTRL_BCM2835
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) bool "Broadcom BCM2835 GPIO (with PINCONF) driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) depends on OF && (ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) select PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) select GPIOLIB_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) default ARCH_BCM2835 || ARCH_BRCMSTB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Say Y here to enable the Broadcom BCM2835 GPIO driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) config PINCTRL_IPROC_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bool "Broadcom iProc GPIO (with PINCONF) driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) select GPIOLIB_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) select PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) default ARCH_BCM_IPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Say yes here to enable the Broadcom iProc GPIO driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) same GPIO Controller IP hence this driver could be used for all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) supported by this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) The Broadcom NSP has two GPIO controllers including the ChipcommonA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) GPIO, the ChipcommonB GPIO. Later controller is supported by this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) the ChipcommonG GPIO. Both controllers are supported by this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) The Broadcom Stingray GPIO controllers are supported by this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) All above SoCs GPIO controllers support basic PINCONF functions such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) as bias pull up, pull down, and drive strength configurations, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) these pins are muxed to GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) It provides the framework where pins from the individual GPIO can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) individually muxed to GPIO function, through interaction with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) SoCs IOMUX controller. This features could be used only on SoCs which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) support individual pin muxing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) config PINCTRL_CYGNUS_MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) bool "Broadcom Cygnus IOMUX driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) default ARCH_BCM_CYGNUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Say yes here to enable the Broadcom Cygnus IOMUX driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) The Broadcom Cygnus IOMUX driver supports group based IOMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) configuration, with the exception that certain individual pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) can be overridden to GPIO function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) config PINCTRL_NS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) bool "Broadcom Northstar pins driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) depends on OF && (ARCH_BCM_5301X || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) default ARCH_BCM_5301X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Say yes here to enable the Broadcom NS SoC pins driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) The Broadcom Northstar pins driver supports muxing multi-purpose pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) that can be used for various functions (e.g. SPI, I2C, UART) as well
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) as GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) config PINCTRL_NSP_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) bool "Broadcom NSP GPIO (with PINCONF) driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) select GPIOLIB_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) select PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) default ARCH_BCM_NSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) Say yes here to enable the Broadcom NSP GPIO driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) supported by this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) The ChipcommonA GPIO controller support basic PINCONF functions such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) as bias pull up, pull down, and drive strength configurations, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) these pins are muxed to GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) config PINCTRL_NS2_MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) bool "Broadcom Northstar2 pinmux driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) depends on ARCH_BCM_IPROC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) default ARM64 && ARCH_BCM_IPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Say yes here to enable the Broadcom NS2 MUX driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) The Broadcom Northstar2 IOMUX driver supports group based IOMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) config PINCTRL_NSP_MUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) bool "Broadcom NSP IOMUX driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) depends on (ARCH_BCM_NSP || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) select PINMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) select GENERIC_PINCONF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) default ARCH_BCM_NSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) Say yes here to enable the Broadcom NSP SOC IOMUX driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) configuration, with certain individual pins can be overridden
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) to GPIO function.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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