^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * phy-da8xx-usb - TI DaVinci DA8xx USB PHY driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 David Lechner <david@lechnology.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/da8xx-cfgchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_data/phy-da8xx-usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PHY_INIT_BITS (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct da8xx_usb_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct phy_provider *phy_provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct phy *usb11_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct phy *usb20_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct clk *usb11_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct clk *usb20_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int da8xx_usb11_phy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ret = clk_prepare_enable(d_phy->usb11_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) CFGCHIP2_USB1SUSPENDM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int da8xx_usb11_phy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) clk_disable_unprepare(d_phy->usb11_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const struct phy_ops da8xx_usb11_phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .power_on = da8xx_usb11_phy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .power_off = da8xx_usb11_phy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int da8xx_usb20_phy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ret = clk_prepare_enable(d_phy->usb20_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int da8xx_usb20_phy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGPWRDN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) CFGCHIP2_OTGPWRDN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) clk_disable_unprepare(d_phy->usb20_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int da8xx_usb20_phy_set_mode(struct phy *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) enum phy_mode mode, int submode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct da8xx_usb_phy *d_phy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) case PHY_MODE_USB_HOST: /* Force VBUS valid, ID = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) val = CFGCHIP2_OTGMODE_FORCE_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case PHY_MODE_USB_DEVICE: /* Force VBUS valid, ID = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) val = CFGCHIP2_OTGMODE_FORCE_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case PHY_MODE_USB_OTG: /* Don't override the VBUS/ID comparators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) val = CFGCHIP2_OTGMODE_NO_OVERRIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_OTGMODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static const struct phy_ops da8xx_usb20_phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .power_on = da8xx_usb20_phy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .power_off = da8xx_usb20_phy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .set_mode = da8xx_usb20_phy_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct phy *da8xx_usb_phy_of_xlate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct of_phandle_args *args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct da8xx_usb_phy *d_phy = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!d_phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) switch (args->args[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return d_phy->usb20_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return d_phy->usb11_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int da8xx_usb_phy_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct da8xx_usb_phy_platform_data *pdata = dev->platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct device_node *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct da8xx_usb_phy *d_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) d_phy = devm_kzalloc(dev, sizeof(*d_phy), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (!d_phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) d_phy->regmap = pdata->cfgchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) d_phy->regmap = syscon_regmap_lookup_by_compatible(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) "ti,da830-cfgchip");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (IS_ERR(d_phy->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dev_err(dev, "Failed to get syscon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return PTR_ERR(d_phy->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) d_phy->usb11_clk = devm_clk_get(dev, "usb1_clk48");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (IS_ERR(d_phy->usb11_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dev_err(dev, "Failed to get usb1_clk48\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return PTR_ERR(d_phy->usb11_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) d_phy->usb20_clk = devm_clk_get(dev, "usb0_clk48");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (IS_ERR(d_phy->usb20_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) dev_err(dev, "Failed to get usb0_clk48\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return PTR_ERR(d_phy->usb20_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) d_phy->usb11_phy = devm_phy_create(dev, node, &da8xx_usb11_phy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (IS_ERR(d_phy->usb11_phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) dev_err(dev, "Failed to create usb11 phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return PTR_ERR(d_phy->usb11_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) d_phy->usb20_phy = devm_phy_create(dev, node, &da8xx_usb20_phy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (IS_ERR(d_phy->usb20_phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) dev_err(dev, "Failed to create usb20 phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return PTR_ERR(d_phy->usb20_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) platform_set_drvdata(pdev, d_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) phy_set_drvdata(d_phy->usb11_phy, d_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) phy_set_drvdata(d_phy->usb20_phy, d_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) d_phy->phy_provider = devm_of_phy_provider_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) da8xx_usb_phy_of_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (IS_ERR(d_phy->phy_provider)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dev_err(dev, "Failed to create phy provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return PTR_ERR(d_phy->phy_provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ret = phy_create_lookup(d_phy->usb11_phy, "usb-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "ohci-da8xx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) dev_warn(dev, "Failed to create usb11 phy lookup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ret = phy_create_lookup(d_phy->usb20_phy, "usb-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) "musb-da8xx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) dev_warn(dev, "Failed to create usb20 phy lookup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) regmap_write_bits(d_phy->regmap, CFGCHIP(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) PHY_INIT_BITS, PHY_INIT_BITS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int da8xx_usb_phy_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct da8xx_usb_phy *d_phy = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (!pdev->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) phy_remove_lookup(d_phy->usb20_phy, "usb-phy", "musb-da8xx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) phy_remove_lookup(d_phy->usb11_phy, "usb-phy", "ohci-da8xx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static const struct of_device_id da8xx_usb_phy_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) { .compatible = "ti,da830-usb-phy" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) MODULE_DEVICE_TABLE(of, da8xx_usb_phy_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static struct platform_driver da8xx_usb_phy_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .probe = da8xx_usb_phy_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .remove = da8xx_usb_phy_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .name = "da8xx-usb-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .of_match_table = da8xx_usb_phy_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) module_platform_driver(da8xx_usb_phy_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_ALIAS("platform:da8xx-usb-phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_AUTHOR("David Lechner <david@lechnology.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) MODULE_DESCRIPTION("TI DA8xx USB PHY driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags