^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * phy-uniphier-usb2.c - PHY driver for UniPhier USB2 controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2015-2018 Socionext Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define SG_USBPHY1CTRL 0x500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SG_USBPHY1CTRL2 0x504
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SG_USBPHY2CTRL 0x508
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SG_USBPHY2CTRL2 0x50c /* LD11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SG_USBPHY12PLL 0x50c /* Pro4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SG_USBPHY3CTRL 0x510
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SG_USBPHY3CTRL2 0x514
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SG_USBPHY4CTRL 0x518 /* Pro4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SG_USBPHY4CTRL2 0x51c /* Pro4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SG_USBPHY34PLL 0x51c /* Pro4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct uniphier_u2phy_param {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct uniphier_u2phy_soc_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct uniphier_u2phy_param config0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct uniphier_u2phy_param config1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct uniphier_u2phy_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct regulator *vbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) const struct uniphier_u2phy_soc_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct uniphier_u2phy_priv *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int uniphier_u2phy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct uniphier_u2phy_priv *priv = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (priv->vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ret = regulator_enable(priv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int uniphier_u2phy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct uniphier_u2phy_priv *priv = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (priv->vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) regulator_disable(priv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int uniphier_u2phy_init(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct uniphier_u2phy_priv *priv = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (!priv->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) regmap_write(priv->regmap, priv->data->config0.offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) priv->data->config0.value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) regmap_write(priv->regmap, priv->data->config1.offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) priv->data->config1.value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static struct phy *uniphier_u2phy_xlate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct of_phandle_args *args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct uniphier_u2phy_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) while (priv && args->np != priv->phy->dev.of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) priv = priv->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dev_err(dev, "Failed to find appropriate phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return priv->phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static const struct phy_ops uniphier_u2phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .init = uniphier_u2phy_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .power_on = uniphier_u2phy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .power_off = uniphier_u2phy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int uniphier_u2phy_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct device_node *parent, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct uniphier_u2phy_priv *priv = NULL, *next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct phy_provider *phy_provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) const struct uniphier_u2phy_soc_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int ret, data_idx, ndatas;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) data = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (WARN_ON(!data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* get number of data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) for (ndatas = 0; data[ndatas].config0.offset; ndatas++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) parent = of_get_parent(dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) regmap = syscon_node_to_regmap(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) of_node_put(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) dev_err(dev, "Failed to get regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) for_each_child_of_node(dev->of_node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) goto out_put_child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) priv->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) priv->vbus = devm_regulator_get_optional(dev, "vbus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (IS_ERR(priv->vbus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (PTR_ERR(priv->vbus) == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ret = PTR_ERR(priv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) goto out_put_child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) priv->vbus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) priv->phy = devm_phy_create(dev, child, &uniphier_u2phy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (IS_ERR(priv->phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) dev_err(dev, "Failed to create phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ret = PTR_ERR(priv->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) goto out_put_child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ret = of_property_read_u32(child, "reg", &data_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_err(dev, "Failed to get reg property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) goto out_put_child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (data_idx < ndatas)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) priv->data = &data[data_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dev_warn(dev, "No phy configuration: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) child->full_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) phy_set_drvdata(priv->phy, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) priv->next = next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) next = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dev_set_drvdata(dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) phy_provider = devm_of_phy_provider_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) uniphier_u2phy_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return PTR_ERR_OR_ZERO(phy_provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) out_put_child:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static const struct uniphier_u2phy_soc_data uniphier_pro4_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .config0 = { SG_USBPHY1CTRL, 0x05142400 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .config1 = { SG_USBPHY12PLL, 0x00010010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .config0 = { SG_USBPHY2CTRL, 0x05142400 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .config1 = { SG_USBPHY12PLL, 0x00010010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .config0 = { SG_USBPHY3CTRL, 0x05142400 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .config1 = { SG_USBPHY34PLL, 0x00010010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .config0 = { SG_USBPHY4CTRL, 0x05142400 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .config1 = { SG_USBPHY34PLL, 0x00010010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static const struct uniphier_u2phy_soc_data uniphier_ld11_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .config0 = { SG_USBPHY1CTRL, 0x82280000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .config1 = { SG_USBPHY1CTRL2, 0x00000106 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .config0 = { SG_USBPHY2CTRL, 0x82280000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .config1 = { SG_USBPHY2CTRL2, 0x00000106 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .config0 = { SG_USBPHY3CTRL, 0x82280000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .config1 = { SG_USBPHY3CTRL2, 0x00000106 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static const struct of_device_id uniphier_u2phy_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .compatible = "socionext,uniphier-pro4-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .data = &uniphier_pro4_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .compatible = "socionext,uniphier-ld11-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .data = &uniphier_ld11_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MODULE_DEVICE_TABLE(of, uniphier_u2phy_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static struct platform_driver uniphier_u2phy_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .probe = uniphier_u2phy_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .name = "uniphier-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .of_match_table = uniphier_u2phy_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) module_platform_driver(uniphier_u2phy_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DESCRIPTION("UniPhier PHY driver for USB2 controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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