Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Samsung SoC USB 1.1/2.0 PHY driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Kamil Debski <k.debski@samsung.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "phy-samsung-usb2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static int samsung_usb2_phy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct samsung_usb2_phy_driver *drv = inst->drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		inst->cfg->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	if (drv->vbus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		ret = regulator_enable(drv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			goto err_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	ret = clk_prepare_enable(drv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		goto err_main_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	ret = clk_prepare_enable(drv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		goto err_instance_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	if (inst->cfg->power_on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		spin_lock(&drv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		ret = inst->cfg->power_on(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		spin_unlock(&drv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			goto err_power_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) err_power_on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	clk_disable_unprepare(drv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) err_instance_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	clk_disable_unprepare(drv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) err_main_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	if (drv->vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		regulator_disable(drv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) err_regulator:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static int samsung_usb2_phy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct samsung_usb2_phy_driver *drv = inst->drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	dev_dbg(drv->dev, "Request to power_off \"%s\" usb phy\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		inst->cfg->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if (inst->cfg->power_off) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		spin_lock(&drv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		ret = inst->cfg->power_off(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		spin_unlock(&drv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	clk_disable_unprepare(drv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	clk_disable_unprepare(drv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (drv->vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		ret = regulator_disable(drv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static const struct phy_ops samsung_usb2_phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.power_on	= samsung_usb2_phy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	.power_off	= samsung_usb2_phy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static struct phy *samsung_usb2_phy_xlate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 					struct of_phandle_args *args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct samsung_usb2_phy_driver *drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	drv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (!drv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (WARN_ON(args->args[0] >= drv->cfg->num_phys))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	return drv->instances[args->args[0]].phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static const struct of_device_id samsung_usb2_phy_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #ifdef CONFIG_PHY_EXYNOS4X12_USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		.compatible = "samsung,exynos3250-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		.data = &exynos3250_usb2_phy_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_PHY_EXYNOS4210_USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		.compatible = "samsung,exynos4210-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		.data = &exynos4210_usb2_phy_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #ifdef CONFIG_PHY_EXYNOS4X12_USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		.compatible = "samsung,exynos4x12-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		.data = &exynos4x12_usb2_phy_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #ifdef CONFIG_PHY_EXYNOS5250_USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		.compatible = "samsung,exynos5250-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		.data = &exynos5250_usb2_phy_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #ifdef CONFIG_PHY_S5PV210_USB2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		.compatible = "samsung,s5pv210-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		.data = &s5pv210_usb2_phy_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_DEVICE_TABLE(of, samsung_usb2_phy_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int samsung_usb2_phy_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	const struct samsung_usb2_phy_config *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct phy_provider *phy_provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	struct resource *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	struct samsung_usb2_phy_driver *drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!pdev->dev.of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		dev_err(dev, "This driver is required to be instantiated from device tree\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	cfg = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (!cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	drv = devm_kzalloc(dev, struct_size(drv, instances, cfg->num_phys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			   GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	if (!drv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	dev_set_drvdata(dev, drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	spin_lock_init(&drv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	drv->cfg = cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	drv->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	drv->reg_phy = devm_ioremap_resource(dev, mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (IS_ERR(drv->reg_phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		dev_err(dev, "Failed to map register memory (phy)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		return PTR_ERR(drv->reg_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	drv->reg_pmu = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		"samsung,pmureg-phandle");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (IS_ERR(drv->reg_pmu)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		dev_err(dev, "Failed to map PMU registers (via syscon)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		return PTR_ERR(drv->reg_pmu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (drv->cfg->has_mode_switch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		drv->reg_sys = syscon_regmap_lookup_by_phandle(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				pdev->dev.of_node, "samsung,sysreg-phandle");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		if (IS_ERR(drv->reg_sys)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			dev_err(dev, "Failed to map system registers (via syscon)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			return PTR_ERR(drv->reg_sys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	drv->clk = devm_clk_get(dev, "phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (IS_ERR(drv->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		dev_err(dev, "Failed to get clock of phy controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		return PTR_ERR(drv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	drv->ref_clk = devm_clk_get(dev, "ref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (IS_ERR(drv->ref_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		dev_err(dev, "Failed to get reference clock for the phy controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return PTR_ERR(drv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	drv->ref_rate = clk_get_rate(drv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (drv->cfg->rate_to_clk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	drv->vbus = devm_regulator_get(dev, "vbus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (IS_ERR(drv->vbus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		ret = PTR_ERR(drv->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (ret == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		drv->vbus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	for (i = 0; i < drv->cfg->num_phys; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		char *label = drv->cfg->phys[i].label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		struct samsung_usb2_phy_instance *p = &drv->instances[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		dev_dbg(dev, "Creating phy \"%s\"\n", label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		p->phy = devm_phy_create(dev, NULL, &samsung_usb2_phy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		if (IS_ERR(p->phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			dev_err(drv->dev, "Failed to create usb2_phy \"%s\"\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 				label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			return PTR_ERR(p->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		p->cfg = &drv->cfg->phys[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		p->drv = drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		phy_set_bus_width(p->phy, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		phy_set_drvdata(p->phy, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	phy_provider = devm_of_phy_provider_register(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 							samsung_usb2_phy_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if (IS_ERR(phy_provider)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		dev_err(drv->dev, "Failed to register phy provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		return PTR_ERR(phy_provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static struct platform_driver samsung_usb2_phy_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	.probe	= samsung_usb2_phy_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		.of_match_table	= samsung_usb2_phy_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		.name		= "samsung-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		.suppress_bind_attrs = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) module_platform_driver(samsung_usb2_phy_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MODULE_DESCRIPTION("Samsung S5P/Exynos SoC USB PHY driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MODULE_ALIAS("platform:samsung-usb2-phy");