^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) Rockchip Electronics Co.Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Guochun Huang <hero.huang@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <media/v4l2-ctrls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <media/v4l2-fwnode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <media/v4l2-subdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <media/v4l2-device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "phy-rockchip-csi2-dphy-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "phy-rockchip-samsung-dcphy.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define HIWORD_UPDATE(v, h, l) (((v) << (l)) | (GENMASK((h), (l)) << 16))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define BIAS_CON0 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define BIAS_CON1 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define BIAS_CON2 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define BIAS_CON4 0x0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define I_MUX_SEL_MASK GENMASK(6, 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define I_MUX_SEL(x) UPDATE(x, 6, 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PLL_CON0 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PLL_EN BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define S_MASK GENMASK(10, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define S(x) UPDATE(x, 10, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define P_MASK GENMASK(5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define P(x) UPDATE(x, 5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PLL_CON1 0x0104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PLL_CON2 0x0108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define M_MASK GENMASK(9, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define M(x) UPDATE(x, 9, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PLL_CON3 0x010c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MRR_MASK GENMASK(13, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MRR(x) UPDATE(x, 13, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MFR_MASK GENMASK(7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MFR(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PLL_CON4 0x0110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SSCG_EN BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PLL_CON5 0x0114
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define RESET_N_SEL BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PLL_ENABLE_SEL BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PLL_CON6 0x0118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PLL_CON7 0x011c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PLL_LOCK_CNT(x) UPDATE(x, 15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PLL_CON8 0x0120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PLL_STB_CNT(x) UPDATE(x, 15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PLL_STAT0 0x0140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PLL_LOCK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define DPHY_MC_GNR_CON0 0x0300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PHY_READY BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PHY_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define DPHY_MC_GNR_CON1 0x0304
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define T_PHY_READY(x) UPDATE(x, 15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define DPHY_MC_ANA_CON0 0x0308
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DPHY_MC_ANA_CON1 0x030c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define DPHY_MC_ANA_CON2 0x0310
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define HS_VREG_AMP_ICON(x) UPDATE(x, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define DPHY_MC_TIME_CON0 0x0330
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define HSTX_CLK_SEL BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define T_LPX(x) UPDATE(x, 11, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define DPHY_MC_TIME_CON1 0x0334
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define T_CLK_ZERO(x) UPDATE(x, 15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define T_CLK_PREPARE(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define DPHY_MC_TIME_CON2 0x0338
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define T_HS_EXIT(x) UPDATE(x, 15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define T_CLK_TRAIL(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define DPHY_MC_TIME_CON3 0x033c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define T_CLK_POST(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define DPHY_MC_TIME_CON4 0x0340
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define T_ULPS_EXIT(x) UPDATE(x, 9, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define DPHY_MC_DESKEW_CON0 0x0350
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SKEW_CAL_RUN_TIME(x) UPDATE(x, 15, 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define SKEW_CAL_INIT_RUN_TIME(x) UPDATE(x, 11, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define SKEW_CAL_INIT_WAIT_TIME(x) UPDATE(x, 7, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define SKEW_CAL_EN BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define COMBO_MD0_GNR_CON0 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define COMBO_MD0_GNR_CON1 0x0404
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define COMBO_MD0_ANA_CON0 0x0408
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define COMBO_MD0_ANA_CON1 0x040C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define COMBO_MD0_ANA_CON2 0x0410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define COMBO_MD0_TIME_CON0 0x0430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define COMBO_MD0_TIME_CON1 0x0434
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define COMBO_MD0_TIME_CON2 0x0438
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define COMBO_MD0_TIME_CON3 0x043C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define COMBO_MD0_TIME_CON4 0x0440
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define COMBO_MD0_DATA_CON0 0x0444
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define COMBO_MD1_GNR_CON0 0x0500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define COMBO_MD1_GNR_CON1 0x0504
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define COMBO_MD1_ANA_CON0 0x0508
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define COMBO_MD1_ANA_CON1 0x050c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define COMBO_MD1_ANA_CON2 0x0510
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define COMBO_MD1_TIME_CON0 0x0530
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define COMBO_MD1_TIME_CON1 0x0534
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define COMBO_MD1_TIME_CON2 0x0538
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define COMBO_MD1_TIME_CON3 0x053C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define COMBO_MD1_TIME_CON4 0x0540
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define COMBO_MD1_DATA_CON0 0x0544
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define COMBO_MD2_GNR_CON0 0x0600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define COMBO_MD2_GNR_CON1 0x0604
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define COMBO_MD2_ANA_CON0 0X0608
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define COMBO_MD2_ANA_CON1 0X060C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define COMBO_MD2_ANA_CON2 0X0610
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define COMBO_MD2_TIME_CON0 0x0630
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define COMBO_MD2_TIME_CON1 0x0634
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define COMBO_MD2_TIME_CON2 0x0638
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define COMBO_MD2_TIME_CON3 0x063C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define COMBO_MD2_TIME_CON4 0x0640
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define COMBO_MD2_DATA_CON0 0x0644
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define DPHY_MD3_GNR_CON0 0x0700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define DPHY_MD3_GNR_CON1 0x0704
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define DPHY_MD3_ANA_CON0 0X0708
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define DPHY_MD3_ANA_CON1 0X070C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define DPHY_MD3_ANA_CON2 0X0710
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define DPHY_MD3_TIME_CON0 0x0730
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define DPHY_MD3_TIME_CON1 0x0734
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define DPHY_MD3_TIME_CON2 0x0738
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define DPHY_MD3_TIME_CON3 0x073C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define DPHY_MD3_TIME_CON4 0x0740
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define DPHY_MD3_DATA_CON0 0x0744
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define T_LP_EXIT_SKEW(x) UPDATE(x, 3, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define T_LP_ENTRY_SKEW(x) UPDATE(x, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define T_HS_ZERO(x) UPDATE(x, 15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define T_HS_PREPARE(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define T_HS_EXIT(x) UPDATE(x, 15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define T_HS_TRAIL(x) UPDATE(x, 7, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define T_TA_GET(x) UPDATE(x, 7, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define T_TA_GO(x) UPDATE(x, 3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* MIPI_CDPHY_GRF registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define MIPI_DCPHY_GRF_CON0 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define S_CPHY_MODE HIWORD_UPDATE(1, 3, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define M_CPHY_MODE HIWORD_UPDATE(1, 0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define MAX_DPHY_BW 4500000L
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define MAX_CPHY_BW 2000000L
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define RX_CLK_THS_SETTLE (0xb30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define RX_LANE0_THS_SETTLE (0xC30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define RX_LANE0_ERR_SOT_SYNC (0xC34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define RX_LANE1_THS_SETTLE (0xD30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define RX_LANE1_ERR_SOT_SYNC (0xD34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define RX_LANE2_THS_SETTLE (0xE30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define RX_LANE2_ERR_SOT_SYNC (0xE34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define RX_LANE3_THS_SETTLE (0xF30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define RX_LANE3_ERR_SOT_SYNC (0xF34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define RX_CLK_LANE_ENABLE (0xB00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define RX_DATA_LANE0_ENABLE (0xC00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define RX_DATA_LANE1_ENABLE (0xD00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define RX_DATA_LANE2_ENABLE (0xE00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define RX_DATA_LANE3_ENABLE (0xF00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define RX_S0C_GNR_CON1 (0xB04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define RX_S0C_ANA_CON1 (0xB0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define RX_S0C_ANA_CON2 (0xB10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define RX_S0C_ANA_CON3 (0xB14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define RX_COMBO_S0D0_GNR_CON1 (0xC04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define RX_COMBO_S0D0_ANA_CON1 (0xC0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define RX_COMBO_S0D0_ANA_CON2 (0xC10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define RX_COMBO_S0D0_ANA_CON3 (0xC14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define RX_COMBO_S0D0_ANA_CON6 (0xC20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define RX_COMBO_S0D0_ANA_CON7 (0xC24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define RX_COMBO_S0D0_DESKEW_CON0 (0xC40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define RX_COMBO_S0D0_DESKEW_CON2 (0xC48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define RX_COMBO_S0D0_DESKEW_CON4 (0xC50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define RX_COMBO_S0D0_CRC_CON1 (0xC64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define RX_COMBO_S0D0_CRC_CON2 (0xC68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define RX_COMBO_S0D1_GNR_CON1 (0xD04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define RX_COMBO_S0D1_ANA_CON1 (0xD0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define RX_COMBO_S0D1_ANA_CON2 (0xD10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define RX_COMBO_S0D1_ANA_CON3 (0xD14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define RX_COMBO_S0D1_ANA_CON6 (0xD20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define RX_COMBO_S0D1_ANA_CON7 (0xD24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define RX_COMBO_S0D1_DESKEW_CON0 (0xD40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define RX_COMBO_S0D1_DESKEW_CON2 (0xD48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define RX_COMBO_S0D1_DESKEW_CON4 (0xD50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define RX_COMBO_S0D1_CRC_CON1 (0xD64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define RX_COMBO_S0D1_CRC_CON2 (0xD68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define RX_COMBO_S0D2_GNR_CON1 (0xE04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define RX_COMBO_S0D2_ANA_CON1 (0xE0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define RX_COMBO_S0D2_ANA_CON2 (0xE10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define RX_COMBO_S0D2_ANA_CON3 (0xE14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define RX_COMBO_S0D2_ANA_CON6 (0xE20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define RX_COMBO_S0D2_ANA_CON7 (0xE24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define RX_COMBO_S0D2_DESKEW_CON0 (0xE40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define RX_COMBO_S0D2_DESKEW_CON2 (0xE48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define RX_COMBO_S0D2_DESKEW_CON4 (0xE50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define RX_COMBO_S0D2_CRC_CON1 (0xE64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define RX_COMBO_S0D2_CRC_CON2 (0xE68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define RX_S0D3_GNR_CON1 (0xF04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define RX_S0D3_ANA_CON1 (0xF0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define RX_S0D3_ANA_CON2 (0xF10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define RX_S0D3_ANA_CON3 (0xF14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define RX_S0D3_DESKEW_CON0 (0xF40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define RX_S0D3_DESKEW_CON2 (0xF48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define RX_S0D3_DESKEW_CON4 (0xF50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct samsung_mipi_dphy_timing {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) unsigned int max_lane_mbps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 clk_prepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 clk_zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u8 clk_post;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u8 clk_trail_eot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) u8 hs_prepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u8 hs_zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 hs_trail_eot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) u8 lpx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) u8 hs_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) u8 hs_settle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct samsung_mipi_cphy_timing {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) unsigned int max_lane_msps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 prepare_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 prebegin_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 post_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u8 lpx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u8 hs_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u8 settle_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static const
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct samsung_mipi_dphy_timing samsung_mipi_dphy_timing_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {6500, 32, 117, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {6490, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {6480, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {6470, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {6460, 32, 116, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {6450, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {6440, 32, 115, 31, 28, 30, 56, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {6430, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {6420, 31, 116, 31, 28, 30, 55, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {6410, 31, 116, 31, 27, 30, 55, 27, 24, 44, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {6400, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {6390, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {6380, 31, 115, 30, 27, 30, 55, 27, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {6370, 31, 115, 30, 27, 30, 55, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {6360, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {6350, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {6340, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {6330, 31, 114, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {6320, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {6310, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {6300, 31, 113, 30, 27, 30, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {6290, 31, 113, 30, 27, 29, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {6280, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {6270, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {6260, 31, 112, 30, 27, 29, 54, 26, 23, 43, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {6250, 31, 112, 30, 27, 29, 54, 26, 23, 42, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {6240, 30, 113, 30, 27, 29, 54, 26, 23, 42, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {6230, 30, 112, 30, 27, 29, 54, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {6220, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {6210, 30, 112, 30, 27, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {6200, 30, 112, 29, 27, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {6190, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {6180, 30, 111, 29, 27, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {6170, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {6160, 30, 111, 29, 26, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {6150, 30, 110, 29, 26, 29, 53, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {6140, 30, 110, 29, 26, 29, 52, 26, 23, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {6130, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {6120, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {6110, 30, 110, 29, 26, 29, 52, 25, 22, 42, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {6100, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {6090, 30, 109, 29, 26, 29, 52, 25, 22, 41, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {6080, 30, 109, 29, 26, 28, 53, 25, 22, 41, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {6070, 30, 109, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {6060, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {6050, 30, 108, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {6040, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {6030, 29, 109, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {6020, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {6010, 29, 108, 29, 26, 28, 52, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {6000, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {5990, 29, 108, 28, 26, 28, 51, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {5980, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {5970, 29, 107, 28, 26, 28, 51, 25, 22, 41, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {5960, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {5950, 29, 107, 28, 26, 28, 51, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {5940, 29, 107, 28, 25, 28, 51, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {5930, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {5920, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {5910, 29, 106, 28, 25, 28, 50, 25, 22, 40, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {5900, 29, 106, 28, 25, 28, 50, 24, 22, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {5890, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {5880, 29, 105, 28, 25, 28, 50, 24, 22, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) {5870, 29, 105, 28, 25, 27, 51, 24, 22, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {5860, 29, 105, 28, 25, 27, 51, 24, 21, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {5850, 29, 104, 28, 25, 27, 50, 24, 21, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {5840, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {5830, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {5820, 28, 105, 28, 25, 27, 50, 24, 21, 40, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {5810, 28, 104, 28, 25, 27, 50, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {5800, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {5790, 28, 104, 27, 25, 27, 50, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {5780, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {5770, 28, 104, 27, 25, 27, 49, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {5760, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {5750, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {5740, 28, 103, 27, 25, 27, 49, 24, 21, 39, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {5730, 28, 103, 27, 25, 27, 49, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {5720, 28, 102, 27, 25, 27, 49, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {5710, 28, 102, 27, 25, 27, 48, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {5700, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {5690, 28, 102, 27, 24, 27, 48, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {5680, 28, 101, 27, 24, 27, 48, 24, 21, 39, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {5670, 28, 101, 27, 24, 27, 48, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {5660, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {5650, 28, 101, 27, 24, 26, 49, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {5640, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {5630, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {5620, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {5610, 27, 101, 27, 24, 26, 48, 23, 21, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {5600, 27, 101, 26, 24, 26, 48, 23, 20, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {5590, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {5580, 27, 100, 26, 24, 26, 48, 23, 20, 38, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {5570, 27, 100, 26, 24, 26, 48, 23, 20, 38, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {5560, 27, 100, 26, 24, 26, 47, 23, 20, 38, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {5550, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {5540, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {5530, 27, 99, 26, 24, 26, 47, 23, 20, 38, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {5520, 27, 99, 26, 24, 26, 47, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {5510, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {5500, 27, 98, 26, 24, 26, 47, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {5490, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {5480, 27, 98, 26, 24, 26, 46, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {5470, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {5460, 27, 97, 26, 23, 26, 46, 23, 20, 37, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {5450, 27, 97, 26, 23, 25, 47, 23, 20, 37, 31},
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {4030, 19, 72, 19, 17, 19, 33, 17, 15, 27, 22},
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {4000, 19, 71, 18, 17, 19, 33, 16, 14, 27, 22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {3990, 19, 71, 18, 17, 18, 34, 16, 14, 27, 22},
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {3970, 19, 70, 18, 17, 18, 33, 16, 14, 27, 22},
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {2430, 11, 42, 11, 11, 11, 19, 10, 9, 16, 13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {2420, 11, 42, 11, 10, 11, 19, 10, 9, 16, 13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {2410, 11, 42, 11, 10, 11, 19, 10, 9, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {2400, 11, 41, 10, 10, 11, 19, 10, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {2390, 11, 41, 10, 10, 11, 19, 10, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {2380, 11, 41, 10, 10, 11, 19, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {2370, 11, 41, 10, 10, 11, 18, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {2360, 11, 41, 10, 10, 11, 18, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {2350, 11, 40, 10, 10, 11, 18, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {2340, 11, 40, 10, 10, 11, 18, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {2330, 11, 40, 10, 10, 10, 19, 9, 8, 16, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {2320, 11, 40, 10, 10, 10, 19, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {2310, 11, 39, 10, 10, 10, 19, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {2300, 11, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {2290, 11, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {2280, 11, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {2270, 10, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {2260, 10, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {2250, 10, 39, 10, 10, 10, 18, 9, 8, 15, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {2240, 10, 39, 10, 10, 10, 18, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {2230, 10, 38, 10, 10, 10, 18, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {2220, 10, 38, 10, 10, 10, 17, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) {2210, 10, 38, 10, 10, 10, 17, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {2200, 10, 38, 9, 10, 10, 17, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {2190, 10, 38, 9, 9, 10, 17, 9, 8, 15, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) {2180, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {2170, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {2160, 10, 37, 9, 9, 10, 17, 9, 8, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {2150, 10, 37, 9, 9, 10, 16, 8, 8, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {2140, 10, 36, 9, 9, 10, 16, 8, 8, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {2130, 10, 36, 9, 9, 10, 16, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {2120, 10, 36, 9, 9, 9, 17, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) {2110, 10, 36, 9, 9, 9, 17, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {2100, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {2090, 10, 35, 9, 9, 9, 17, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {2080, 9, 36, 9, 9, 9, 16, 8, 7, 14, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) {2070, 9, 36, 9, 9, 9, 16, 8, 7, 14, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {2060, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {2050, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {2040, 9, 35, 9, 9, 9, 16, 8, 7, 14, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {2030, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {2020, 9, 35, 9, 9, 9, 16, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {2010, 9, 34, 9, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {2000, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {1990, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {1980, 9, 34, 8, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) {1970, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {1960, 9, 33, 8, 9, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {1950, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {1940, 9, 33, 8, 8, 9, 15, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {1930, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {1920, 9, 32, 8, 8, 9, 14, 8, 7, 13, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) {1910, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {1900, 9, 32, 8, 8, 8, 15, 7, 7, 13, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {1890, 9, 31, 8, 8, 8, 15, 7, 7, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {1880, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {1870, 8, 32, 8, 8, 8, 15, 7, 7, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) {1860, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) {1850, 8, 32, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {1840, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {1830, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) {1820, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) {1810, 8, 31, 8, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {1800, 8, 30, 7, 8, 8, 14, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) {1790, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {1780, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) {1770, 8, 30, 7, 8, 8, 13, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) {1760, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) {1750, 8, 29, 7, 8, 8, 13, 7, 6, 12, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) {1740, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) {1730, 8, 29, 7, 8, 8, 13, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {1720, 8, 29, 7, 7, 8, 13, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) {1710, 8, 28, 7, 7, 8, 12, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) {1700, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) {1690, 8, 28, 7, 7, 7, 13, 7, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) {1680, 7, 29, 7, 7, 7, 13, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {1670, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) {1660, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {1650, 7, 28, 7, 7, 7, 13, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {1640, 7, 28, 7, 7, 7, 12, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) {1630, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) {1620, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) {1610, 7, 27, 7, 7, 7, 12, 6, 6, 11, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) {1600, 7, 27, 6, 7, 7, 12, 6, 5, 10, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {1590, 7, 26, 6, 7, 7, 12, 6, 5, 10, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) {1580, 7, 26, 6, 7, 7, 12, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) {1570, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) {1560, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {1550, 7, 26, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) {1540, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) {1530, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) {1520, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) {1510, 7, 25, 6, 7, 7, 11, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {1500, 7, 24, 6, 7, 7, 10, 6, 5, 10, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {1490, 59, 25, 6, 77, 59, 10, 70, 44, 9, 73},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {1480, 59, 24, 6, 76, 58, 10, 70, 44, 9, 73},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) {1470, 58, 24, 6, 76, 58, 10, 69, 44, 9, 72},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) {1460, 58, 24, 6, 76, 58, 10, 69, 43, 9, 72},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) {1450, 58, 24, 6, 75, 57, 10, 68, 43, 9, 71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) {1440, 57, 24, 6, 75, 57, 10, 68, 43, 9, 71},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) {1430, 57, 23, 6, 75, 57, 10, 68, 43, 8, 70},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) {1420, 56, 23, 6, 74, 57, 9, 67, 43, 8, 70},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {1410, 56, 23, 6, 74, 57, 9, 67, 43, 8, 69},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) {1400, 56, 23, 5, 74, 55, 9, 67, 41, 8, 69},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {1390, 55, 23, 5, 73, 55, 9, 66, 41, 8, 68},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) {1380, 55, 23, 5, 73, 54, 9, 66, 41, 8, 68},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) {1370, 54, 22, 5, 72, 54, 9, 66, 41, 8, 67},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {1360, 54, 22, 5, 72, 54, 9, 65, 40, 8, 67},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {1350, 54, 22, 5, 72, 53, 9, 65, 40, 8, 66},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {1340, 53, 22, 5, 71, 53, 9, 65, 40, 8, 66},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) {1330, 53, 22, 5, 71, 53, 9, 64, 39, 8, 65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {1320, 52, 22, 5, 71, 53, 8, 64, 40, 8, 65},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) {1310, 52, 21, 5, 70, 53, 8, 64, 40, 8, 64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {1300, 51, 21, 5, 70, 51, 8, 63, 38, 8, 64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {1290, 51, 21, 5, 70, 51, 8, 63, 38, 7, 64},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) {1280, 51, 21, 5, 69, 51, 8, 63, 38, 7, 63},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {1270, 50, 21, 5, 69, 50, 8, 62, 38, 7, 63},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) {1260, 50, 20, 5, 69, 50, 8, 62, 37, 7, 62},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) {1250, 49, 20, 5, 68, 49, 8, 62, 37, 7, 62},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {1240, 49, 20, 5, 68, 49, 8, 61, 37, 7, 61},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) {1230, 49, 20, 5, 68, 49, 8, 61, 36, 7, 61},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {1220, 48, 20, 5, 67, 48, 8, 61, 36, 7, 60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) {1210, 48, 19, 5, 67, 48, 7, 60, 36, 7, 60},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) {1200, 49, 19, 4, 67, 49, 7, 60, 36, 7, 59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {1190, 48, 19, 4, 66, 48, 7, 60, 36, 7, 59},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) {1180, 48, 19, 4, 66, 48, 7, 59, 36, 7, 58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) {1170, 46, 19, 4, 66, 46, 7, 59, 35, 7, 58},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {1160, 46, 18, 4, 65, 46, 7, 59, 34, 7, 57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) {1150, 45, 18, 4, 65, 46, 7, 58, 34, 7, 57},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) {1140, 45, 18, 4, 65, 45, 7, 58, 34, 6, 56},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {1130, 45, 18, 4, 64, 45, 7, 58, 33, 6, 56},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) {1120, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {1110, 44, 18, 4, 64, 44, 7, 57, 33, 6, 55},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {1100, 43, 17, 4, 63, 44, 6, 57, 32, 6, 54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) {1090, 43, 17, 4, 63, 44, 6, 56, 33, 6, 54},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) {1080, 43, 17, 4, 63, 44, 6, 56, 33, 6, 53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) {1070, 42, 17, 4, 62, 44, 6, 56, 33, 6, 53},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {1060, 42, 17, 4, 62, 42, 6, 55, 31, 6, 52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) {1050, 41, 17, 4, 62, 42, 6, 55, 31, 6, 52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) {1040, 41, 16, 4, 61, 41, 6, 54, 31, 6, 52},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) {1030, 41, 16, 4, 61, 41, 6, 54, 30, 6, 51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) {1020, 40, 16, 4, 61, 41, 6, 54, 30, 6, 51},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) {1010, 40, 16, 4, 60, 40, 6, 53, 30, 6, 50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {1000, 39, 16, 3, 60, 40, 6, 53, 29, 5, 50},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) { 990, 39, 15, 3, 60, 39, 6, 53, 29, 5, 49},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) { 980, 39, 15, 3, 59, 39, 5, 52, 29, 5, 49},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) { 970, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) { 960, 38, 15, 3, 59, 39, 5, 52, 29, 5, 48},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) { 950, 37, 15, 3, 58, 39, 5, 51, 29, 5, 47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) { 940, 37, 14, 3, 58, 39, 5, 51, 29, 5, 47},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) { 930, 37, 14, 3, 57, 37, 5, 51, 27, 5, 46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) { 920, 36, 14, 3, 57, 37, 5, 50, 27, 5, 46},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) { 910, 36, 14, 3, 57, 36, 5, 50, 27, 5, 45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) { 900, 35, 14, 3, 56, 36, 5, 50, 26, 5, 45},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) { 890, 35, 14, 3, 56, 36, 5, 49, 26, 5, 44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) { 880, 35, 13, 3, 56, 35, 5, 49, 26, 5, 44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) { 870, 34, 13, 3, 55, 35, 4, 49, 26, 5, 43},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) { 860, 34, 13, 3, 55, 35, 4, 48, 25, 5, 43},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) { 850, 33, 13, 3, 55, 35, 4, 48, 26, 4, 42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) { 840, 33, 13, 3, 54, 35, 4, 48, 26, 4, 42},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) { 830, 33, 12, 3, 54, 33, 4, 47, 24, 4, 41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) { 820, 32, 12, 3, 54, 33, 4, 47, 24, 4, 41},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) { 810, 32, 12, 3, 53, 33, 4, 47, 24, 4, 40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) { 800, 31, 12, 2, 53, 32, 4, 46, 23, 4, 40},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) { 790, 31, 12, 2, 53, 32, 4, 46, 23, 4, 39},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) { 780, 30, 12, 2, 52, 31, 4, 46, 23, 4, 39},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) { 770, 30, 11, 2, 52, 31, 4, 45, 23, 4, 39},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) { 760, 30, 11, 2, 52, 31, 3, 45, 22, 4, 38},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) { 750, 29, 11, 2, 51, 30, 3, 45, 22, 4, 38},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) { 740, 29, 11, 2, 51, 30, 3, 44, 22, 4, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) { 730, 28, 11, 2, 51, 31, 3, 44, 22, 4, 37},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) { 720, 28, 10, 2, 50, 30, 3, 44, 22, 4, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) { 710, 28, 10, 2, 50, 30, 3, 43, 22, 4, 36},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) { 700, 27, 10, 2, 50, 28, 3, 43, 20, 3, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) { 690, 27, 10, 2, 49, 28, 3, 43, 20, 3, 35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) { 680, 26, 10, 2, 49, 28, 3, 42, 20, 3, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) { 670, 26, 10, 2, 49, 27, 3, 42, 20, 3, 34},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) { 660, 26, 9, 2, 48, 27, 3, 42, 19, 3, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) { 650, 25, 9, 2, 48, 26, 3, 41, 19, 3, 33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) { 640, 25, 9, 2, 48, 26, 2, 41, 19, 3, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) { 630, 24, 9, 2, 47, 26, 2, 40, 18, 3, 32},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) { 620, 24, 9, 2, 47, 26, 2, 40, 19, 3, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) { 610, 24, 8, 2, 47, 26, 2, 40, 19, 3, 31},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) { 600, 23, 8, 1, 46, 26, 2, 39, 18, 3, 30},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) { 590, 23, 8, 1, 46, 24, 2, 39, 17, 3, 30},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) { 580, 22, 8, 1, 46, 24, 2, 39, 17, 3, 29},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) { 570, 22, 8, 1, 45, 23, 2, 38, 17, 3, 29},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) { 560, 22, 7, 1, 45, 23, 2, 38, 16, 2, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) { 550, 21, 7, 1, 45, 23, 2, 38, 16, 2, 28},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) { 540, 21, 7, 1, 44, 22, 2, 37, 16, 2, 27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) { 530, 20, 7, 1, 44, 22, 1, 37, 15, 2, 27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) { 520, 20, 7, 1, 43, 21, 1, 37, 15, 2, 27},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) { 510, 20, 6, 1, 43, 21, 1, 36, 15, 2, 26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) { 500, 19, 6, 1, 43, 22, 1, 36, 15, 2, 26},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) { 490, 19, 6, 1, 42, 21, 1, 36, 15, 2, 25},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) { 480, 18, 6, 1, 42, 21, 1, 35, 15, 2, 25},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) { 470, 18, 6, 1, 42, 21, 1, 35, 15, 2, 24},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) { 460, 18, 6, 1, 41, 19, 1, 35, 13, 2, 24},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) { 450, 17, 5, 1, 41, 19, 1, 34, 13, 2, 23},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) { 440, 17, 5, 1, 41, 18, 1, 34, 13, 2, 23},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) { 430, 16, 5, 1, 40, 18, 0, 34, 12, 2, 22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) { 420, 16, 5, 1, 40, 18, 0, 33, 12, 2, 22},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) { 410, 16, 5, 1, 40, 17, 0, 33, 12, 1, 21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) { 400, 15, 5, 0, 39, 17, 0, 33, 11, 1, 21},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) { 390, 15, 4, 0, 39, 17, 0, 32, 12, 1, 20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) { 380, 14, 4, 0, 39, 17, 0, 32, 12, 1, 20},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) { 370, 14, 4, 0, 38, 17, 0, 32, 12, 1, 19},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) { 360, 14, 4, 0, 38, 15, 0, 31, 10, 1, 19},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) { 350, 13, 4, 0, 38, 15, 0, 31, 10, 1, 18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) { 340, 13, 3, 0, 37, 15, 0, 31, 10, 1, 18},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) { 330, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) { 320, 12, 3, 0, 37, 14, 0, 30, 9, 1, 17},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) { 310, 12, 3, 0, 36, 13, 0, 30, 9, 1, 16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) { 300, 11, 3, 0, 36, 13, 0, 29, 8, 1, 16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) { 290, 11, 2, 0, 36, 13, 0, 29, 8, 1, 15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) { 280, 10, 2, 0, 35, 12, 0, 29, 8, 1, 15},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) { 270, 10, 2, 0, 35, 12, 0, 28, 8, 0, 14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) { 260, 9, 2, 0, 35, 12, 0, 28, 8, 0, 14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) { 250, 9, 2, 0, 34, 12, 0, 28, 8, 0, 14},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) { 240, 9, 2, 0, 34, 12, 0, 27, 8, 0, 13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) { 230, 8, 1, 0, 34, 10, 0, 27, 6, 0, 13},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) { 220, 8, 1, 0, 33, 10, 0, 27, 6, 0, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) { 210, 7, 1, 0, 33, 10, 0, 26, 6, 0, 12},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) { 200, 7, 1, 0, 33, 9, 0, 26, 5, 0, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) { 190, 7, 1, 0, 32, 9, 0, 25, 5, 0, 11},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) { 180, 6, 1, 0, 32, 8, 0, 25, 5, 0, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) { 170, 6, 0, 0, 32, 8, 0, 25, 5, 0, 10},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) { 160, 5, 0, 0, 31, 8, 0, 24, 4, 0, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) { 150, 5, 0, 0, 31, 8, 0, 24, 5, 0, 9},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) { 140, 5, 0, 0, 31, 8, 0, 24, 5, 0, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) { 130, 4, 0, 0, 30, 6, 0, 23, 3, 0, 8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) { 120, 4, 0, 0, 30, 6, 0, 23, 3, 0, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) { 110, 3, 0, 0, 30, 6, 0, 23, 3, 0, 7},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) { 100, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) { 90, 3, 0, 0, 29, 5, 0, 22, 2, 0, 6},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) { 80, 2, 0, 0, 28, 5, 0, 22, 2, 0, 5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) static const
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) struct samsung_mipi_cphy_timing samsung_mipi_cphy_timing_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) { 3500, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) { 3490, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) { 3480, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) { 3470, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) { 3460, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) { 3450, 39, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) { 3440, 38, 50, 25, 29, 54, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) { 3430, 38, 50, 25, 29, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) { 3420, 38, 50, 25, 29, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) { 3410, 38, 50, 25, 29, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) { 3400, 38, 50, 25, 29, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) { 3390, 38, 50, 25, 29, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) { 3380, 38, 50, 25, 28, 53, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) { 3370, 38, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) { 3360, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) { 3350, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) { 3340, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) { 3330, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) { 3320, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) { 3310, 37, 50, 25, 28, 52, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) { 3300, 37, 50, 25, 28, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) { 3290, 37, 50, 25, 28, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) { 3280, 37, 50, 25, 28, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) { 3270, 36, 50, 25, 28, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) { 3260, 36, 50, 25, 27, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) { 3250, 36, 50, 25, 27, 51, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) { 3240, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) { 3230, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) { 3220, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) { 3210, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) { 3200, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) { 3190, 36, 50, 25, 27, 50, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) { 3180, 35, 50, 25, 27, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) { 3170, 35, 50, 25, 27, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) { 3160, 35, 50, 25, 27, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) { 3150, 35, 50, 25, 26, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) { 3140, 35, 50, 25, 26, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) { 3130, 35, 50, 25, 26, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) { 3120, 35, 50, 25, 26, 49, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) { 3110, 35, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) { 3100, 34, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) { 3090, 34, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) { 3080, 34, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) { 3070, 34, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) { 3060, 34, 50, 25, 26, 48, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) { 3050, 34, 50, 25, 26, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) { 3040, 34, 50, 25, 26, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) { 3030, 34, 50, 25, 25, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) { 3020, 34, 50, 25, 25, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) { 3010, 33, 50, 25, 25, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) { 3000, 33, 50, 25, 25, 47, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) { 2990, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) { 2980, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) { 2970, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) { 2960, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) { 2950, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) { 2940, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) { 2930, 33, 50, 25, 25, 46, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) { 2920, 32, 50, 25, 25, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) { 2910, 32, 50, 25, 24, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) { 2900, 32, 50, 25, 24, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) { 2890, 32, 50, 25, 24, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) { 2880, 32, 50, 25, 24, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) { 2870, 32, 50, 25, 24, 45, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) { 2860, 32, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) { 2850, 32, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) { 2840, 31, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) { 2830, 31, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) { 2820, 31, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) { 2810, 31, 50, 25, 24, 44, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) { 2800, 31, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) { 2790, 31, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) { 2780, 31, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) { 2770, 31, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) { 2760, 31, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) { 2750, 30, 50, 25, 23, 43, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) { 2740, 30, 50, 25, 23, 43, 1 },
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) { 2720, 30, 50, 25, 23, 42, 1 },
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) { 2640, 29, 50, 25, 22, 41, 1 },
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) { 2500, 28, 50, 25, 21, 39, 1 },
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) { 2400, 26, 50, 25, 20, 37, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) { 2390, 26, 50, 25, 20, 37, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) { 2380, 26, 50, 25, 20, 37, 1 },
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) { 2360, 26, 50, 25, 20, 37, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) { 2350, 26, 50, 25, 20, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) { 2340, 26, 50, 25, 20, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) { 2330, 26, 50, 25, 19, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) { 2320, 25, 50, 25, 19, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) { 2310, 25, 50, 25, 19, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) { 2300, 25, 50, 25, 19, 36, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) { 2290, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) { 2280, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) { 2270, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) { 2260, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) { 2250, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) { 2240, 25, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) { 2230, 24, 50, 25, 19, 35, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) { 2220, 24, 50, 25, 19, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) { 2210, 24, 50, 25, 18, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) { 2200, 24, 50, 25, 18, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) { 2190, 24, 50, 25, 18, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) { 2180, 24, 50, 25, 18, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) { 2170, 24, 50, 25, 18, 34, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) { 2160, 24, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) { 2150, 24, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) { 2140, 23, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) { 2130, 23, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) { 2120, 23, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) { 2110, 23, 50, 25, 18, 33, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) { 2100, 23, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) { 2090, 23, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) { 2080, 23, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) { 2070, 23, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) { 2060, 22, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) { 2050, 22, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) { 2040, 22, 50, 25, 17, 32, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) { 2030, 22, 50, 25, 17, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) { 2020, 22, 50, 25, 17, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) { 2010, 22, 50, 25, 17, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) { 2000, 22, 50, 25, 17, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) { 1990, 22, 50, 25, 17, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) { 1980, 22, 50, 25, 16, 31, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) { 1970, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) { 1960, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) { 1950, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) { 1940, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) { 1930, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) { 1920, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) { 1910, 21, 50, 25, 16, 30, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) { 1900, 21, 50, 25, 16, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) { 1890, 21, 50, 25, 16, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) { 1880, 20, 50, 25, 16, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) { 1870, 20, 50, 25, 16, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) { 1860, 20, 50, 25, 15, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) { 1850, 20, 50, 25, 15, 29, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) { 1840, 20, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) { 1830, 20, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) { 1820, 20, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) { 1810, 20, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) { 1800, 19, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) { 1790, 19, 50, 25, 15, 28, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) { 1780, 19, 50, 25, 15, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) { 1770, 19, 50, 25, 15, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) { 1760, 19, 50, 25, 15, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) { 1750, 19, 50, 25, 14, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) { 1740, 19, 50, 25, 14, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) { 1730, 19, 50, 25, 14, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) { 1720, 19, 50, 25, 14, 27, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) { 1710, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) { 1700, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) { 1690, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) { 1680, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) { 1670, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) { 1660, 18, 50, 25, 14, 26, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) { 1650, 18, 50, 25, 14, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) { 1640, 18, 50, 25, 14, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) { 1630, 18, 50, 25, 13, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) { 1620, 17, 50, 25, 13, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) { 1610, 17, 50, 25, 13, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) { 1600, 17, 50, 25, 13, 25, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) { 1590, 17, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) { 1580, 17, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) { 1570, 17, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) { 1560, 17, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) { 1550, 17, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) { 1540, 16, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) { 1530, 16, 50, 25, 13, 24, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) { 1520, 16, 50, 25, 13, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) { 1510, 16, 50, 25, 12, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) { 1500, 16, 50, 25, 12, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) { 1490, 16, 50, 25, 12, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) { 1480, 16, 50, 25, 12, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) { 1470, 16, 50, 25, 12, 23, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) { 1460, 16, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) { 1450, 15, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) { 1440, 15, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) { 1430, 15, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) { 1420, 15, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) { 1410, 15, 50, 25, 12, 22, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) { 1400, 15, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) { 1390, 15, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) { 1380, 15, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) { 1370, 15, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) { 1360, 14, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) { 1350, 14, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) { 1340, 14, 50, 25, 11, 21, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) { 1330, 14, 50, 25, 11, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) { 1320, 14, 50, 25, 11, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) { 1310, 14, 50, 25, 11, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) { 1300, 14, 50, 25, 11, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) { 1290, 14, 50, 25, 11, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) { 1280, 13, 50, 25, 10, 20, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) { 1270, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) { 1260, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) { 1250, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) { 1240, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) { 1230, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) { 1220, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) { 1210, 13, 50, 25, 10, 19, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) { 1200, 13, 50, 25, 10, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) { 1190, 12, 50, 25, 10, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) { 1180, 12, 50, 25, 10, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) { 1170, 12, 50, 25, 10, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) { 1160, 12, 50, 25, 9, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) { 1150, 12, 50, 25, 9, 18, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) { 1140, 12, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) { 1130, 12, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) { 1120, 12, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) { 1110, 12, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) { 1100, 11, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) { 1090, 11, 50, 25, 9, 17, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) { 1080, 11, 50, 25, 9, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) { 1070, 11, 50, 25, 9, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) { 1060, 11, 50, 25, 9, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) { 1050, 11, 50, 25, 8, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) { 1040, 11, 50, 25, 8, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) { 1030, 11, 50, 25, 8, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) { 1020, 10, 50, 25, 8, 16, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) { 1010, 10, 50, 25, 8, 15, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) { 1000, 10, 50, 25, 8, 15, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) { 990, 10, 50, 25, 8, 15, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) { 980, 10, 50, 25, 8, 15, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) { 970, 10, 50, 25, 8, 15, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) { 960, 10, 50, 25, 8, 15, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) { 950, 10, 50, 25, 8, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) { 940, 10, 50, 25, 8, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) { 930, 9, 50, 25, 7, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) { 920, 9, 50, 25, 7, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) { 910, 9, 50, 25, 7, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) { 900, 9, 50, 25, 7, 14, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) { 890, 9, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) { 880, 9, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) { 870, 9, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) { 860, 9, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) { 850, 9, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) { 840, 8, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) { 830, 8, 50, 25, 7, 13, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) { 820, 8, 50, 25, 7, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) { 810, 8, 50, 25, 6, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) { 800, 8, 50, 25, 6, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) { 790, 8, 50, 25, 6, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) { 780, 8, 50, 25, 6, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) { 770, 8, 50, 25, 6, 12, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) { 760, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) { 750, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) { 740, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) { 730, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) { 720, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) { 710, 7, 50, 25, 6, 11, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) { 700, 7, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) { 690, 7, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) { 680, 7, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) { 670, 6, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) { 660, 6, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) { 650, 6, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) { 640, 6, 50, 25, 5, 10, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) { 630, 6, 50, 25, 5, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) { 620, 6, 50, 25, 5, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) { 610, 6, 50, 25, 5, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) { 600, 6, 50, 25, 5, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) { 590, 6, 50, 25, 5, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) { 580, 5, 50, 25, 4, 9, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) { 570, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) { 560, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) { 550, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) { 540, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) { 530, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) { 520, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) { 510, 5, 50, 25, 4, 8, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) { 500, 4, 50, 25, 4, 7, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) { 490, 18, 50, 25, 14, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) { 480, 17, 50, 25, 14, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) { 470, 17, 50, 25, 14, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) { 460, 17, 50, 25, 13, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) { 450, 16, 50, 25, 13, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) { 440, 16, 50, 25, 13, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) { 430, 15, 50, 25, 12, 6, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) { 420, 15, 50, 25, 12, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) { 410, 15, 50, 25, 12, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) { 400, 14, 50, 25, 11, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) { 390, 14, 50, 25, 11, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) { 380, 13, 50, 25, 11, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) { 370, 13, 50, 25, 11, 5, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) { 360, 13, 50, 25, 10, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) { 350, 12, 50, 25, 10, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) { 340, 12, 50, 25, 10, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) { 330, 11, 50, 25, 9, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) { 320, 11, 50, 25, 9, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) { 310, 11, 50, 25, 9, 4, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) { 300, 10, 50, 25, 8, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) { 290, 10, 50, 25, 8, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) { 280, 9, 50, 25, 8, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) { 270, 9, 50, 25, 8, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) { 260, 8, 50, 25, 7, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) { 250, 8, 50, 25, 7, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) { 240, 8, 50, 25, 7, 3, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) { 230, 7, 50, 25, 6, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) { 220, 7, 50, 25, 6, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) { 210, 6, 50, 25, 6, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) { 200, 6, 50, 25, 5, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) { 190, 6, 50, 25, 5, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) { 180, 5, 50, 25, 5, 2, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) { 170, 5, 50, 25, 5, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) { 160, 4, 50, 25, 4, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) { 150, 4, 50, 25, 4, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) { 140, 4, 50, 25, 4, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) { 130, 3, 50, 25, 3, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) { 120, 3, 50, 25, 3, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) { 110, 2, 50, 25, 3, 1, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) { 100, 2, 50, 25, 2, 0, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) { 90, 2, 50, 25, 2, 0, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) { 80, 1, 50, 25, 2, 0, 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) struct hsfreq_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u32 range_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) u16 cfg_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) /* These tables must be sorted by .range_h ascending. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) static const struct hsfreq_range samsung_dphy_rx_hsfreq_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) { 80, 0x105}, { 100, 0x106}, { 120, 0x107}, { 140, 0x108},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) { 160, 0x109}, { 180, 0x10a}, { 200, 0x10b}, { 220, 0x10c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) { 240, 0x10d}, { 270, 0x10e}, { 290, 0x10f}, { 310, 0x110},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) { 330, 0x111}, { 350, 0x112}, { 370, 0x113}, { 390, 0x114},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) { 410, 0x115}, { 430, 0x116}, { 450, 0x117}, { 470, 0x118},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) { 490, 0x119}, { 510, 0x11a}, { 540, 0x11b}, { 560, 0x11c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) { 580, 0x11d}, { 600, 0x11e}, { 620, 0x11f}, { 640, 0x120},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) { 660, 0x121}, { 680, 0x122}, { 700, 0x123}, { 720, 0x124},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) { 740, 0x125}, { 760, 0x126}, { 790, 0x127}, { 810, 0x128},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) { 830, 0x129}, { 850, 0x12a}, { 870, 0x12b}, { 890, 0x12c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) { 910, 0x12d}, { 930, 0x12e}, { 950, 0x12f}, { 970, 0x130},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) { 990, 0x131}, {1010, 0x132}, {1030, 0x133}, {1060, 0x134},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) {1080, 0x135}, {1100, 0x136}, {1120, 0x137}, {1140, 0x138},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) {1160, 0x139}, {1180, 0x13a}, {1200, 0x13b}, {1220, 0x13c},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) {1240, 0x13d}, {1260, 0x13e}, {1280, 0x13f}, {1310, 0x140},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) {1330, 0x141}, {1350, 0x142}, {1370, 0x143}, {1390, 0x144},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) {1410, 0x145}, {1430, 0x146}, {1450, 0x147}, {1470, 0x148},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) {1490, 0x149}, {1580, 0x007}, {1740, 0x008}, {1910, 0x009},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) {2070, 0x00a}, {2240, 0x00b}, {2410, 0x00c}, {2570, 0x00d},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) {2740, 0x00e}, {2910, 0x00f}, {3070, 0x010}, {3240, 0x011},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) {3410, 0x012}, {3570, 0x013}, {3740, 0x014}, {3890, 0x015},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) {4070, 0x016}, {4240, 0x017}, {4400, 0x018}, {4500, 0x019},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) /* These tables must be sorted by .range_h ascending. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) static const struct hsfreq_range samsung_cphy_rx_hsfreq_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) { 500, 0x102}, { 990, 0x002}, { 2500, 0x001},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) static void samsung_mipi_dcphy_bias_block_enable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) struct csi2_dphy *csi_dphy = samsung->dphy_dev[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) u32 bias_con2 = 0x3223;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) if (csi_dphy &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) csi_dphy->dphy_param.lp_vol_ref != 3 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) csi_dphy->dphy_param.lp_vol_ref < 0x7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) bias_con2 &= 0xfffffff8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) bias_con2 |= csi_dphy->dphy_param.lp_vol_ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) dev_info(samsung->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) "rx change lp_vol_ref to %d, it may cause tx exception\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) csi_dphy->dphy_param.lp_vol_ref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) regmap_write(samsung->regmap, BIAS_CON0, 0x0010);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) regmap_write(samsung->regmap, BIAS_CON1, 0x0110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) regmap_write(samsung->regmap, BIAS_CON2, bias_con2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) /* default output voltage select:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) * dphy: 400mv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) * cphy: 530mv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) if (samsung->c_option)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) regmap_update_bits(samsung->regmap, BIAS_CON4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) I_MUX_SEL_MASK, I_MUX_SEL(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) static void samsung_mipi_dcphy_bias_block_disable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) static void samsung_mipi_dphy_lane_enable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) switch (samsung->lanes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) static void samsung_mipi_cphy_lane_enable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1, T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1, T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1, T_PHY_READY(0x2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) static void samsung_mipi_dphy_lane_disable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) static void samsung_mipi_cphy_lane_disable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) static void samsung_mipi_dcphy_pll_configure(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) regmap_update_bits(samsung->regmap, PLL_CON0, S_MASK | P_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) S(samsung->pll.scaler) | P(samsung->pll.prediv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) if (samsung->pll.dsm < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) u16 dsm_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) /* Using opposite number subtraction to find complement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) dsm_tmp = abs(samsung->pll.dsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) dsm_tmp = dsm_tmp - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) dsm_tmp ^= 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) regmap_write(samsung->regmap, PLL_CON1, dsm_tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) regmap_write(samsung->regmap, PLL_CON1, samsung->pll.dsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) regmap_update_bits(samsung->regmap, PLL_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) M_MASK, M(samsung->pll.fbdiv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) if (samsung->pll.ssc_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) regmap_write(samsung->regmap, PLL_CON3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) regmap_update_bits(samsung->regmap, PLL_CON4, SSCG_EN, SSCG_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) regmap_write(samsung->regmap, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) regmap_write(samsung->regmap, PLL_CON7, PLL_LOCK_CNT(0xf000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) regmap_write(samsung->regmap, PLL_CON8, PLL_STB_CNT(0xf000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) static void samsung_mipi_dcphy_pll_enable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) u32 sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, PLL_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) ret = regmap_read_poll_timeout(samsung->regmap, PLL_STAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) sts, (sts & PLL_LOCK), 1000, 20000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) dev_err(samsung->dev, "DC-PHY pll is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) static void samsung_mipi_dcphy_pll_disable(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) static const struct samsung_mipi_dphy_timing *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) samsung_mipi_dphy_get_timing(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) const struct samsung_mipi_dphy_timing *timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) unsigned int num_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) unsigned int lane_mbps = div64_ul(samsung->pll.rate, USEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) timings = samsung_mipi_dphy_timing_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) num_timings = ARRAY_SIZE(samsung_mipi_dphy_timing_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) for (i = num_timings; i > 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) if (lane_mbps <= timings[i - 1].max_lane_mbps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) ++i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) return &timings[i - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) static const struct samsung_mipi_cphy_timing *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) samsung_mipi_cphy_get_timing(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) const struct samsung_mipi_cphy_timing *timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) unsigned int num_timings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) unsigned int lane_msps = div64_ul(samsung->pll.rate, USEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) timings = samsung_mipi_cphy_timing_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) num_timings = ARRAY_SIZE(samsung_mipi_cphy_timing_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) for (i = num_timings; i > 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) if (lane_msps <= timings[i - 1].max_lane_msps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) ++i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) return &timings[i - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) static void samsung_mipi_cphy_timing_init(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) const struct samsung_mipi_cphy_timing *timing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) timing = samsung_mipi_cphy_get_timing(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if (lane_hs_rate < 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) val = HSTX_CLK_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) val |= T_LPX(timing->lpx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) val = T_HS_ZERO(timing->prebegin_3) | T_HS_PREPARE(timing->prepare_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->post_3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) /* TTA-GET/TTA-GO Timing Counter register use default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) val = T_TA_GET(0x3) | T_TA_GO(0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) /* Escape Clock is 20.00MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) /* set T_ERR_SOT_SYNC default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) static unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) samsung_mipi_dcphy_pll_round_rate(struct samsung_mipi_dcphy *samsung,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) unsigned long prate, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) u8 *prediv, u16 *fbdiv, int *dsm, u8 *scaler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) u64 max_fout = samsung->c_option ? MAX_CPHY_BW : MAX_DPHY_BW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) u64 best_freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) u64 fin, fvco, fout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) u8 min_prediv, max_prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) u8 _prediv, best_prediv = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) u16 _fbdiv, best_fbdiv = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) u8 _scaler, best_scaler = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) u32 min_delta = UINT_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) long _dsm, best_dsm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) * The PLL output frequency can be calculated using a simple formula:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) * Fvco = ((m+k/65536) x 2 x Fin) / p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) * Fout = ((m+k/65536) x 2 x Fin) / (p x 2^s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) fin = div64_ul(prate, MSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) while (!best_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) fout = div64_ul(rate, MSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) if (fout > max_fout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) fout = max_fout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) /* 0 ≤ S[2:0] ≤ 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) for (_scaler = 0; _scaler < 7; _scaler++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) fvco = fout << _scaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) * 2600MHz ≤ FVCO ≤ 6600MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) if (fvco < 2600 * MSEC_PER_SEC || fvco > 6600 * MSEC_PER_SEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) /* 6MHz ≤ Fref(Fin / p) ≤ 30MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) min_prediv = DIV_ROUND_UP_ULL(fin, 30 * MSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) max_prediv = DIV_ROUND_CLOSEST_ULL(fin, 6 * MSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) u64 delta, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) _fbdiv = DIV_ROUND_CLOSEST_ULL(fvco * _prediv, 2 * fin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) /* 64 ≤ M[9:0] ≤ 1023 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) if ((_fbdiv < 64) || (_fbdiv > 1023))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) /* -32767 ≤ K[15:0] ≤ 32767 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) _dsm = ((_prediv * fvco) - (2 * _fbdiv * fin));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) _dsm = DIV_ROUND_UP_ULL(_dsm << 15, fin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) if (abs(_dsm) > 32767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) tmp = DIV_ROUND_CLOSEST_ULL((_fbdiv * fin * 2 * 1000), _prediv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) tmp += DIV_ROUND_CLOSEST_ULL((_dsm * fin * 1000), _prediv << 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) delta = abs(fvco * MSEC_PER_SEC - tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) if (delta < min_delta) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) best_prediv = _prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) best_fbdiv = _fbdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) best_dsm = _dsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) best_scaler = _scaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) min_delta = delta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) best_freq = DIV_ROUND_CLOSEST_ULL(tmp, 1000) * MSEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) rate += 100 * MSEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) *prediv = best_prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) *fbdiv = best_fbdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) *dsm = (int)best_dsm & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) *scaler = best_scaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) dev_dbg(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) best_prediv, best_fbdiv, best_dsm, best_scaler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) return best_freq >> best_scaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) samsung_mipi_dphy_clk_lane_timing_init(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) const struct samsung_mipi_dphy_timing *timing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) timing = samsung_mipi_dphy_get_timing(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) regmap_write(samsung->regmap, DPHY_MC_GNR_CON0, 0xf000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) regmap_write(samsung->regmap, DPHY_MC_ANA_CON0, 0x7133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) if (lane_hs_rate >= 4500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) regmap_write(samsung->regmap, DPHY_MC_ANA_CON1, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) if (lane_hs_rate < 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) val = HSTX_CLK_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) val |= T_LPX(timing->lpx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) regmap_write(samsung->regmap, DPHY_MC_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) regmap_write(samsung->regmap, DPHY_MC_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) regmap_write(samsung->regmap, DPHY_MC_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) val = T_CLK_POST(timing->clk_post);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) regmap_write(samsung->regmap, DPHY_MC_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) /* Escape Clock is 20.00MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) regmap_write(samsung->regmap, DPHY_MC_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) * skew calibration should be off, if the operation data rate is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) * under 1.5Gbps or equal to 1.5Gbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) if (lane_hs_rate > 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) regmap_write(samsung->regmap, DPHY_MC_DESKEW_CON0, 0x9cb1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) samsung_mipi_dphy_data_lane_timing_init(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) const struct samsung_mipi_dphy_timing *timing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) timing = samsung_mipi_dphy_get_timing(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) regmap_write(samsung->regmap, COMBO_MD0_ANA_CON0, 0x7133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) regmap_write(samsung->regmap, COMBO_MD1_ANA_CON0, 0x7133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) regmap_write(samsung->regmap, COMBO_MD2_ANA_CON0, 0x7133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) regmap_write(samsung->regmap, DPHY_MD3_ANA_CON0, 0x7133);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) if (lane_hs_rate >= 4500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) regmap_write(samsung->regmap, COMBO_MD0_ANA_CON1, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) regmap_write(samsung->regmap, COMBO_MD1_ANA_CON1, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) regmap_write(samsung->regmap, COMBO_MD2_ANA_CON1, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) regmap_write(samsung->regmap, DPHY_MD3_ANA_CON1, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) * Divide-by-2 Clock from Serial Clock. Use this when data rate is under
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) if (lane_hs_rate < 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) val = HSTX_CLK_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) val |= T_LPX(timing->lpx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) /* T_LP_EXIT_SKEW/T_LP_ENTRY_SKEW unconfig */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON2, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) /* TTA-GET/TTA-GO Timing Counter register use default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) val = T_TA_GET(0x3) | T_TA_GO(0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON3, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) /* Escape Clock is 20.00MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) regmap_write(samsung->regmap, COMBO_MD0_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) regmap_write(samsung->regmap, COMBO_MD1_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) regmap_write(samsung->regmap, COMBO_MD2_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) regmap_write(samsung->regmap, DPHY_MD3_TIME_CON4, 0x1f4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) samsung_mipi_dcphy_hs_vreg_amp_configure(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) regmap_write(samsung->regmap, DPHY_MC_ANA_CON2, HS_VREG_AMP_ICON(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) static void samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) reset_control_assert(samsung->m_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) samsung_mipi_dcphy_bias_block_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) samsung_mipi_dcphy_pll_configure(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) samsung_mipi_dphy_clk_lane_timing_init(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) samsung_mipi_dphy_data_lane_timing_init(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) samsung_mipi_dcphy_pll_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) samsung_mipi_dphy_lane_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) reset_control_deassert(samsung->m_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) /* The TSKEWCAL maximum is 100 µsec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) * at initial calibration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) usleep_range(100, 110);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) static void samsung_mipi_cphy_power_on(struct samsung_mipi_dcphy *samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) regmap_write(samsung->grf_regmap, MIPI_DCPHY_GRF_CON0, M_CPHY_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) reset_control_assert(samsung->m_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) samsung_mipi_dcphy_bias_block_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) samsung_mipi_dcphy_hs_vreg_amp_configure(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) samsung_mipi_dcphy_pll_configure(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) samsung_mipi_cphy_timing_init(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) samsung_mipi_dcphy_pll_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) samsung_mipi_cphy_lane_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) reset_control_deassert(samsung->m_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) static int samsung_mipi_dcphy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) enum phy_mode mode = phy_get_mode(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) pm_runtime_get_sync(samsung->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) reset_control_assert(samsung->apb_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) reset_control_deassert(samsung->apb_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) case PHY_MODE_MIPI_DPHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) samsung_mipi_dphy_power_on(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) samsung_mipi_cphy_power_on(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) static int samsung_mipi_dcphy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) enum phy_mode mode = phy_get_mode(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) case PHY_MODE_MIPI_DPHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) samsung_mipi_dphy_lane_disable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) samsung_mipi_cphy_lane_disable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) samsung_mipi_dcphy_pll_disable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) samsung_mipi_dcphy_bias_block_disable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) pm_runtime_put(samsung->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) static int samsung_mipi_dcphy_set_mode(struct phy *phy, enum phy_mode mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) int submode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) samsung_mipi_dcphy_pll_ssc_modulation_calc(struct samsung_mipi_dcphy *samsung,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) u8 *mfr, u8 *mrr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) unsigned long fin = div64_ul(clk_get_rate(samsung->ref_clk), MSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) u16 prediv = samsung->pll.prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) u16 fbdiv = samsung->pll.fbdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) u16 min_mfr, max_mfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) u16 _mfr, best_mfr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) u16 mr, _mrr, best_mrr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) /* 20KHz ≤ MF ≤ 150KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) max_mfr = DIV_ROUND_UP(fin, (20 * prediv) << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) min_mfr = div64_ul(fin, ((150 * prediv) << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) /*0 ≤ mfr ≤ 255 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) if (max_mfr > 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) max_mfr = 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) for (_mfr = min_mfr; _mfr < max_mfr; _mfr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) /* 1 ≤ mrr ≤ 31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) for (_mrr = 1; _mrr < 32; _mrr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) mr = DIV_ROUND_UP(_mfr * _mrr * 100, fbdiv << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) /* 0 ≤ MR ≤ 5% */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) if (mr > 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) if (_mfr * _mrr < 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) best_mfr = _mfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) best_mrr = _mrr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) if (best_mrr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) *mfr = best_mfr & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) *mrr = best_mrr & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) samsung_mipi_dcphy_pll_calc_rate(struct samsung_mipi_dcphy *samsung,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) unsigned long long rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) unsigned long prate = clk_get_rate(samsung->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) unsigned long fout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) u8 scaler = 0, mfr = 0, mrr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) u16 fbdiv = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) u8 prediv = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) int dsm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) fout = samsung_mipi_dcphy_pll_round_rate(samsung, prate, rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) &prediv, &fbdiv, &dsm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) &scaler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) dev_dbg(samsung->dev, "%s: fin=%lu, req_rate=%llu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) __func__, prate, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) dev_dbg(samsung->dev, "%s: fout=%lu, prediv=%u, fbdiv=%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) __func__, fout, prediv, fbdiv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) samsung->pll.prediv = prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) samsung->pll.fbdiv = fbdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) samsung->pll.dsm = dsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) samsung->pll.scaler = scaler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) samsung->pll.rate = fout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) * All DPHY 2.0 compliant Transmitters shall support SSC operating above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) * 2.5 Gbps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) if (fout > 2500000000LL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) ret = samsung_mipi_dcphy_pll_ssc_modulation_calc(samsung,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) &mfr, &mrr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) samsung->pll.ssc_en = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) samsung->pll.mfr = mfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) samsung->pll.mrr = mrr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) static int samsung_mipi_dcphy_configure(struct phy *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) union phy_configure_opts *opts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) unsigned long long target_rate = opts->mipi_dphy.hs_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) enum phy_mode mode = phy_get_mode(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) samsung->c_option = (mode == PHY_MODE_MIPI_DPHY) ? false : true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) samsung->lanes = opts->mipi_dphy.lanes > 4 ? 4 : opts->mipi_dphy.lanes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) samsung_mipi_dcphy_pll_calc_rate(samsung, target_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) opts->mipi_dphy.hs_clk_rate = samsung->pll.rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) static struct v4l2_subdev *get_remote_sensor(struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) struct media_pad *local, *remote;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) struct media_entity *sensor_me;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) local = &sd->entity.pads[CSI2_DPHY_RX_PAD_SINK];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) remote = media_entity_remote_pad(local);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) if (!remote) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) v4l2_warn(sd, "No link between dphy and sensor\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) sensor_me = media_entity_remote_pad(local)->entity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) return media_entity_to_v4l2_subdev(sensor_me);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) static struct csi2_sensor *sd_to_sensor(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) for (i = 0; i < dphy->num_sensors; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) if (dphy->sensors[i].sd == sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) return &dphy->sensors[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) static void samsung_dcphy_rx_config_settle(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) struct csi2_sensor *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) const struct hsfreq_range *hsfreq_ranges = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) int num_hsfreq_ranges = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) int i, hsfreq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) u32 sot_sync = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) hsfreq_ranges = samsung_dphy_rx_hsfreq_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) num_hsfreq_ranges = ARRAY_SIZE(samsung_dphy_rx_hsfreq_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) sot_sync = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) } else if (sensor->mbus.type == V4L2_MBUS_CSI2_CPHY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) hsfreq_ranges = samsung_cphy_rx_hsfreq_ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) num_hsfreq_ranges = ARRAY_SIZE(samsung_cphy_rx_hsfreq_ranges);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) sot_sync = 0x32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) dev_err(dphy->dev, "mbus type %d is not support",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) sensor->mbus.type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) /* set data lane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) for (i = 0; i < num_hsfreq_ranges; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) if (hsfreq_ranges[i].range_h >= dphy->data_rate_mbps) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) hsfreq = hsfreq_ranges[i].cfg_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) if (i == num_hsfreq_ranges) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) i = num_hsfreq_ranges - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) dev_warn(dphy->dev, "data rate: %lld mbps, max support %d mbps",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) dphy->data_rate_mbps, hsfreq_ranges[i].range_h + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) hsfreq = hsfreq_ranges[i].cfg_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) /*clk settle fix to 0x301*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) regmap_write(samsung->regmap, RX_CLK_THS_SETTLE, 0x301);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) if (sensor->lanes > 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) regmap_update_bits(samsung->regmap, RX_LANE0_THS_SETTLE, 0x1ff, hsfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) regmap_update_bits(samsung->regmap, RX_LANE0_ERR_SOT_SYNC, 0xff, sot_sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) if (sensor->lanes > 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) regmap_update_bits(samsung->regmap, RX_LANE1_THS_SETTLE, 0x1ff, hsfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) regmap_update_bits(samsung->regmap, RX_LANE1_ERR_SOT_SYNC, 0xff, sot_sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) if (sensor->lanes > 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) regmap_update_bits(samsung->regmap, RX_LANE2_THS_SETTLE, 0x1ff, hsfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) regmap_update_bits(samsung->regmap, RX_LANE2_ERR_SOT_SYNC, 0xff, sot_sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) if (sensor->lanes > 0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) regmap_update_bits(samsung->regmap, RX_LANE3_THS_SETTLE, 0x1ff, hsfreq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) regmap_update_bits(samsung->regmap, RX_LANE3_ERR_SOT_SYNC, 0xff, sot_sync);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) static int samsung_dcphy_rx_config_common(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) struct csi2_sensor *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) u32 dlysel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) if (dphy->data_rate_mbps < 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) dlysel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) else if (dphy->data_rate_mbps < 2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) dlysel = 3 << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) else if (dphy->data_rate_mbps < 3000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) dlysel = 2 << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) else if (dphy->data_rate_mbps < 4000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) dlysel = 1 << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) else if (dphy->data_rate_mbps < 6500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) dlysel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) if (dphy->dphy_param.clk_hs_term_sel > 0x7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) dev_err(dphy->dev, "clk_hs_term_sel error param %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) dphy->dphy_param.clk_hs_term_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) for (i = 0; i < sensor->lanes; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) if (dphy->dphy_param.data_hs_term_sel[i] > 0x7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) dev_err(dphy->dev, "data_hs_term_sel[%d] error param %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) dphy->dphy_param.data_hs_term_sel[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) if (dphy->dphy_param.lp_hys_sw[i] > 0x3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) dev_err(dphy->dev, "lp_hys_sw[%d] error param %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) dphy->dphy_param.lp_hys_sw[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) if (dphy->dphy_param.lp_escclk_pol_sel[i] > 0x1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) dev_err(dphy->dev, "lp_escclk_pol_sel[%d] error param %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) dphy->dphy_param.lp_escclk_pol_sel[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) if (dphy->dphy_param.skew_data_cal_clk[i] > 0x1f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) dev_err(dphy->dev, "skew_data_cal_clk[%d] error param %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) dphy->dphy_param.skew_data_cal_clk[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) regmap_write(samsung->regmap, RX_S0C_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) regmap_write(samsung->regmap, RX_S0C_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) regmap_write(samsung->regmap, RX_S0C_ANA_CON2, dphy->dphy_param.clk_hs_term_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) regmap_write(samsung->regmap, RX_S0C_ANA_CON3, 0x0600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) if (sensor->lanes > 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) regmap_write(samsung->regmap, RX_COMBO_S0D0_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON2, dlysel |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) dphy->dphy_param.data_hs_term_sel[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON3, 0x0600 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) (dphy->dphy_param.lp_hys_sw[0] << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) (dphy->dphy_param.lp_escclk_pol_sel[0] << 11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) regmap_write(samsung->regmap, RX_COMBO_S0D0_DESKEW_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) dphy->dphy_param.skew_data_cal_clk[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) if (sensor->lanes > 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) regmap_write(samsung->regmap, RX_COMBO_S0D1_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON2, dlysel |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) dphy->dphy_param.data_hs_term_sel[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON3, 0x0600 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) (dphy->dphy_param.lp_hys_sw[1] << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) (dphy->dphy_param.lp_escclk_pol_sel[1] << 11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) regmap_write(samsung->regmap, RX_COMBO_S0D1_DESKEW_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) dphy->dphy_param.skew_data_cal_clk[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) if (sensor->lanes > 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) regmap_write(samsung->regmap, RX_COMBO_S0D2_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON2, dlysel |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) dphy->dphy_param.data_hs_term_sel[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON3, 0x0600 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) (dphy->dphy_param.lp_hys_sw[2] << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) (dphy->dphy_param.lp_escclk_pol_sel[2] << 11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) regmap_write(samsung->regmap, RX_COMBO_S0D2_DESKEW_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) dphy->dphy_param.skew_data_cal_clk[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) if (sensor->lanes > 0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) regmap_write(samsung->regmap, RX_S0D3_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) regmap_write(samsung->regmap, RX_S0D3_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) regmap_write(samsung->regmap, RX_S0D3_ANA_CON2, dlysel |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) dphy->dphy_param.data_hs_term_sel[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) regmap_write(samsung->regmap, RX_S0D3_ANA_CON3, 0x0600 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) (dphy->dphy_param.lp_hys_sw[3] << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) (dphy->dphy_param.lp_escclk_pol_sel[3] << 11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) regmap_write(samsung->regmap, RX_S0D3_DESKEW_CON2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) dphy->dphy_param.skew_data_cal_clk[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) if (sensor->lanes > 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) regmap_write(samsung->regmap, RX_COMBO_S0D0_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON2, 0x5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON3, 0x600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON6, 0x608);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) regmap_write(samsung->regmap, RX_COMBO_S0D0_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) regmap_write(samsung->regmap, RX_COMBO_S0D0_CRC_CON1, 0x1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) regmap_write(samsung->regmap, RX_COMBO_S0D0_CRC_CON2, 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) if (sensor->lanes > 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) regmap_write(samsung->regmap, RX_COMBO_S0D1_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON2, 0x5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON3, 0x600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON6, 0x608);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) regmap_write(samsung->regmap, RX_COMBO_S0D1_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) regmap_write(samsung->regmap, RX_COMBO_S0D1_CRC_CON1, 0x1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) regmap_write(samsung->regmap, RX_COMBO_S0D1_CRC_CON2, 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) if (sensor->lanes > 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) regmap_write(samsung->regmap, RX_COMBO_S0D2_GNR_CON1, 0x1450);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON1, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON2, 0x5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON3, 0x600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON6, 0x608);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) regmap_write(samsung->regmap, RX_COMBO_S0D2_ANA_CON7, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) regmap_write(samsung->regmap, RX_COMBO_S0D2_CRC_CON1, 0x1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) regmap_write(samsung->regmap, RX_COMBO_S0D2_CRC_CON2, 0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) static int samsung_dcphy_rx_lane_enable(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) struct csi2_sensor *sensor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) u32 sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) regmap_update_bits(samsung->regmap, RX_CLK_LANE_ENABLE, PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) if (sensor->lanes > 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) regmap_update_bits(samsung->regmap, RX_DATA_LANE0_ENABLE, PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) if (sensor->lanes > 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) regmap_update_bits(samsung->regmap, RX_DATA_LANE1_ENABLE, PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) if (sensor->lanes > 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) regmap_update_bits(samsung->regmap, RX_DATA_LANE2_ENABLE, PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) if (sensor->lanes > 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) regmap_update_bits(samsung->regmap, RX_DATA_LANE3_ENABLE, PHY_ENABLE, PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) /*wait for clk lane ready*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) ret = regmap_read_poll_timeout(samsung->regmap, RX_CLK_LANE_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) sts, (sts & PHY_READY), 200, 4000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) dev_err(samsung->dev, "phy rx clk lane is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) /*wait for data lane ready*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) if (sensor->lanes > 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE0_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) sts, (sts & PHY_READY), 200, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) dev_err(samsung->dev, "phy rx data lane 0 is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) if (sensor->lanes > 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE1_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) sts, (sts & PHY_READY), 200, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) dev_err(samsung->dev, "phy rx data lane 1 is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) if (sensor->lanes > 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE2_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) sts, (sts & PHY_READY), 200, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) dev_err(samsung->dev, "phy rx data lane 2 is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) if (sensor->lanes > 0x03) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) ret = regmap_read_poll_timeout(samsung->regmap, RX_DATA_LANE3_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) sts, (sts & PHY_READY), 200, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) dev_err(samsung->dev, "phy rx data lane 3 is not locked\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) static int samsung_dcphy_rx_stream_on(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) struct csi2_sensor *sensor = sd_to_sensor(dphy, sensor_sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) mutex_lock(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) if (sensor->mbus.type == V4L2_MBUS_CSI2_CPHY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) regmap_write(samsung->grf_regmap, MIPI_DCPHY_GRF_CON0, S_CPHY_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) if (samsung->s_phy_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) reset_control_assert(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) samsung_mipi_dcphy_bias_block_enable(samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) ret = samsung_dcphy_rx_config_common(dphy, sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) goto out_streamon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) samsung_dcphy_rx_config_settle(dphy, sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) ret = samsung_dcphy_rx_lane_enable(dphy, sensor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) goto out_streamon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) if (samsung->s_phy_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) reset_control_deassert(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) atomic_inc(&samsung->stream_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) mutex_unlock(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) out_streamon:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) if (samsung->s_phy_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) reset_control_deassert(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) mutex_unlock(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) dev_err(dphy->dev, "stream on error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) static int samsung_dcphy_rx_stream_off(struct csi2_dphy *dphy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) struct v4l2_subdev *sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) struct samsung_mipi_dcphy *samsung = dphy->samsung_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) struct csi2_sensor *sensor = sd_to_sensor(dphy, sensor_sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) if (atomic_dec_return(&samsung->stream_cnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) mutex_lock(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) if (samsung->s_phy_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) reset_control_assert(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) if (sensor->mbus.type == V4L2_MBUS_CSI2_DPHY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) regmap_update_bits(samsung->regmap, RX_CLK_LANE_ENABLE, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) if (sensor->lanes > 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) regmap_update_bits(samsung->regmap, RX_DATA_LANE0_ENABLE, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) if (sensor->lanes > 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) regmap_update_bits(samsung->regmap, RX_DATA_LANE1_ENABLE, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) if (sensor->lanes > 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) regmap_update_bits(samsung->regmap, RX_DATA_LANE2_ENABLE, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) if (sensor->lanes > 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) regmap_update_bits(samsung->regmap, RX_DATA_LANE3_ENABLE, PHY_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) if (samsung->s_phy_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) reset_control_deassert(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) usleep_range(500, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) mutex_unlock(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) static int samsung_mipi_dcphy_init(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) pm_runtime_get_sync(samsung->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) static int samsung_mipi_dcphy_exit(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) struct samsung_mipi_dcphy *samsung = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) pm_runtime_put(samsung->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) static const struct phy_ops samsung_mipi_dcphy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) .configure = samsung_mipi_dcphy_configure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) .set_mode = samsung_mipi_dcphy_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) .power_on = samsung_mipi_dcphy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) .power_off = samsung_mipi_dcphy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) .init = samsung_mipi_dcphy_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) .exit = samsung_mipi_dcphy_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) static const struct regmap_config samsung_mipi_dcphy_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) .name = "dcphy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) .reg_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) .val_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) .reg_stride = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) .max_register = 0x10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) static int samsung_mipi_dcphy_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) struct samsung_mipi_dcphy *samsung;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) struct phy_provider *phy_provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) samsung = devm_kzalloc(dev, sizeof(*samsung), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) if (!samsung)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) samsung->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) platform_set_drvdata(pdev, samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) regs = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) if (IS_ERR(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) return PTR_ERR(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) samsung->regmap = devm_regmap_init_mmio(dev, regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) &samsung_mipi_dcphy_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) if (IS_ERR(samsung->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) ret = PTR_ERR(samsung->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) dev_err(dev, "failed to init regmap: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) samsung->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) if (IS_ERR(samsung->grf_regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) dev_err(dev, "Unable to get rockchip,grf\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) return PTR_ERR(samsung->grf_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) samsung->ref_clk = devm_clk_get(dev, "ref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) if (IS_ERR(samsung->ref_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) dev_err(dev, "failed to get reference clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) return PTR_ERR(samsung->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) samsung->pclk = devm_clk_get(dev, "pclk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) if (IS_ERR(samsung->pclk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) dev_err(dev, "failed to get pclk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) return PTR_ERR(samsung->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) samsung->m_phy_rst = devm_reset_control_get(dev, "m_phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) if (IS_ERR(samsung->m_phy_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) dev_err(dev, "failed to get system m_phy_rst control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) return PTR_ERR(samsung->m_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) samsung->s_phy_rst = devm_reset_control_get(dev, "s_phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) if (IS_ERR(samsung->s_phy_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) dev_err(dev, "failed to get system s_phy_rst control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) return PTR_ERR(samsung->s_phy_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) samsung->apb_rst = devm_reset_control_get(dev, "apb");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) if (IS_ERR(samsung->apb_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) dev_err(dev, "failed to get system apb_rst control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) return PTR_ERR(samsung->apb_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) samsung->grf_apb_rst = devm_reset_control_get(dev, "grf");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) if (IS_ERR(samsung->grf_apb_rst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) dev_err(dev, "failed to get system grf_apb_rst control\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) return PTR_ERR(samsung->grf_apb_rst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) phy = devm_phy_create(dev, NULL, &samsung_mipi_dcphy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) if (IS_ERR(phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) dev_err(dev, "failed to create MIPI Dc-PHY\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) return PTR_ERR(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) phy_set_drvdata(phy, samsung);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) if (IS_ERR(phy_provider)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) dev_err(dev, "failed to register phy provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) return PTR_ERR(phy_provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) samsung->stream_on = samsung_dcphy_rx_stream_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) samsung->stream_off = samsung_dcphy_rx_stream_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) mutex_init(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) static int samsung_mipi_dcphy_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) struct samsung_mipi_dcphy *samsung = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) pm_runtime_disable(samsung->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) mutex_destroy(&samsung->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) static __maybe_unused int samsung_mipi_dcphy_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) struct samsung_mipi_dcphy *samsung = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) clk_disable_unprepare(samsung->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) clk_disable_unprepare(samsung->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) static __maybe_unused int samsung_mipi_dcphy_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) struct samsung_mipi_dcphy *samsung = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) clk_prepare_enable(samsung->pclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) clk_prepare_enable(samsung->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) static const struct dev_pm_ops samsung_mipi_dcphy_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) SET_RUNTIME_PM_OPS(samsung_mipi_dcphy_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) samsung_mipi_dcphy_runtime_resume, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) static const struct of_device_id samsung_mipi_dcphy_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) .compatible = "rockchip,rk3588-mipi-dcphy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) MODULE_DEVICE_TABLE(of, samsung_mipi_dcphy_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) static struct platform_driver samsung_mipi_dcphy_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) .name = "samsung-mipi-dcphy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) .of_match_table = of_match_ptr(samsung_mipi_dcphy_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) .pm = &samsung_mipi_dcphy_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) .probe = samsung_mipi_dcphy_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) .remove = samsung_mipi_dcphy_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) module_platform_driver(samsung_mipi_dcphy_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) MODULE_AUTHOR("Guochun Huang<hero.huang@rock-chips.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) MODULE_DESCRIPTION("Samsung MIPI DCPHY Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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