^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Renesas R-Car Gen3 for USB3.0 PHY driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2017 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define USB30_CLKSET0 0x034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define USB30_CLKSET1 0x036
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define USB30_SSC_SET 0x038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define USB30_PHY_ENABLE 0x060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define USB30_VBUS_EN 0x064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* USB30_CLKSET0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CLKSET0_PRIVATE 0x05c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define CLKSET0_USB30_FSEL_USB_EXTAL 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* USB30_CLKSET1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define CLKSET1_USB30_PLL_MULTI_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define CLKSET1_USB30_PLL_MULTI_USB_EXTAL (0x64 << \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) CLKSET1_USB30_PLL_MULTI_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define CLKSET1_PHYRESET BIT(4) /* 1: reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CLKSET1_REF_CLKDIV BIT(3) /* 1: USB_EXTAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define CLKSET1_PRIVATE_2_1 BIT(1) /* Write B'01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define CLKSET1_REF_CLK_SEL BIT(0) /* 1: USB3S0_CLK_P */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* USB30_SSC_SET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SSC_SET_SSC_EN BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SSC_SET_RANGE_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SSC_SET_RANGE_4980 (0x0 << SSC_SET_RANGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SSC_SET_RANGE_4492 (0x1 << SSC_SET_RANGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SSC_SET_RANGE_4003 (0x2 << SSC_SET_RANGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* USB30_PHY_ENABLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PHY_ENABLE_RESET_EN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* USB30_VBUS_EN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define VBUS_EN_VBUS_EN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct rcar_gen3_usb3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 ssc_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) bool usb3s_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) bool usb_extal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static void write_clkset1_for_usb_extal(struct rcar_gen3_usb3 *r, bool reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u16 val = CLKSET1_USB30_PLL_MULTI_USB_EXTAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) CLKSET1_REF_CLKDIV | CLKSET1_PRIVATE_2_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) val |= CLKSET1_PHYRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) writew(val, r->base + USB30_CLKSET1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static void rcar_gen3_phy_usb3_enable_ssc(struct rcar_gen3_usb3 *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u16 val = SSC_SET_SSC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) switch (r->ssc_range) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case 4980:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) val |= SSC_SET_RANGE_4980;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) case 4492:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) val |= SSC_SET_RANGE_4492;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 4003:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) val |= SSC_SET_RANGE_4003;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) dev_err(&r->phy->dev, "%s: unsupported range (%x)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) r->ssc_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) writew(val, r->base + USB30_SSC_SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void rcar_gen3_phy_usb3_select_usb_extal(struct rcar_gen3_usb3 *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) write_clkset1_for_usb_extal(r, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (r->ssc_range)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) rcar_gen3_phy_usb3_enable_ssc(r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) writew(CLKSET0_PRIVATE | CLKSET0_USB30_FSEL_USB_EXTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) r->base + USB30_CLKSET0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) writew(PHY_ENABLE_RESET_EN, r->base + USB30_PHY_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) write_clkset1_for_usb_extal(r, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) usleep_range(10, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) write_clkset1_for_usb_extal(r, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int rcar_gen3_phy_usb3_init(struct phy *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct rcar_gen3_usb3 *r = phy_get_drvdata(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) dev_vdbg(&r->phy->dev, "%s: enter (%d, %d, %d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) r->usb3s_clk, r->usb_extal, r->ssc_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (!r->usb3s_clk && r->usb_extal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) rcar_gen3_phy_usb3_select_usb_extal(r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Enables VBUS detection anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) writew(VBUS_EN_VBUS_EN, r->base + USB30_VBUS_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct phy_ops rcar_gen3_phy_usb3_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .init = rcar_gen3_phy_usb3_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const struct of_device_id rcar_gen3_phy_usb3_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { .compatible = "renesas,rcar-gen3-usb3-phy" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb3_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int rcar_gen3_phy_usb3_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct rcar_gen3_usb3 *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct phy_provider *provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (!dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(dev, "This driver needs device tree\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (!r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) r->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (IS_ERR(r->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return PTR_ERR(r->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) clk = devm_clk_get(dev, "usb3s_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) r->usb3s_clk = !!clk_get_rate(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) clk_disable_unprepare(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) clk = devm_clk_get(dev, "usb_extal");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) r->usb_extal = !!clk_get_rate(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) clk_disable_unprepare(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (!r->usb3s_clk && !r->usb_extal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) dev_err(dev, "This driver needs usb3s_clk and/or usb_extal\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * devm_phy_create() will call pm_runtime_enable(&phy->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * And then, phy-core will manage runtime pm for this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) r->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb3_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (IS_ERR(r->phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) dev_err(dev, "Failed to create USB3 PHY\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ret = PTR_ERR(r->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) of_property_read_u32(dev->of_node, "renesas,ssc-range", &r->ssc_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) platform_set_drvdata(pdev, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) phy_set_drvdata(r->phy, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (IS_ERR(provider)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) dev_err(dev, "Failed to register PHY provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ret = PTR_ERR(provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int rcar_gen3_phy_usb3_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static struct platform_driver rcar_gen3_phy_usb3_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .name = "phy_rcar_gen3_usb3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .of_match_table = rcar_gen3_phy_usb3_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .probe = rcar_gen3_phy_usb3_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .remove = rcar_gen3_phy_usb3_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) module_platform_driver(rcar_gen3_phy_usb3_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 3.0 PHY");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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