^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Renesas R-Car Gen3 for USB2.0 PHY driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015-2017 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This is based on the phy-rcar-gen2 driver:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2014 Renesas Solutions Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2014 Cogent Embedded, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/extcon-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/usb/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /******* USB2.0 Host registers (original offset is +0x200) *******/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define USB2_INT_ENABLE 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define USB2_USBCTR 0x00c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define USB2_SPD_RSM_TIMSET 0x10c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define USB2_OC_TIMSET 0x110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define USB2_COMMCTRL 0x600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define USB2_OBINTSTA 0x604
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define USB2_OBINTEN 0x608
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define USB2_VBCTRL 0x60c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define USB2_LINECTRL1 0x610
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define USB2_ADPCTRL 0x630
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* INT_ENABLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* USBCTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define USB2_USBCTR_DIRPD BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define USB2_USBCTR_PLL_RST BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* SPD_RSM_TIMSET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* OC_TIMSET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define USB2_OC_TIMSET_INIT 0x000209ab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* COMMCTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* OBINTSTA and OBINTEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define USB2_OBINT_SESSVLDCHG BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define USB2_OBINT_IDDIGCHG BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) USB2_OBINT_IDDIGCHG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* VBCTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define USB2_VBCTRL_OCCLREN BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* LINECTRL1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define USB2_LINECTRL1_DPRPD_EN BIT(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define USB2_LINECTRL1_DP_RPD BIT(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define USB2_LINECTRL1_DMRPD_EN BIT(17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define USB2_LINECTRL1_DM_RPD BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* ADPCTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define USB2_ADPCTRL_IDDIG BIT(19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define USB2_ADPCTRL_DRVVBUS BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define NUM_OF_PHYS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) enum rcar_gen3_phy_index {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) PHY_INDEX_BOTH_HC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) PHY_INDEX_OHCI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) PHY_INDEX_EHCI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) PHY_INDEX_HSUSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) USB2_INT_ENABLE_USBH_INTA_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) USB2_INT_ENABLE_USBH_INTB_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct rcar_gen3_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct rcar_gen3_chan *ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u32 int_enable_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) bool initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) bool otg_initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) bool powered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct rcar_gen3_chan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct device *dev; /* platform_device's device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct extcon_dev *extcon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct rcar_gen3_phy rphys[NUM_OF_PHYS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct regulator *vbus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mutex lock; /* protects rphys[...].powered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) enum usb_dr_mode dr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) bool extcon_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) bool is_otg_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) bool uses_otg_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * Combination about is_otg_channel and uses_otg_pins:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Parameters || Behaviors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * is_otg_channel | uses_otg_pins || irqs | role sysfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * ---------------------+---------------++--------------+------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * true | true || enabled | enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * true | false || disabled | enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * false | any || disabled | disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static void rcar_gen3_phy_usb2_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (ch->extcon_host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u32 val = readl(usb2_base + USB2_COMMCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) val &= ~USB2_COMMCTRL_OTG_PERI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) val |= USB2_COMMCTRL_OTG_PERI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) writel(val, usb2_base + USB2_COMMCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u32 val = readl(usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (dp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) val |= USB2_LINECTRL1_DP_RPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (dm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) val |= USB2_LINECTRL1_DM_RPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) writel(val, usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) u32 val = readl(usb2_base + USB2_ADPCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) val |= USB2_ADPCTRL_DRVVBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) val &= ~USB2_ADPCTRL_DRVVBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) writel(val, usb2_base + USB2_ADPCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u32 val = readl(usb2_base + USB2_OBINTEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (ch->uses_otg_pins && enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) val |= USB2_OBINT_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) val &= ~USB2_OBINT_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) writel(val, usb2_base + USB2_OBINTEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) rcar_gen3_set_linectrl(ch, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) rcar_gen3_set_host_mode(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) rcar_gen3_enable_vbus_ctrl(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ch->extcon_host = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) schedule_work(&ch->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) rcar_gen3_set_linectrl(ch, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) rcar_gen3_set_host_mode(ch, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) rcar_gen3_enable_vbus_ctrl(ch, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ch->extcon_host = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) schedule_work(&ch->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) val = readl(usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) rcar_gen3_set_linectrl(ch, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) rcar_gen3_set_host_mode(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) rcar_gen3_enable_vbus_ctrl(ch, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) val = readl(usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) rcar_gen3_set_linectrl(ch, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) rcar_gen3_set_host_mode(ch, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) rcar_gen3_enable_vbus_ctrl(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) rcar_gen3_control_otg_irq(ch, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rcar_gen3_enable_vbus_ctrl(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) rcar_gen3_init_for_host(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rcar_gen3_control_otg_irq(ch, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (!ch->uses_otg_pins)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (!rcar_gen3_check_id(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) rcar_gen3_init_for_host(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) rcar_gen3_init_for_peri(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (rcar_gen3_is_host(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return PHY_MODE_USB_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return PHY_MODE_USB_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) for (i = 0; i < NUM_OF_PHYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ch->rphys[i].initialized)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) for (i = 0; i < NUM_OF_PHYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ch->rphys[i].otg_initialized)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) for (i = 0; i < NUM_OF_PHYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (ch->rphys[i].powered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static ssize_t role_store(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) bool is_b_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) enum phy_mode cur_mode, new_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (sysfs_streq(buf, "host"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) new_mode = PHY_MODE_USB_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) else if (sysfs_streq(buf, "peripheral"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) new_mode = PHY_MODE_USB_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* is_b_device: true is B-Device. false is A-Device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) is_b_device = rcar_gen3_check_id(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) cur_mode = rcar_gen3_get_phy_mode(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* If current and new mode is the same, this returns the error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (cur_mode == new_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (!is_b_device) /* A-Peripheral */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) rcar_gen3_init_from_a_peri_to_a_host(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) else /* B-Peripheral */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) rcar_gen3_init_for_b_host(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) } else { /* And is_host must be true */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (!is_b_device) /* A-Host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) rcar_gen3_init_for_a_peri(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) else /* B-Host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) rcar_gen3_init_for_peri(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static ssize_t role_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) "peripheral");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static DEVICE_ATTR_RW(role);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* Should not use functions of read-modify-write a register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) val = readl(usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) writel(val, usb2_base + USB2_LINECTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) val = readl(usb2_base + USB2_VBCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) val &= ~USB2_VBCTRL_OCCLREN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) val = readl(usb2_base + USB2_ADPCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) writel(0xffffffff, usb2_base + USB2_OBINTSTA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) rcar_gen3_device_recognition(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct rcar_gen3_chan *ch = _ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) void __iomem *usb2_base = ch->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u32 status = readl(usb2_base + USB2_OBINTSTA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) irqreturn_t ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (status & USB2_OBINT_BITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) rcar_gen3_device_recognition(ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static int rcar_gen3_phy_usb2_init(struct phy *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct rcar_gen3_chan *channel = rphy->ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) void __iomem *usb2_base = channel->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) IRQF_SHARED, dev_name(channel->dev), channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* Initialize USB2 part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) val = readl(usb2_base + USB2_INT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) writel(val, usb2_base + USB2_INT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* Initialize otg part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (channel->is_otg_channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (rcar_gen3_needs_init_otg(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) rcar_gen3_init_otg(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) rphy->otg_initialized = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) rphy->initialized = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static int rcar_gen3_phy_usb2_exit(struct phy *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct rcar_gen3_chan *channel = rphy->ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) void __iomem *usb2_base = channel->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) rphy->initialized = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (channel->is_otg_channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) rphy->otg_initialized = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) val = readl(usb2_base + USB2_INT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) val &= ~rphy->int_enable_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!rcar_gen3_is_any_rphy_initialized(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) val &= ~USB2_INT_ENABLE_UCOM_INTEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) writel(val, usb2_base + USB2_INT_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) free_irq(channel->irq, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static int rcar_gen3_phy_usb2_power_on(struct phy *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct rcar_gen3_chan *channel = rphy->ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) void __iomem *usb2_base = channel->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) mutex_lock(&channel->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (!rcar_gen3_are_all_rphys_power_off(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (channel->vbus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ret = regulator_enable(channel->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) val = readl(usb2_base + USB2_USBCTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) val |= USB2_USBCTR_PLL_RST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) writel(val, usb2_base + USB2_USBCTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) val &= ~USB2_USBCTR_PLL_RST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) writel(val, usb2_base + USB2_USBCTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* The powered flag should be set for any other phys anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) rphy->powered = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) mutex_unlock(&channel->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static int rcar_gen3_phy_usb2_power_off(struct phy *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct rcar_gen3_chan *channel = rphy->ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) mutex_lock(&channel->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) rphy->powered = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (!rcar_gen3_are_all_rphys_power_off(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (channel->vbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ret = regulator_disable(channel->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) mutex_unlock(&channel->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static const struct phy_ops rcar_gen3_phy_usb2_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .init = rcar_gen3_phy_usb2_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .exit = rcar_gen3_phy_usb2_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .power_on = rcar_gen3_phy_usb2_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .power_off = rcar_gen3_phy_usb2_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static const struct phy_ops rz_g1c_phy_usb2_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .init = rcar_gen3_phy_usb2_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .exit = rcar_gen3_phy_usb2_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .compatible = "renesas,usb2-phy-r8a77470",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .data = &rz_g1c_phy_usb2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .compatible = "renesas,usb2-phy-r8a7795",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .data = &rcar_gen3_phy_usb2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .compatible = "renesas,usb2-phy-r8a7796",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .data = &rcar_gen3_phy_usb2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .compatible = "renesas,usb2-phy-r8a77965",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .data = &rcar_gen3_phy_usb2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .compatible = "renesas,rcar-gen3-usb2-phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .data = &rcar_gen3_phy_usb2_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static const unsigned int rcar_gen3_phy_cable[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) EXTCON_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) EXTCON_USB_HOST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) EXTCON_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) struct of_phandle_args *args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (args->args_count == 0) /* For old version dts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return ch->rphys[PHY_INDEX_BOTH_HC].phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) else if (args->args_count > 1) /* Prevent invalid args count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (args->args[0] >= NUM_OF_PHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return ch->rphys[args->args[0]].phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * If one of device nodes has other dr_mode except UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * this function returns UNKNOWN. To achieve backward compatibility,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * this loop starts the index as 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) for (i = 0; i < NUM_OF_PHYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (mode != USB_DR_MODE_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (candidate == USB_DR_MODE_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) candidate = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) else if (candidate != mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return USB_DR_MODE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return candidate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) struct rcar_gen3_chan *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) struct phy_provider *provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) const struct phy_ops *phy_usb2_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) int ret = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (!dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) dev_err(dev, "This driver needs device tree\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (!channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) channel->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (IS_ERR(channel->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return PTR_ERR(channel->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /* get irq number here and request_irq for OTG in phy_init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) channel->irq = platform_get_irq_optional(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) channel->is_otg_channel = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) "renesas,no-otg-pins");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) channel->extcon = devm_extcon_dev_allocate(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) rcar_gen3_phy_cable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (IS_ERR(channel->extcon))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return PTR_ERR(channel->extcon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) ret = devm_extcon_dev_register(dev, channel->extcon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dev_err(dev, "Failed to register extcon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * devm_phy_create() will call pm_runtime_enable(&phy->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * And then, phy-core will manage runtime pm for this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) pm_runtime_enable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) phy_usb2_ops = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (!phy_usb2_ops) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) mutex_init(&channel->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) for (i = 0; i < NUM_OF_PHYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) channel->rphys[i].phy = devm_phy_create(dev, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) phy_usb2_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (IS_ERR(channel->rphys[i].phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) dev_err(dev, "Failed to create USB2 PHY\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) ret = PTR_ERR(channel->rphys[i].phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) channel->rphys[i].ch = channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) channel->vbus = devm_regulator_get_optional(dev, "vbus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (IS_ERR(channel->vbus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) ret = PTR_ERR(channel->vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) channel->vbus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) platform_set_drvdata(pdev, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) channel->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (IS_ERR(provider)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) dev_err(dev, "Failed to register PHY provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ret = PTR_ERR(provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) } else if (channel->is_otg_channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) ret = device_create_file(dev, &dev_attr_role);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) pm_runtime_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (channel->is_otg_channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) device_remove_file(&pdev->dev, &dev_attr_role);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) pm_runtime_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static struct platform_driver rcar_gen3_phy_usb2_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .name = "phy_rcar_gen3_usb2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .of_match_table = rcar_gen3_phy_usb2_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .probe = rcar_gen3_phy_usb2_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .remove = rcar_gen3_phy_usb2_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) module_platform_driver(rcar_gen3_phy_usb2_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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