^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Linaro Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/ulpi/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/ulpi/regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/extcon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ULPI_PWR_CLK_MNG_REG 0x88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) # define ULPI_PWR_OTG_COMP_DISABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ULPI_MISC_A 0x96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) # define ULPI_MISC_A_VBUSVLDEXTSEL BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) # define ULPI_MISC_A_VBUSVLDEXT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct ulpi_seq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct qcom_usb_hs_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct ulpi *ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct clk *ref_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct clk *sleep_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct regulator *v1p8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct regulator *v3p3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct reset_control *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct ulpi_seq *init_seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct extcon_dev *vbus_edev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct notifier_block vbus_notify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int qcom_usb_hs_phy_set_mode(struct phy *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum phy_mode mode, int submode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (!uphy->vbus_edev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case PHY_MODE_USB_OTG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) case PHY_MODE_USB_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) val |= ULPI_INT_IDGRD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case PHY_MODE_USB_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) val |= ULPI_INT_SESS_VALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_RISE, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_FALL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case PHY_MODE_USB_OTG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case PHY_MODE_USB_DEVICE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) addr = ULPI_SET(ULPI_MISC_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case PHY_MODE_USB_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) addr = ULPI_CLR(ULPI_MISC_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = ulpi_write(uphy->ulpi, ULPI_SET(ULPI_PWR_CLK_MNG_REG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ULPI_PWR_OTG_COMP_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ret = ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXTSEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) qcom_usb_hs_phy_vbus_notifier(struct notifier_block *nb, unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) void *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct qcom_usb_hs_phy *uphy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) uphy = container_of(nb, struct qcom_usb_hs_phy, vbus_notify);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) addr = ULPI_SET(ULPI_MISC_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) addr = ULPI_CLR(ULPI_MISC_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int qcom_usb_hs_phy_power_on(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct ulpi *ulpi = uphy->ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const struct ulpi_seq *seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int ret, state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = clk_prepare_enable(uphy->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ret = clk_prepare_enable(uphy->sleep_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) goto err_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ret = regulator_set_load(uphy->v1p8, 50000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) goto err_1p8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = regulator_enable(uphy->v1p8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) goto err_1p8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ret = regulator_set_voltage_triplet(uphy->v3p3, 3050000, 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 3300000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) goto err_3p3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ret = regulator_set_load(uphy->v3p3, 50000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) goto err_3p3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ret = regulator_enable(uphy->v3p3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) goto err_3p3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) for (seq = uphy->init_seq; seq->addr; seq++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ret = ulpi_write(ulpi, ULPI_EXT_VENDOR_SPECIFIC + seq->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) seq->val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) goto err_ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (uphy->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ret = reset_control_reset(uphy->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) goto err_ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (uphy->vbus_edev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) state = extcon_get_state(uphy->vbus_edev, EXTCON_USB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* setup initial state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) qcom_usb_hs_phy_vbus_notifier(&uphy->vbus_notify, state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) uphy->vbus_edev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = extcon_register_notifier(uphy->vbus_edev, EXTCON_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) &uphy->vbus_notify);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) goto err_ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) err_ulpi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) regulator_disable(uphy->v3p3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) err_3p3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) regulator_disable(uphy->v1p8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) err_1p8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) clk_disable_unprepare(uphy->sleep_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) err_sleep:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) clk_disable_unprepare(uphy->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int qcom_usb_hs_phy_power_off(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (uphy->vbus_edev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) extcon_unregister_notifier(uphy->vbus_edev, EXTCON_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) &uphy->vbus_notify);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) regulator_disable(uphy->v3p3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) regulator_disable(uphy->v1p8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) clk_disable_unprepare(uphy->sleep_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) clk_disable_unprepare(uphy->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static const struct phy_ops qcom_usb_hs_phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .power_on = qcom_usb_hs_phy_power_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .power_off = qcom_usb_hs_phy_power_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .set_mode = qcom_usb_hs_phy_set_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static int qcom_usb_hs_phy_probe(struct ulpi *ulpi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct qcom_usb_hs_phy *uphy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct phy_provider *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct regulator *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct reset_control *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (!uphy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ulpi_set_drvdata(ulpi, uphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) uphy->ulpi = ulpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) size = of_property_count_u8_elems(ulpi->dev.of_node, "qcom,init-seq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (size < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) uphy->init_seq = devm_kmalloc_array(&ulpi->dev, (size / 2) + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) sizeof(*uphy->init_seq), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (!uphy->init_seq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ret = of_property_read_u8_array(ulpi->dev.of_node, "qcom,init-seq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) (u8 *)uphy->init_seq, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (ret && size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* NUL terminate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) uphy->init_seq[size / 2].addr = uphy->init_seq[size / 2].val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) uphy->ref_clk = clk = devm_clk_get(&ulpi->dev, "ref");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) uphy->sleep_clk = clk = devm_clk_get(&ulpi->dev, "sleep");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) uphy->v1p8 = reg = devm_regulator_get(&ulpi->dev, "v1p8");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return PTR_ERR(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) uphy->v3p3 = reg = devm_regulator_get(&ulpi->dev, "v3p3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return PTR_ERR(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) uphy->reset = reset = devm_reset_control_get(&ulpi->dev, "por");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (IS_ERR(reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (PTR_ERR(reset) == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return PTR_ERR(reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) uphy->reset = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) &qcom_usb_hs_phy_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (IS_ERR(uphy->phy))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return PTR_ERR(uphy->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) uphy->vbus_edev = extcon_get_edev_by_phandle(&ulpi->dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (IS_ERR(uphy->vbus_edev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (PTR_ERR(uphy->vbus_edev) != -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return PTR_ERR(uphy->vbus_edev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) uphy->vbus_edev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) uphy->vbus_notify.notifier_call = qcom_usb_hs_phy_vbus_notifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) phy_set_drvdata(uphy->phy, uphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return PTR_ERR_OR_ZERO(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static const struct of_device_id qcom_usb_hs_phy_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) { .compatible = "qcom,usb-hs-phy", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MODULE_DEVICE_TABLE(of, qcom_usb_hs_phy_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static struct ulpi_driver qcom_usb_hs_phy_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .probe = qcom_usb_hs_phy_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .name = "qcom_usb_hs_phy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .of_match_table = qcom_usb_hs_phy_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) module_ulpi_driver(qcom_usb_hs_phy_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) MODULE_DESCRIPTION("Qualcomm USB HS phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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