^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Broadcom Northstar USB 2.0 PHY Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bcma/bcma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct bcm_ns_usb2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct clk *ref_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void __iomem *dmu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int bcm_ns_usb2_phy_init(struct phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct device *dev = usb2->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __iomem *dmu = usb2->dmu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) err = clk_prepare_enable(usb2->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) dev_err(dev, "Failed to prepare ref clock: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ref_clk_rate = clk_get_rate(usb2->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (!ref_clk_rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) dev_err(dev, "Failed to get ref clock rate\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) goto err_clk_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) usb_pll_pdiv = usb2ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) usb_pll_pdiv = 1 << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Unlock DMU PLL settings with some magic value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Write USB 2.0 PLL control setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Lock DMU PLL settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) err_clk_off:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) clk_disable_unprepare(usb2->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static const struct phy_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .init = bcm_ns_usb2_phy_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int bcm_ns_usb2_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct bcm_ns_usb2 *usb2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct phy_provider *phy_provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (!usb2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) usb2->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) usb2->dmu = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (IS_ERR(usb2->dmu)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) dev_err(dev, "Failed to map DMU regs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return PTR_ERR(usb2->dmu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (IS_ERR(usb2->ref_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dev_err(dev, "Clock not defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return PTR_ERR(usb2->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) usb2->phy = devm_phy_create(dev, NULL, &ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (IS_ERR(usb2->phy))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return PTR_ERR(usb2->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) phy_set_drvdata(usb2->phy, usb2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) platform_set_drvdata(pdev, usb2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return PTR_ERR_OR_ZERO(phy_provider);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const struct of_device_id bcm_ns_usb2_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { .compatible = "brcm,ns-usb2-phy", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct platform_driver bcm_ns_usb2_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .probe = bcm_ns_usb2_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .name = "bcm_ns_usb2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .of_match_table = bcm_ns_usb2_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) module_platform_driver(bcm_ns_usb2_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MODULE_LICENSE("GPL v2");