^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * FILE NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/pcmcia/vrc4173_cardu.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * BRIEF MODULE DESCRIPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * NEC VRC4173 CARDU driver for Socket Services
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (This device doesn't support CardBus. it is supporting only 16bit PC Card.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright 2002,2003 Yoichi Yuasa <yuasa@linux-mips.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Free Software Foundation; either version 2 of the License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * You should have received a copy of the GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * with this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <pcmcia/ss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "vrc4173_cardu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int vrc4173_cardu_slots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static vrc4173_socket_t cardu_sockets[CARDU_MAX_SOCKETS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern struct socket_info_t *pcmcia_register_socket (int slot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct pccard_operations *vtable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int use_bus_pm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern void pcmcia_unregister_socket(struct socket_info_t *s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static inline uint8_t exca_readb(vrc4173_socket_t *socket, uint16_t offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return readb(socket->base + EXCA_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static inline uint16_t exca_readw(vrc4173_socket_t *socket, uint16_t offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) uint16_t val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) val = readb(socket->base + EXCA_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) val |= (u16)readb(socket->base + EXCA_REGS_BASE + offset + 1) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static inline void exca_writeb(vrc4173_socket_t *socket, uint16_t offset, uint8_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) writeb(val, socket->base + EXCA_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline void exca_writew(vrc4173_socket_t *socket, uint8_t offset, uint16_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) writeb((u8)val, socket->base + EXCA_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) writeb((u8)(val >> 8), socket->base + EXCA_REGS_BASE + offset + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static inline uint32_t cardbus_socket_readl(vrc4173_socket_t *socket, u16 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return readl(socket->base + CARDBUS_SOCKET_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static inline void cardbus_socket_writel(vrc4173_socket_t *socket, u16 offset, uint32_t val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) writel(val, socket->base + CARDBUS_SOCKET_REGS_BASE + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static void cardu_pciregs_init(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u32 syscnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u16 brgcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u8 devcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pci_write_config_dword(dev, 0x1c, 0x10000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) pci_write_config_dword(dev, 0x20, 0x17fff000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) pci_write_config_dword(dev, 0x2c, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pci_write_config_dword(dev, 0x30, 0xfffc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) pci_read_config_word(dev, BRGCNT, &brgcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) brgcnt &= ~IREQ_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) pci_write_config_word(dev, BRGCNT, brgcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) pci_read_config_dword(dev, SYSCNT, &syscnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) syscnt &= ~(BAD_VCC_REQ_DISB|PCPCI_EN|CH_ASSIGN_MASK|SUB_ID_WR_EN|PCI_CLK_RIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) syscnt |= (CH_ASSIGN_NODMA|ASYN_INT_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) pci_write_config_dword(dev, SYSCNT, syscnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pci_read_config_byte(dev, DEVCNT, &devcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) devcnt &= ~(ZOOM_VIDEO_EN|SR_PCI_INT_SEL_MASK|PCI_INT_MODE|IRQ_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) devcnt |= (SR_PCI_INT_SEL_NONE|IFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) pci_write_config_byte(dev, DEVCNT, devcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) pci_write_config_byte(dev, CHIPCNT, S_PREF_DISB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pci_write_config_byte(dev, SERRDIS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int cardu_init(unsigned int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) vrc4173_socket_t *socket = &cardu_sockets[slot];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cardu_pciregs_init(socket->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* CARD_SC bits are cleared by reading CARD_SC. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) exca_writeb(socket, GLO_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) socket->cap.irq_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) socket->cap.map_size = 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) socket->cap.pci_irq = socket->dev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) socket->events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) spin_lock_init(socket->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Enable PC Card status interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) exca_writeb(socket, CARD_SCI, CARD_DT_EN|RDY_EN|BAT_WAR_EN|BAT_DEAD_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int cardu_register_callback(unsigned int sock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void (*handler)(void *, unsigned int),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) void * info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) socket->handler = handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) socket->info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static int cardu_inquire_socket(unsigned int sock, socket_cap_t *cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *cap = socket->cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static int cardu_get_status(unsigned int sock, u_int *value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) uint32_t state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) uint8_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u_int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) status = exca_readb(socket, IF_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (status & CARD_PWR) val |= SS_POWERON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (status & READY) val |= SS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (status & CARD_WP) val |= SS_WRPROT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) val |= SS_DETECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (exca_readb(socket, INT_GEN_CNT) & CARD_TYPE_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (status & STSCHG) val |= SS_STSCHG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) status &= BV_DETECT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (status != BV_DETECT_GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (status == BV_DETECT_WARN) val |= SS_BATWARN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) else val |= SS_BATDEAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) state = cardbus_socket_readl(socket, SKT_PRE_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (state & VOL_3V_CARD_DT) val |= SS_3VCARD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (state & VOL_XV_CARD_DT) val |= SS_XVCARD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (state & CB_CARD_DT) val |= SS_CARDBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (!(state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) (VOL_YV_CARD_DT|VOL_XV_CARD_DT|VOL_3V_CARD_DT|VOL_5V_CARD_DT|CCD20|CCD10)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) val |= SS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *value = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static inline uint8_t set_Vcc_value(u_char Vcc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) switch (Vcc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case 33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return VCC_3V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) case 50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return VCC_5V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return VCC_0V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static inline uint8_t set_Vpp_value(u_char Vpp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) switch (Vpp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) case 33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) case 50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return VPP_VCC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case 120:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return VPP_12V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return VPP_0V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int cardu_set_socket(unsigned int sock, socket_state_t *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) uint8_t val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (((state->Vpp == 33) || (state->Vpp == 50)) && (state->Vpp != state->Vcc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) val = set_Vcc_value(state->Vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) val |= set_Vpp_value(state->Vpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (state->flags & SS_OUTPUT_ENA) val |= CARD_OUT_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) exca_writeb(socket, PWR_CNT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) val = exca_readb(socket, INT_GEN_CNT) & CARD_REST0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (state->flags & SS_RESET) val &= ~CARD_REST0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) else val |= CARD_REST0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (state->flags & SS_IOCARD) val |= CARD_TYPE_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) exca_writeb(socket, INT_GEN_CNT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int cardu_get_io_map(unsigned int sock, struct pccard_io_map *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) uint8_t ioctl, window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u_char map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) map = io->map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (map > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) io->start = exca_readw(socket, IO_WIN_SA(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) io->stop = exca_readw(socket, IO_WIN_EA(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ioctl = exca_readb(socket, IO_WIN_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) window = exca_readb(socket, ADR_WIN_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) io->flags = (window & IO_WIN_EN(map)) ? MAP_ACTIVE : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (ioctl & IO_WIN_DATA_AUTOSZ(map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) io->flags |= MAP_AUTOSZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) else if (ioctl & IO_WIN_DATA_16BIT(map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) io->flags |= MAP_16BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static int cardu_set_io_map(unsigned int sock, struct pccard_io_map *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) uint16_t ioctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) uint8_t window, enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u_char map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) map = io->map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (map > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) window = exca_readb(socket, ADR_WIN_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) enable = IO_WIN_EN(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (window & enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) window &= ~enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) exca_writeb(socket, ADR_WIN_EN, window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) exca_writew(socket, IO_WIN_SA(map), io->start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) exca_writew(socket, IO_WIN_EA(map), io->stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ioctl = exca_readb(socket, IO_WIN_CNT) & ~IO_WIN_CNT_MASK(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (io->flags & MAP_AUTOSZ) ioctl |= IO_WIN_DATA_AUTOSZ(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) else if (io->flags & MAP_16BIT) ioctl |= IO_WIN_DATA_16BIT(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) exca_writeb(socket, IO_WIN_CNT, ioctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (io->flags & MAP_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) exca_writeb(socket, ADR_WIN_EN, window | enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int cardu_get_mem_map(unsigned int sock, struct pccard_mem_map *mem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) uint32_t start, stop, offset, page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) uint8_t window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u_char map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) map = mem->map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (map > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) window = exca_readb(socket, ADR_WIN_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mem->flags = (window & MEM_WIN_EN(map)) ? MAP_ACTIVE : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) start = exca_readw(socket, MEM_WIN_SA(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) mem->flags |= (start & MEM_WIN_DSIZE) ? MAP_16BIT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) start = (start & 0x0fff) << 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) stop = exca_readw(socket, MEM_WIN_EA(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) stop = ((stop & 0x0fff) << 12) + 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) offset = exca_readw(socket, MEM_WIN_OA(map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) mem->flags |= (offset & MEM_WIN_WP) ? MAP_WRPROT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) mem->flags |= (offset & MEM_WIN_REGSET) ? MAP_ATTRIB : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) offset = ((offset & 0x3fff) << 12) + start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) mem->card_start = offset & 0x03ffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) page = exca_readb(socket, MEM_WIN_SAU(map)) << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) mem->sys_start = start + page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) mem->sys_stop = start + page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static int cardu_set_mem_map(unsigned int sock, struct pccard_mem_map *mem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) vrc4173_socket_t *socket = &cardu_sockets[sock];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) uint16_t value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) uint8_t window, enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u_long sys_start, sys_stop, card_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) u_char map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) map = mem->map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) sys_start = mem->sys_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) sys_stop = mem->sys_stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) card_start = mem->card_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (map > 4 || sys_start > sys_stop || ((sys_start ^ sys_stop) >> 24) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) (card_start >> 26))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) window = exca_readb(socket, ADR_WIN_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) enable = MEM_WIN_EN(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (window & enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) window &= ~enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) exca_writeb(socket, ADR_WIN_EN, window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) exca_writeb(socket, MEM_WIN_SAU(map), sys_start >> 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) value = (sys_start >> 12) & 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (mem->flags & MAP_16BIT) value |= MEM_WIN_DSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) exca_writew(socket, MEM_WIN_SA(map), value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) value = (sys_stop >> 12) & 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) exca_writew(socket, MEM_WIN_EA(map), value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) value = ((card_start - sys_start) >> 12) & 0x3fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (mem->flags & MAP_WRPROT) value |= MEM_WIN_WP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (mem->flags & MAP_ATTRIB) value |= MEM_WIN_REGSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) exca_writew(socket, MEM_WIN_OA(map), value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (mem->flags & MAP_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) exca_writeb(socket, ADR_WIN_EN, window | enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static void cardu_proc_setup(unsigned int sock, struct proc_dir_entry *base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static struct pccard_operations cardu_operations = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .init = cardu_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .register_callback = cardu_register_callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .inquire_socket = cardu_inquire_socket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .get_status = cardu_get_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .set_socket = cardu_set_socket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .get_io_map = cardu_get_io_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .set_io_map = cardu_set_io_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .get_mem_map = cardu_get_mem_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .set_mem_map = cardu_set_mem_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .proc_setup = cardu_proc_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static void cardu_bh(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) vrc4173_socket_t *socket = (vrc4173_socket_t *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) uint16_t events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) spin_lock_irq(&socket->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) events = socket->events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) socket->events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) spin_unlock_irq(&socket->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (socket->handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) socket->handler(socket->info, events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static uint16_t get_events(vrc4173_socket_t *socket)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) uint16_t events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) uint8_t csc, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) status = exca_readb(socket, IF_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) csc = exca_readb(socket, CARD_SC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if ((csc & CARD_DT_CHG) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) events |= SS_DETECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if ((csc & RDY_CHG) && (status & READY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) events |= SS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (exca_readb(socket, INT_GEN_CNT) & CARD_TYPE_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if ((csc & BAT_DEAD_ST_CHG) && (status & STSCHG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) events |= SS_STSCHG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (csc & (BAT_WAR_CHG|BAT_DEAD_ST_CHG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if ((status & BV_DETECT_MASK) != BV_DETECT_GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (status == BV_DETECT_WARN) events |= SS_BATWARN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) else events |= SS_BATDEAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static void cardu_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) vrc4173_socket_t *socket = (vrc4173_socket_t *)dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) uint16_t events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) INIT_WORK(&socket->tq_work, cardu_bh, socket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) events = get_events(socket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (events) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) spin_lock(&socket->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) socket->events |= events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) spin_unlock(&socket->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) schedule_work(&socket->tq_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int vrc4173_cardu_probe(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) vrc4173_socket_t *socket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) unsigned long start, len, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int slot, err, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) slot = vrc4173_cardu_slots++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) socket = &cardu_sockets[slot];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (socket->noprobe != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) sprintf(socket->name, "NEC VRC4173 CARDU%1d", slot+1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if ((err = pci_enable_device(dev)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) start = pci_resource_start(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (start == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) goto disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) len = pci_resource_len(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) goto disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) flags = pci_resource_flags(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if ((flags & IORESOURCE_MEM) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) goto disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) err = pci_request_regions(dev, socket->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ret = err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) goto disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) socket->base = ioremap(start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (socket->base == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) socket->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) socket->pcmcia_socket = pcmcia_register_socket(slot, &cardu_operations, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (socket->pcmcia_socket == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) goto unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (request_irq(dev->irq, cardu_interrupt, IRQF_SHARED, socket->name, socket) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) goto unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) printk(KERN_INFO "%s at %#08lx, IRQ %d\n", socket->name, start, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) pcmcia_unregister_socket(socket->pcmcia_socket);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) socket->pcmcia_socket = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) iounmap(socket->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) socket->base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static int vrc4173_cardu_setup(char *options)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (options == NULL || *options == '\0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (strncmp(options, "cardu1:", 7) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) options += 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (*options != '\0') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (strncmp(options, "noprobe", 7) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) cardu_sockets[CARDU1].noprobe = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) options += 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (*options != ',')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (strncmp(options, "cardu2:", 7) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) options += 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if ((*options != '\0') && (strncmp(options, "noprobe", 7) == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) cardu_sockets[CARDU2].noprobe = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) __setup("vrc4173_cardu=", vrc4173_cardu_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static const struct pci_device_id vrc4173_cardu_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) { PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NAPCCARD) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static struct pci_driver vrc4173_cardu_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .name = "NEC VRC4173 CARDU",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .probe = vrc4173_cardu_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .id_table = vrc4173_cardu_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static int vrc4173_cardu_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) vrc4173_cardu_slots = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return pci_register_driver(&vrc4173_cardu_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static void vrc4173_cardu_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) pci_unregister_driver(&vrc4173_cardu_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) module_init(vrc4173_cardu_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) module_exit(vrc4173_cardu_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) MODULE_DEVICE_TABLE(pci, vrc4173_cardu_id_table);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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