Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/drivers/pcmcia/sa1100_neponset.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Neponset PCMCIA specific routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "sa1111_generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "max1600.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * Neponset uses the Maxim MAX1600, with the following connections:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *   MAX1600      Neponset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  *    A0VCC        SA-1111 GPIO A<1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  *    A1VCC        SA-1111 GPIO A<0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  *    A0VPP        CPLD NCR A0VPP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  *    A1VPP        CPLD NCR A1VPP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  *    B0VCC        SA-1111 GPIO A<2>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  *    B1VCC        SA-1111 GPIO A<3>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  *    B0VPP        ground (slot B is CF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  *    B1VPP        ground (slot B is CF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  *     VX          VCC (5V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  *     VY          VCC3_3 (3.3V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  *     12INA       12V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  *     12INB       ground (slot B is CF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  * The MAX1600 CODE pin is tied to ground, placing the device in 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)  * "Standard Intel code" mode. Refer to the Maxim data sheet for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)  * the corresponding truth table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int neponset_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	struct max1600 *m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	ret = max1600_init(skt->socket.dev.parent, &m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			   skt->nr ? MAX1600_CHAN_B : MAX1600_CHAN_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 			   MAX1600_CODE_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		skt->driver_data = m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	struct max1600 *m = skt->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	ret = sa1111_pcmcia_configure_socket(skt, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		ret = max1600_configure(m, state->Vcc, state->Vpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static struct pcmcia_low_level neponset_pcmcia_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	.owner			= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.hw_init		= neponset_pcmcia_hw_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	.configure_socket	= neponset_pcmcia_configure_socket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	.first			= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	.nr			= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int pcmcia_neponset_init(struct sa1111_dev *sadev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	return sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 				 sa11xx_drv_pcmcia_add_one);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }