^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/drivers/pcmcia/pxa2xx_trizeps4.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * TRIZEPS PCMCIA specific routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Jürgen Schindele
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Created: 20 02, 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright: Jürgen Schindele
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <mach/pxa2xx-regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <mach/trizeps4.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "soc_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern void board_pcmcia_power(int power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* we dont have voltage/card/ready detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * so we dont need interrupts for it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) switch (skt->nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) skt->stat[SOC_STAT_CD].gpio = GPIO_PCD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) skt->stat[SOC_STAT_CD].name = "cs0_cd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) skt->stat[SOC_STAT_RDY].name = "cs0_rdy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* release the reset of this card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static unsigned long trizeps_pcmcia_status[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct pcmcia_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned short status = 0, change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) status = CFSR_readw();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) change = (status ^ trizeps_pcmcia_status[skt->nr]) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ConXS_CFSR_BVD_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) trizeps_pcmcia_status[skt->nr] = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (status & ConXS_CFSR_BVD1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* enable_irq empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* disable_irq empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) switch (skt->nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* just fill in fix states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #ifndef CONFIG_MACH_TRIZEPS_CONXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* on ConXS we only have one slot. Second is inactive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) state->detect = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) state->ready = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) state->bvd1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) state->bvd2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) state->vs_3v = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) state->vs_Xv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) const socket_state_t *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned short power = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* we do nothing here just check a bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) switch (state->Vcc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case 0: power &= 0xfc; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case 33: power |= ConXS_BCR_S0_VCC_3V3; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case 50:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) pr_err("%s(): Vcc 5V not supported in socket\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) switch (state->Vpp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) case 0: power &= 0xf3; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) case 33: power |= ConXS_BCR_S0_VPP_3V3; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) case 120:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) pr_err("%s(): Vpp 12V not supported in socket\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (state->Vpp != state->Vcc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) switch (skt->nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case 0: /* we only have 3.3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) board_pcmcia_power(power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #ifndef CONFIG_MACH_TRIZEPS_CONXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* on ConXS we only have one slot. Second is inactive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* default is on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) board_pcmcia_power(0x9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) board_pcmcia_power(0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static struct pcmcia_low_level trizeps_pcmcia_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .hw_init = trizeps_pcmcia_hw_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .socket_state = trizeps_pcmcia_socket_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .configure_socket = trizeps_pcmcia_configure_socket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .socket_init = trizeps_pcmcia_socket_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .socket_suspend = trizeps_pcmcia_socket_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #ifdef CONFIG_MACH_TRIZEPS_CONXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .nr = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .nr = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .first = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static struct platform_device *trizeps_pcmcia_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int __init trizeps_pcmcia_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (!machine_is_trizeps4() && !machine_is_trizeps4wl())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (!trizeps_pcmcia_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = platform_device_add_data(trizeps_pcmcia_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = platform_device_add(trizeps_pcmcia_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) platform_device_put(trizeps_pcmcia_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static void __exit trizeps_pcmcia_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) platform_device_unregister(trizeps_pcmcia_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) fs_initcall(trizeps_pcmcia_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) module_exit(trizeps_pcmcia_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_AUTHOR("Juergen Schindele");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_ALIAS("platform:pxa2xx-pcmcia");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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