^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef MAX1600_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define MAX1600_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) struct gpio_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) MAX1600_GPIO_0VCC = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) MAX1600_GPIO_1VCC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) MAX1600_GPIO_0VPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) MAX1600_GPIO_1VPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) MAX1600_GPIO_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) MAX1600_CHAN_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MAX1600_CHAN_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) MAX1600_CODE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MAX1600_CODE_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct max1600 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct gpio_desc *gpio[MAX1600_GPIO_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int max1600_init(struct device *dev, struct max1600 **ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int channel, unsigned int code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int max1600_configure(struct max1600 *, unsigned int vcc, unsigned int vpp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif