Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Procfs interface for the PCI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/capability.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/security.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static int proc_initialized;	/* = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct pci_dev *dev = PDE_DATA(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	return fixed_size_llseek(file, off, whence, dev->cfg_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 				 size_t nbytes, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct pci_dev *dev = PDE_DATA(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	unsigned int pos = *ppos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	unsigned int cnt, size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	 * Normal users can read only the standardized portion of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	 * configuration space as several chips lock up when trying to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 * undefined locations (think of Intel PIIX4 as a typical example).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	if (capable(CAP_SYS_ADMIN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		size = dev->cfg_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		size = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		size = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	if (pos >= size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (nbytes >= size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		nbytes = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	if (pos + nbytes > size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		nbytes = size - pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	cnt = nbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	if (!access_ok(buf, cnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	pci_config_pm_runtime_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if ((pos & 1) && cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		unsigned char val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		pci_user_read_config_byte(dev, pos, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		__put_user(val, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	if ((pos & 3) && cnt > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		pci_user_read_config_word(dev, pos, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		buf += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		pos += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		cnt -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	while (cnt >= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		pci_user_read_config_dword(dev, pos, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		__put_user(cpu_to_le32(val), (__le32 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		buf += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		pos += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		cnt -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (cnt >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		pci_user_read_config_word(dev, pos, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		buf += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		pos += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		cnt -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		unsigned char val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		pci_user_read_config_byte(dev, pos, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		__put_user(val, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	pci_config_pm_runtime_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	*ppos = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	return nbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 				  size_t nbytes, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct inode *ino = file_inode(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct pci_dev *dev = PDE_DATA(ino);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	int pos = *ppos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int size = dev->cfg_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int cnt, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	if (pos >= size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (nbytes >= size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		nbytes = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (pos + nbytes > size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		nbytes = size - pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	cnt = nbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (!access_ok(buf, cnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	pci_config_pm_runtime_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if ((pos & 1) && cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		unsigned char val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		__get_user(val, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		pci_user_write_config_byte(dev, pos, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if ((pos & 3) && cnt > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		__le16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		__get_user(val, (__le16 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		buf += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		pos += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		cnt -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	while (cnt >= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		__le32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		__get_user(val, (__le32 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		buf += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		pos += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		cnt -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (cnt >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		__le16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		__get_user(val, (__le16 __user *) buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		buf += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		pos += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		cnt -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		unsigned char val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		__get_user(val, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		pci_user_write_config_byte(dev, pos, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	pci_config_pm_runtime_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	*ppos = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	i_size_write(ino, dev->cfg_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	return nbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct pci_filp_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	enum pci_mmap_state mmap_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	int write_combine;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			       unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	struct pci_dev *dev = PDE_DATA(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #ifdef HAVE_PCI_MMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	struct pci_filp_private *fpriv = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #endif /* HAVE_PCI_MMAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	case PCIIOC_CONTROLLER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		ret = pci_domain_nr(dev->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #ifdef HAVE_PCI_MMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	case PCIIOC_MMAP_IS_IO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (!arch_can_pci_mmap_io())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		fpriv->mmap_state = pci_mmap_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	case PCIIOC_MMAP_IS_MEM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		fpriv->mmap_state = pci_mmap_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	case PCIIOC_WRITE_COMBINE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (arch_can_pci_mmap_wc()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			if (arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				fpriv->write_combine = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				fpriv->write_combine = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		/* If arch decided it can't, fall through... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #endif /* HAVE_PCI_MMAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #ifdef HAVE_PCI_MMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct pci_dev *dev = PDE_DATA(file_inode(file));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	struct pci_filp_private *fpriv = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if (!capable(CAP_SYS_RAWIO) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	    security_locked_down(LOCKDOWN_PCI_ACCESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	if (fpriv->mmap_state == pci_mmap_io) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		if (!arch_can_pci_mmap_io())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		res_bit = IORESOURCE_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	/* Make sure the caller is mapping a real resource for this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		if (dev->resource[i].flags & res_bit &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		    pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (i >= PCI_STD_NUM_BARS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	if (fpriv->mmap_state == pci_mmap_mem &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	    fpriv->write_combine) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		if (dev->resource[i].flags & IORESOURCE_PREFETCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 			write_combine = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	ret = pci_mmap_page_range(dev, i, vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 				  fpriv->mmap_state, write_combine);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int proc_bus_pci_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (!fpriv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	fpriv->mmap_state = pci_mmap_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	fpriv->write_combine = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	file->private_data = fpriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static int proc_bus_pci_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	kfree(file->private_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	file->private_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #endif /* HAVE_PCI_MMAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static const struct proc_ops proc_bus_pci_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	.proc_lseek	= proc_bus_pci_lseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	.proc_read	= proc_bus_pci_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	.proc_write	= proc_bus_pci_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.proc_ioctl	= proc_bus_pci_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.proc_compat_ioctl = proc_bus_pci_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #ifdef HAVE_PCI_MMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.proc_open	= proc_bus_pci_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.proc_release	= proc_bus_pci_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	.proc_mmap	= proc_bus_pci_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	.proc_get_unmapped_area = get_pci_unmapped_area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #endif /* HAVE_PCI_MMAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* iterator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static void *pci_seq_start(struct seq_file *m, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	loff_t n = *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	for_each_pci_dev(dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		if (!n--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	return dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	struct pci_dev *dev = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	(*pos)++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	return dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static void pci_seq_stop(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	if (v) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		struct pci_dev *dev = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static int show_device(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	const struct pci_dev *dev = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	const struct pci_driver *drv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	if (dev == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	drv = pci_dev_driver(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			dev->bus->number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 			dev->devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 			dev->vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 			dev->device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 			dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	/* only print standard and ROM resources to preserve compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		resource_size_t start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		seq_printf(m, "\t%16llx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 			(unsigned long long)(start |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			(dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		resource_size_t start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		seq_printf(m, "\t%16llx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			dev->resource[i].start < dev->resource[i].end ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 			(unsigned long long)(end - start) + 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	seq_putc(m, '\t');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	if (drv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		seq_puts(m, drv->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const struct seq_operations proc_bus_pci_devices_op = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	.start	= pci_seq_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	.next	= pci_seq_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.stop	= pci_seq_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	.show	= show_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static struct proc_dir_entry *proc_bus_pci_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int pci_proc_attach_device(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	struct pci_bus *bus = dev->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	struct proc_dir_entry *e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	char name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	if (!proc_initialized)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 		return -EACCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	if (!bus->procdir) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		if (pci_proc_domain(bus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 			sprintf(name, "%04x:%02x", pci_domain_nr(bus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 					bus->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 			sprintf(name, "%02x", bus->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 		if (!bus->procdir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 			     &proc_bus_pci_ops, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	if (!e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	proc_set_size(e, dev->cfg_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	dev->procent = e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int pci_proc_detach_device(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	proc_remove(dev->procent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	dev->procent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int pci_proc_detach_bus(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	proc_remove(bus->procdir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static int __init pci_proc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	proc_create_seq("devices", 0, proc_bus_pci_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 		    &proc_bus_pci_devices_op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	proc_initialized = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	for_each_pci_dev(dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		pci_proc_attach_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) device_initcall(pci_proc_init);