^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # PCI Express Port Bus Configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) config PCIEPORTBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) bool "PCI Express Port Bus support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) This enables PCI Express Port Bus support. Users can then enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) support for Native Hot-Plug, Advanced Error Reporting, Power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Management Events, and Downstream Port Containment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) # Include service Kconfig here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) config HOTPLUG_PCI_PCIE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) bool "PCI Express Hotplug driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) depends on HOTPLUG_PCI && PCIEPORTBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Say Y here if you have a motherboard that supports PCI Express Native
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Hotplug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) When in doubt, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) config PCIEAER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) bool "PCI Express Advanced Error Reporting support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) depends on PCIEPORTBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) select RAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) This enables PCI Express Root Port Advanced Error Reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) (AER) driver support. Error reporting messages sent to Root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Port will be handled by PCI Express AER driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) config PCIEAER_INJECT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) tristate "PCI Express error injection support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) depends on PCIEAER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) select GENERIC_IRQ_INJECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) This enables PCI Express Root Port Advanced Error Reporting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) (AER) software error injector.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Debugging AER code is quite difficult because it is hard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) to trigger various real hardware errors. Software-based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) error injection can fake almost all kinds of errors with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) help of a user space helper tool aer-inject, which can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) gotten from:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) https://www.kernel.org/pub/linux/utils/pci/aer-inject/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) # PCI Express ECRC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) config PCIE_ECRC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) bool "PCI Express ECRC settings control"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) depends on PCIEAER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Used to override firmware/bios settings for PCI Express ECRC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) (transaction layer end-to-end CRC checking).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) When in doubt, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) # PCI Express ASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) config PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) bool "PCI Express ASPM control" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) This enables OS control over PCI Express ASPM (Active State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Power Management) and Clock Power Management. ASPM supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) state L0/L0s/L1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ASPM is initially set up by the firmware. With this option enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Linux can modify this state in order to disable ASPM on known-bad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) hardware or configurations and enable it when known-safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ASPM can be disabled or enabled at runtime via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /sys/module/pcie_aspm/parameters/policy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) When in doubt, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) prompt "Default ASPM policy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) default PCIEASPM_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) config PCIEASPM_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) bool "BIOS default"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Use the BIOS defaults for PCI Express ASPM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) config PCIEASPM_POWERSAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) bool "Powersave"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) Enable PCI Express ASPM L0s and L1 where possible, even if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) BIOS did not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) config PCIEASPM_POWER_SUPERSAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) bool "Power Supersave"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) possible. This would result in higher power savings while staying in L1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) where the components support it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) config PCIEASPM_PERFORMANCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) bool "Performance"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) config PCIEASPM_EXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) tristate "Extend ASPM function"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) depends on PCIEASPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) This enables the extensions APIs for ASPM control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) config PCIE_PME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) depends on PCIEPORTBUS && PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) config PCIE_DPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) bool "PCI Express Downstream Port Containment support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) depends on PCIEPORTBUS && PCIEAER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) This enables PCI Express Downstream Port Containment (DPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) driver support. DPC events from Root and Downstream ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) will be handled by the DPC driver. If your system doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) have this capability or you do not want to use this feature,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) it is safe to answer N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) config PCIE_PTM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) bool "PCI Express Precision Time Measurement support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) This enables PCI Express Precision Time Measurement (PTM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) This is only useful if you have devices that support PTM, but it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) is safe to enable even if you don't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) config PCIE_EDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) bool "PCI Express Error Disconnect Recover support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) depends on PCIE_DPC && ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) This option adds Error Disconnect Recover support as specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) in the Downstream Port Containment Related Enhancements ECN to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) the PCI Firmware Specification r3.2. Enable this if you want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) support hybrid DPC model which uses both firmware and OS to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) implement DPC.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags