^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PCI Express I/O Virtualization (IOV) support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Single Root IOV 1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Address Translation Service 1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define VIRTFN_ID_LEN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) return dev->bus->number + ((dev->devfn + dev->sriov->offset +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) dev->sriov->stride * vf_id) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) return (dev->devfn + dev->sriov->offset +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) dev->sriov->stride * vf_id) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * change when NumVFs changes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Update iov->offset and iov->stride when NumVFs is written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * determine how many additional bus numbers will be consumed by VFs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Iterate over all valid NumVFs, validate offset and stride, and calculate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * the maximum number of bus numbers that could ever be required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int compute_max_vf_buses(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int nr_virtfn, busnr, rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) pci_iov_set_numvfs(dev, nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (busnr > iov->max_VF_buses)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) iov->max_VF_buses = busnr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pci_iov_set_numvfs(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct pci_bus *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (bus->number == busnr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) child = pci_find_bus(pci_domain_nr(bus), busnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (child)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) child = pci_add_new_bus(bus, NULL, busnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!child)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pci_bus_insert_busn_res(child, busnr, busnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (physbus != virtbus && list_empty(&virtbus->devices))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) pci_remove_bus(virtbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static void pci_read_vf_config_common(struct pci_dev *virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct pci_dev *physfn = virtfn->physfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * Some config registers are the same across all associated VFs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Read them once from VF0 so we can skip reading them from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * other VFs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * have the same Revision ID and Subsystem ID, but we assume they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pci_read_config_dword(virtfn, PCI_CLASS_REVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) &physfn->sriov->class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pci_read_config_byte(virtfn, PCI_HEADER_TYPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) &physfn->sriov->hdr_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) &physfn->sriov->subsystem_vendor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) &physfn->sriov->subsystem_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int pci_iov_sysfs_link(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct pci_dev *virtfn, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) char buf[VIRTFN_ID_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) sprintf(buf, "virtfn%u", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) goto failed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) failed1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) sysfs_remove_link(&dev->dev.kobj, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int pci_iov_add_virtfn(struct pci_dev *dev, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u64 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct pci_dev *virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (!bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) virtfn = pci_alloc_dev(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (!virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) goto failed0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) virtfn->vendor = dev->vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) virtfn->device = iov->vf_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) virtfn->is_virtfn = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) virtfn->physfn = pci_dev_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) virtfn->no_command_memory = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (id == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) pci_read_vf_config_common(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) rc = pci_setup_device(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) goto failed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) virtfn->dev.parent = dev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) virtfn->multifunction = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) res = &dev->resource[i + PCI_IOV_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!res->parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) virtfn->resource[i].name = pci_name(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) virtfn->resource[i].flags = res->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) virtfn->resource[i].start = res->start + size * id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) rc = request_resource(res, &virtfn->resource[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) BUG_ON(rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) pci_device_add(virtfn, virtfn->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) rc = pci_iov_sysfs_link(dev, virtfn, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) goto failed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) pci_bus_add_device(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) failed1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) pci_stop_and_remove_bus_device(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) failed0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) virtfn_remove_bus(dev->bus, bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) char buf[VIRTFN_ID_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct pci_dev *virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) pci_iov_virtfn_bus(dev, id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) pci_iov_virtfn_devfn(dev, id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (!virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) sprintf(buf, "virtfn%u", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) sysfs_remove_link(&dev->dev.kobj, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * pci_stop_dev() could have been called for this virtfn already,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * so the directory for the virtfn may have been removed before.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * Double check to avoid spurious sysfs warnings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (virtfn->dev.kobj.sd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) sysfs_remove_link(&virtfn->dev.kobj, "physfn");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) pci_stop_and_remove_bus_device(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) virtfn_remove_bus(dev->bus, virtfn->bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* balance pci_get_domain_bus_and_slot() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) pci_dev_put(virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static ssize_t sriov_totalvfs_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static ssize_t sriov_numvfs_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u16 num_vfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* Serialize vs sriov_numvfs_store() so readers see valid num_VFs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) device_lock(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) num_vfs = pdev->sriov->num_VFs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) device_unlock(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return sprintf(buf, "%u\n", num_vfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * num_vfs > 0; number of VFs to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * num_vfs = 0; disable all VFs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * Note: SRIOV spec does not allow partial VF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * disable, so it's all or none.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static ssize_t sriov_numvfs_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u16 num_vfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ret = kstrtou16(buf, 0, &num_vfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (num_vfs > pci_sriov_get_totalvfs(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) device_lock(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (num_vfs == pdev->sriov->num_VFs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* is PF driver loaded w/callback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (!pdev->driver || !pdev->driver->sriov_configure) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) pci_info(pdev, "Driver does not support SRIOV configuration via sysfs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ret = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (num_vfs == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* disable VFs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ret = pdev->driver->sriov_configure(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* enable VFs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (pdev->sriov->num_VFs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) pdev->sriov->num_VFs, num_vfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ret = pdev->driver->sriov_configure(pdev, num_vfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret != num_vfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) pci_warn(pdev, "%d VFs requested; only %d enabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) num_vfs, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) device_unlock(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static ssize_t sriov_offset_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return sprintf(buf, "%u\n", pdev->sriov->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static ssize_t sriov_stride_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return sprintf(buf, "%u\n", pdev->sriov->stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static ssize_t sriov_vf_device_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return sprintf(buf, "%x\n", pdev->sriov->vf_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct pci_dev *pdev = to_pci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) bool drivers_autoprobe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (kstrtobool(buf, &drivers_autoprobe) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) pdev->sriov->drivers_autoprobe = drivers_autoprobe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static DEVICE_ATTR_RO(sriov_totalvfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static DEVICE_ATTR_RW(sriov_numvfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static DEVICE_ATTR_RO(sriov_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static DEVICE_ATTR_RO(sriov_stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static DEVICE_ATTR_RO(sriov_vf_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static DEVICE_ATTR_RW(sriov_drivers_autoprobe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static struct attribute *sriov_dev_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) &dev_attr_sriov_totalvfs.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) &dev_attr_sriov_numvfs.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) &dev_attr_sriov_offset.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) &dev_attr_sriov_stride.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) &dev_attr_sriov_vf_device.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) &dev_attr_sriov_drivers_autoprobe.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static umode_t sriov_attrs_are_visible(struct kobject *kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct attribute *a, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct device *dev = kobj_to_dev(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (!dev_is_pf(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return a->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) const struct attribute_group sriov_dev_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .attrs = sriov_dev_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .is_visible = sriov_attrs_are_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int __weak pcibios_sriov_disable(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (dev->no_vf_scan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) for (i = 0; i < num_vfs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) rc = pci_iov_add_virtfn(dev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) while (i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) pci_iov_remove_virtfn(dev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int nres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u16 initial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) int bars = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) int bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (!nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (iov->num_VFs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (initial > iov->total_VFs ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) nres = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) bars |= (1 << (i + PCI_IOV_RESOURCES));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) res = &dev->resource[i + PCI_IOV_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (res->parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) nres++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (nres != iov->nres) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) pci_err(dev, "not enough MMIO resources for SR-IOV\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (bus > dev->bus->busn_res.end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) nr_virtfn, bus, &dev->bus->busn_res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (pci_enable_resources(dev, bars)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) pci_err(dev, "SR-IOV: IOV BARS not allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (iov->link != dev->devfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) pdev = pci_get_slot(dev->bus, iov->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (!pdev->is_physfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) rc = sysfs_create_link(&dev->dev.kobj,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) &pdev->dev.kobj, "dep_link");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) iov->initial_VFs = initial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (nr_virtfn < initial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) initial = nr_virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) rc = pcibios_sriov_enable(dev, initial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) goto err_pcibios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) pci_iov_set_numvfs(dev, nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) pci_cfg_access_lock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) pci_cfg_access_unlock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) rc = sriov_add_vfs(dev, initial);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) goto err_pcibios;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) iov->num_VFs = nr_virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) err_pcibios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) pci_cfg_access_lock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ssleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) pci_cfg_access_unlock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) pcibios_sriov_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (iov->link != dev->devfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) sysfs_remove_link(&dev->dev.kobj, "dep_link");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) pci_iov_set_numvfs(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static void sriov_del_vfs(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) for (i = 0; i < iov->num_VFs; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) pci_iov_remove_virtfn(dev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static void sriov_disable(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (!iov->num_VFs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) sriov_del_vfs(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) pci_cfg_access_lock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ssleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) pci_cfg_access_unlock(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) pcibios_sriov_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (iov->link != dev->devfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) sysfs_remove_link(&dev->dev.kobj, "dep_link");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) iov->num_VFs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) pci_iov_set_numvfs(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) static int sriov_init(struct pci_dev *dev, int pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) int i, bar64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) int nres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) u32 pgsz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u16 ctrl, total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) struct pci_sriov *iov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (ctrl & PCI_SRIOV_CTRL_VFE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ssleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) list_for_each_entry(pdev, &dev->bus->devices, bus_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (pdev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (pci_ari_enabled(dev->bus))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ctrl |= PCI_SRIOV_CTRL_ARI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (!total)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) pgsz &= ~((1 << i) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (!pgsz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) pgsz &= ~(pgsz - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) iov = kzalloc(sizeof(*iov), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (!iov)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) nres = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) res = &dev->resource[i + PCI_IOV_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * If it is already FIXED, don't change it, something
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * (perhaps EA or header fixups) wants it this way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (res->flags & IORESOURCE_PCI_FIXED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) bar64 = __pci_read_base(dev, pci_bar_unknown, res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) pos + PCI_SRIOV_BAR + i * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (!res->flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (resource_size(res) & (PAGE_SIZE - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) iov->barsz[i] = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) res->end = res->start + resource_size(res) * total - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) i, res, i, total);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) i += bar64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) nres++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) iov->pos = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) iov->nres = nres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) iov->ctrl = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) iov->total_VFs = total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) iov->driver_max_VFs = total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) iov->pgsz = pgsz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) iov->self = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) iov->drivers_autoprobe = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) iov->dev = pci_dev_get(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) iov->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) dev->sriov = iov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) dev->is_physfn = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) rc = compute_max_vf_buses(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) goto fail_max_buses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) fail_max_buses:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) dev->sriov = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) dev->is_physfn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) res = &dev->resource[i + PCI_IOV_RESOURCES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) res->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) kfree(iov);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static void sriov_release(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) BUG_ON(dev->sriov->num_VFs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (dev != dev->sriov->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) pci_dev_put(dev->sriov->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) kfree(dev->sriov);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev->sriov = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) static void sriov_restore_state(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) u16 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (ctrl & PCI_SRIOV_CTRL_VFE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) ctrl &= ~PCI_SRIOV_CTRL_ARI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) pci_update_resource(dev, i + PCI_IOV_RESOURCES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) pci_iov_set_numvfs(dev, iov->num_VFs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * pci_iov_init - initialize the IOV capability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * Returns 0 on success, or negative on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) int pci_iov_init(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) int pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (!pci_is_pcie(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) if (pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return sriov_init(dev, pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * pci_iov_release - release resources used by the IOV capability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) void pci_iov_release(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) sriov_release(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * pci_iov_remove - clean up SR-IOV state after PF driver is detached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) void pci_iov_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct pci_sriov *iov = dev->sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) iov->driver_max_VFs = iov->total_VFs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (iov->num_VFs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) pci_warn(dev, "driver left SR-IOV enabled after remove\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * pci_iov_update_resource - update a VF BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) * @resno: the resource number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * Update a VF BAR in the SR-IOV capability of a PF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) void pci_iov_update_resource(struct pci_dev *dev, int resno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct resource *res = dev->resource + resno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) int vf_bar = resno - PCI_IOV_RESOURCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) struct pci_bus_region region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) u16 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) u32 new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * The generic pci_restore_bars() path calls this for all devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) * including VFs and non-SR-IOV devices. If this is not a PF, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * have nothing to do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (!iov)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) vf_bar, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) * Ignore unimplemented BARs, unused resource slots for 64-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) * BARs, and non-movable resources, e.g., those described via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) * Enhanced Allocation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (!res->flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (res->flags & IORESOURCE_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (res->flags & IORESOURCE_PCI_FIXED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) pcibios_resource_to_bus(dev->bus, ®ion, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) new = region.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) pci_write_config_dword(dev, reg, new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (res->flags & IORESOURCE_MEM_64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) new = region.start >> 16 >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) pci_write_config_dword(dev, reg + 4, new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) int resno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return pci_iov_resource_size(dev, resno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) * pci_sriov_resource_alignment - get resource alignment for VF BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * @resno: the resource number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * Returns the alignment of the VF BAR found in the SR-IOV capability.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) * This is not the same as the resource size which is defined as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * the VF BAR size multiplied by the number of VFs. The alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * is just the VF BAR size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) return pcibios_iov_resource_alignment(dev, resno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) * pci_restore_iov_state - restore the state of the IOV capability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) void pci_restore_iov_state(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) sriov_restore_state(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * @auto_probe: set VF drivers auto probe flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) dev->sriov->drivers_autoprobe = auto_probe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * pci_iov_bus_range - find bus range used by Virtual Function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) * @bus: the PCI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) * Returns max number of buses (exclude current one) used by Virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) * Functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) int pci_iov_bus_range(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) int max = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) list_for_each_entry(dev, &bus->devices, bus_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (dev->sriov->max_VF_buses > max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) max = dev->sriov->max_VF_buses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return max ? max - bus->number : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) * pci_enable_sriov - enable the SR-IOV capability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) * @nr_virtfn: number of virtual functions to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) * Returns 0 on success, or negative on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) return sriov_enable(dev, nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) EXPORT_SYMBOL_GPL(pci_enable_sriov);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) * pci_disable_sriov - disable the SR-IOV capability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) void pci_disable_sriov(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) sriov_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) EXPORT_SYMBOL_GPL(pci_disable_sriov);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * pci_num_vf - return number of VFs associated with a PF device_release_driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) * Returns number of VFs, or 0 if SR-IOV is not enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) int pci_num_vf(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) return dev->sriov->num_VFs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) EXPORT_SYMBOL_GPL(pci_num_vf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) * pci_vfs_assigned - returns number of VFs are assigned to a guest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) * Returns number of VFs belonging to this device that are assigned to a guest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) * If device is not a physical function returns 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) int pci_vfs_assigned(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) struct pci_dev *vfdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) unsigned int vfs_assigned = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) unsigned short dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) /* only search if we are a PF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) * determine the device ID for the VFs, the vendor ID will be the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) * same as the PF so there is no need to check for that one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) dev_id = dev->sriov->vf_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /* loop through all the VFs to see if we own any that are assigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) vfdev = pci_get_device(dev->vendor, dev_id, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) while (vfdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) * It is considered assigned if it is a virtual function with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) * our dev as the physical function and the assigned bit is set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) pci_is_dev_assigned(vfdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) vfs_assigned++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) return vfs_assigned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) EXPORT_SYMBOL_GPL(pci_vfs_assigned);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) * pci_sriov_set_totalvfs -- reduce the TotalVFs available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) * @dev: the PCI PF device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) * @numvfs: number that should be used for TotalVFs supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * Should be called from PF driver's probe routine with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * device's mutex held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * Returns 0 if PF is an SRIOV-capable device and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * value of numvfs valid. If not a PF return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * if numvfs is invalid return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * if VFs already enabled, return -EBUSY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) if (numvfs > dev->sriov->total_VFs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) /* Shouldn't change if VFs already enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) dev->sriov->driver_max_VFs = numvfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * pci_sriov_get_totalvfs -- get total VFs supported on this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) * @dev: the PCI PF device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * For a PCIe device with SRIOV support, return the PCIe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) * SRIOV capability value of TotalVFs or the value of driver_max_VFs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) * if the driver reduced it. Otherwise 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) int pci_sriov_get_totalvfs(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) return dev->sriov->driver_max_VFs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) * pci_sriov_configure_simple - helper to configure SR-IOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) * @dev: the PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) * @nr_virtfn: number of virtual functions to enable, 0 to disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) * Enable or disable SR-IOV for devices that don't require any PF setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * before enabling SR-IOV. Return value is negative on error, or number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * VFs allocated on success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) if (!dev->is_physfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) if (pci_vfs_assigned(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) if (nr_virtfn == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) sriov_disable(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) rc = sriov_enable(dev, nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) return nr_virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags