^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PCI Express Hot Plug Controller Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1995,2001 Compaq Computer Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2001 IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2003-2004 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define dev_fmt(fmt) "pciehp: " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "pciehp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* The following routines constitute the bulk of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) hotplug controller logic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SAFE_REMOVAL true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SURPRISE_REMOVAL false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void set_slot_off(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Turn off slot, turn on attention indicator, turn off power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * indicator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (POWER_CTRL(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) pciehp_power_off_slot(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * After turning power off, we must wait for at least 1 second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * before taking any action that relies on power having been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * removed from the slot/adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) PCI_EXP_SLTCTL_ATTN_IND_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * board_added - Called after a board has been added to the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @ctrl: PCIe hotplug controller where board is added
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Turns power on for the board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Configures board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int board_added(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct pci_bus *parent = ctrl->pcie->port->subordinate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (POWER_CTRL(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Power on slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) retval = pciehp_power_on_slot(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) INDICATOR_NOOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Check link training status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) retval = pciehp_check_link_status(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) goto err_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Check for a power fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (ctrl->power_fault_detected || pciehp_query_power_fault(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) retval = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) goto err_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) retval = pciehp_configure_device(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (retval != -EEXIST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ctrl_err(ctrl, "Cannot add device at %04x:%02x:00\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pci_domain_nr(parent), parent->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) goto err_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) PCI_EXP_SLTCTL_ATTN_IND_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) err_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) set_slot_off(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * remove_board - Turn off slot and Power Indicator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @ctrl: PCIe hotplug controller where board is being removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @safe_removal: whether the board is safely removed (versus surprise removed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void remove_board(struct controller *ctrl, bool safe_removal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pciehp_unconfigure_device(ctrl, safe_removal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (POWER_CTRL(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) pciehp_power_off_slot(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * After turning power off, we must wait for at least 1 second
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * before taking any action that relies on power having been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * removed from the slot/adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* Ignore link or presence changes caused by power off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) atomic_and(~(PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) &ctrl->pending_events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) INDICATOR_NOOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int pciehp_enable_slot(struct controller *ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static int pciehp_disable_slot(struct controller *ctrl, bool safe_removal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void pciehp_request(struct controller *ctrl, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) atomic_or(action, &ctrl->pending_events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (!pciehp_poll_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) irq_wake_thread(ctrl->pcie->irq, ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void pciehp_queue_pushbutton_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct controller *ctrl = container_of(work, struct controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) button_work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) pciehp_request(ctrl, DISABLE_SLOT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) pciehp_request(ctrl, PCI_EXP_SLTSTA_PDC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) void pciehp_handle_button_press(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) case OFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) case ON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (ctrl->state == ON_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ctrl->state = BLINKINGOFF_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ctrl_info(ctrl, "Slot(%s): Powering off due to button press\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ctrl->state = BLINKINGON_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ctrl_info(ctrl, "Slot(%s) Powering on due to button press\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* blink power indicator and turn off attention */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) PCI_EXP_SLTCTL_ATTN_IND_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) schedule_delayed_work(&ctrl->button_work, 5 * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * Cancel if we are still blinking; this means that we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * press the attention again before the 5 sec. limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * expires to cancel hot-add or hot-remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ctrl_info(ctrl, "Slot(%s): Button cancel\n", slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) cancel_delayed_work(&ctrl->button_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (ctrl->state == BLINKINGOFF_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) ctrl->state = ON_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) PCI_EXP_SLTCTL_ATTN_IND_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ctrl->state = OFF_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) PCI_EXP_SLTCTL_ATTN_IND_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ctrl_info(ctrl, "Slot(%s): Action canceled due to button press\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ctrl_err(ctrl, "Slot(%s): Ignoring invalid state %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) slot_name(ctrl), ctrl->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) void pciehp_handle_disable_request(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) cancel_delayed_work(&ctrl->button_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ctrl->state = POWEROFF_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ctrl->request_result = pciehp_disable_slot(ctrl, SAFE_REMOVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int present, link_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * If the slot is on and presence or link has changed, turn it off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * Even if it's occupied again, we cannot assume the card is the same.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) cancel_delayed_work(&ctrl->button_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) case ON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ctrl->state = POWEROFF_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (events & PCI_EXP_SLTSTA_DLLSC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ctrl_info(ctrl, "Slot(%s): Link Down\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (events & PCI_EXP_SLTSTA_PDC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ctrl_info(ctrl, "Slot(%s): Card not present\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) pciehp_disable_slot(ctrl, SURPRISE_REMOVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Turn the slot on if it's occupied or link is up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) present = pciehp_card_present(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) link_active = pciehp_check_link_active(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (present <= 0 && link_active <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) cancel_delayed_work(&ctrl->button_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) case OFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ctrl->state = POWERON_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ctrl_info(ctrl, "Slot(%s): Card present\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) if (link_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ctrl_info(ctrl, "Slot(%s): Link Up\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ctrl->request_result = pciehp_enable_slot(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int __pciehp_enable_slot(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 getstatus = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (MRL_SENS(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) pciehp_get_latch_status(ctrl, &getstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (getstatus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ctrl_info(ctrl, "Slot(%s): Latch open\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (POWER_CTRL(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) pciehp_get_power_status(ctrl, &getstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (getstatus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ctrl_info(ctrl, "Slot(%s): Already enabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return board_added(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int pciehp_enable_slot(struct controller *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) pm_runtime_get_sync(&ctrl->pcie->port->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ret = __pciehp_enable_slot(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (ret && ATTN_BUTTN(ctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* may be blinking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) INDICATOR_NOOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) pm_runtime_put(&ctrl->pcie->port->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) ctrl->state = ret ? OFF_STATE : ON_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int __pciehp_disable_slot(struct controller *ctrl, bool safe_removal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) u8 getstatus = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (POWER_CTRL(ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) pciehp_get_power_status(ctrl, &getstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (!getstatus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ctrl_info(ctrl, "Slot(%s): Already disabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) remove_board(ctrl, safe_removal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int pciehp_disable_slot(struct controller *ctrl, bool safe_removal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) pm_runtime_get_sync(&ctrl->pcie->port->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ret = __pciehp_disable_slot(ctrl, safe_removal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) pm_runtime_put(&ctrl->pcie->port->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ctrl->state = OFF_STATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct controller *ctrl = to_ctrl(hotplug_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case OFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * The IRQ thread becomes a no-op if the user pulls out the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * card before the thread wakes up, so initialize to -ENODEV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) ctrl->request_result = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) pciehp_request(ctrl, PCI_EXP_SLTSTA_PDC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) wait_event(ctrl->requester,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) !atomic_read(&ctrl->pending_events) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) !ctrl->ist_running);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return ctrl->request_result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) case POWERON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ctrl_info(ctrl, "Slot(%s): Already in powering on state\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case ON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case POWEROFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ctrl_info(ctrl, "Slot(%s): Already enabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ctrl_err(ctrl, "Slot(%s): Invalid state %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) slot_name(ctrl), ctrl->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct controller *ctrl = to_ctrl(hotplug_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) mutex_lock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) switch (ctrl->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) case BLINKINGOFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) case ON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) pciehp_request(ctrl, DISABLE_SLOT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) wait_event(ctrl->requester,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) !atomic_read(&ctrl->pending_events) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) !ctrl->ist_running);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return ctrl->request_result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) case POWEROFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ctrl_info(ctrl, "Slot(%s): Already in powering off state\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) case BLINKINGON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) case OFF_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) case POWERON_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ctrl_info(ctrl, "Slot(%s): Already disabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) slot_name(ctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ctrl_err(ctrl, "Slot(%s): Invalid state %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) slot_name(ctrl), ctrl->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) mutex_unlock(&ctrl->state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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