Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * cpcihp_generic.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Generic port I/O CompactPCI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright 2002 SOMA Networks, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright 2001 Intel San Luis Obispo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright 2000,2001 MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * This generic CompactPCI hotplug driver should allow using the PCI hotplug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * mechanism on any CompactPCI board that exposes the #ENUM signal as a bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * in a system register that can be read through standard port I/O.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * Send feedback to <scottm@somanetworks.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "cpci_hotplug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define DRIVER_VERSION	"0.1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define DRIVER_AUTHOR	"Scott Murray <scottm@somanetworks.com>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define DRIVER_DESC	"Generic port I/O CompactPCI Hot Plug Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #if !defined(MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define MY_NAME	"cpcihp_generic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define MY_NAME	THIS_MODULE->name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define dbg(format, arg...)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	do {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		if (debug)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 			printk(KERN_DEBUG "%s: " format "\n",	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 				MY_NAME, ## arg);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define err(format, arg...) printk(KERN_ERR "%s: " format "\n", MY_NAME, ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME, ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME, ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* local variables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static bool debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static char *bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static u8 bridge_busnr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static u8 bridge_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static struct pci_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static u8 first_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static u8 last_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static u16 port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static unsigned int enum_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static u8 enum_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static struct cpci_hp_controller_ops generic_hpc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static struct cpci_hp_controller generic_hpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static int __init validate_parameters(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	char *str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	if (!bridge) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		info("not configured, disabling.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	str = bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (!*str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	tmp = simple_strtoul(str, &p, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (p == str || tmp > 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		err("Invalid hotplug bus bridge device bus number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	bridge_busnr = (u8) tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	dbg("bridge_busnr = 0x%02x", bridge_busnr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (*p != ':') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		err("Invalid hotplug bus bridge device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	str = p + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	tmp = simple_strtoul(str, &p, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (p == str || tmp > 0x1f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		err("Invalid hotplug bus bridge device slot number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	bridge_slot = (u8) tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	dbg("bridge_slot = 0x%02x", bridge_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	dbg("first_slot = 0x%02x", first_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	dbg("last_slot = 0x%02x", last_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (!(first_slot && last_slot)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		err("Need to specify first_slot and last_slot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (last_slot < first_slot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		err("first_slot must be less than last_slot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	dbg("port = 0x%04x", port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	dbg("enum_bit = 0x%02x", enum_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (enum_bit > 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		err("Invalid #ENUM bit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	enum_mask = 1 << enum_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int query_enum(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	value = inb_p(port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return ((value & enum_mask) == enum_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int __init cpcihp_generic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	info(DRIVER_DESC " version: " DRIVER_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	status = validate_parameters();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	r = request_region(port, 1, "#ENUM hotswap signal register");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (!r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	dev = pci_get_domain_bus_and_slot(0, bridge_busnr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 					  PCI_DEVFN(bridge_slot, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (!dev || dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		err("Invalid bridge device %s", bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	bus = dev->subordinate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	memset(&generic_hpc, 0, sizeof(struct cpci_hp_controller));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	generic_hpc_ops.query_enum = query_enum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	generic_hpc.ops = &generic_hpc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	status = cpci_hp_register_controller(&generic_hpc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		err("Could not register cPCI hotplug controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	dbg("registered controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	status = cpci_hp_register_bus(bus, first_slot, last_slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		err("Could not register cPCI hotplug bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		goto init_bus_register_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	dbg("registered bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	status = cpci_hp_start();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		err("Could not started cPCI hotplug system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		goto init_start_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	dbg("started cpci hp system");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) init_start_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	cpci_hp_unregister_bus(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) init_bus_register_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	cpci_hp_unregister_controller(&generic_hpc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	err("status = %d", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void __exit cpcihp_generic_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	cpci_hp_stop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	cpci_hp_unregister_bus(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	cpci_hp_unregister_controller(&generic_hpc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	release_region(port, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) module_init(cpcihp_generic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) module_exit(cpcihp_generic_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) module_param(debug, bool, S_IRUGO | S_IWUSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) module_param(bridge, charp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MODULE_PARM_DESC(bridge, "Hotswap bus bridge device, <bus>:<slot> (bus and slot are in hexadecimal)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) module_param(first_slot, byte, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_PARM_DESC(first_slot, "Hotswap bus first slot number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) module_param(last_slot, byte, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MODULE_PARM_DESC(last_slot, "Hotswap bus last slot number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) module_param_hw(port, ushort, ioport, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MODULE_PARM_DESC(port, "#ENUM signal I/O port");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) module_param(enum_bit, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_PARM_DESC(enum_bit, "#ENUM signal bit (0-7)");