^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2015 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/phy/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "../pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "pcie-iproc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const struct of_device_id iproc_pcie_of_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .compatible = "brcm,iproc-pcie",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .data = (int *)IPROC_PCIE_PAXB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .compatible = "brcm,iproc-pcie-paxb-v2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .data = (int *)IPROC_PCIE_PAXB_V2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .compatible = "brcm,iproc-pcie-paxc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .data = (int *)IPROC_PCIE_PAXC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .compatible = "brcm,iproc-pcie-paxc-v2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .data = (int *)IPROC_PCIE_PAXC_V2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct iproc_pcie *pcie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct resource reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct pci_host_bridge *bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (!bridge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) pcie = pci_host_bridge_priv(bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) pcie->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ret = of_address_to_resource(np, 0, ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) dev_err(dev, "unable to obtain controller resources\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) pcie->base = devm_pci_remap_cfgspace(dev, reg.start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) resource_size(®));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (!pcie->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) dev_err(dev, "unable to map controller registers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pcie->base_addr = reg.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (of_property_read_bool(np, "brcm,pcie-ob")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = of_property_read_u32(np, "brcm,pcie-ob-axi-offset",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "missing brcm,pcie-ob-axi-offset property\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pcie->ob.axi_offset = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pcie->need_ob_cfg = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * DT nodes are not used by all platforms that use the iProc PCIe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * core driver. For platforms that require explicit inbound mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * configuration, "dma-ranges" would have been present in DT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* PHY use is optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) pcie->phy = devm_phy_optional_get(dev, "pcie-phy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (IS_ERR(pcie->phy))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return PTR_ERR(pcie->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* PAXC doesn't support legacy IRQs, skip mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) switch (pcie->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case IPROC_PCIE_PAXC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case IPROC_PCIE_PAXC_V2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) pcie->map_irq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ret = iproc_pcie_setup(pcie, &bridge->windows);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) dev_err(dev, "PCIe controller setup failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) platform_set_drvdata(pdev, pcie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int iproc_pcie_pltfm_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct iproc_pcie *pcie = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return iproc_pcie_remove(pcie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static void iproc_pcie_pltfm_shutdown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct iproc_pcie *pcie = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) iproc_pcie_shutdown(pcie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct platform_driver iproc_pcie_pltfm_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .name = "iproc-pcie",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .of_match_table = of_match_ptr(iproc_pcie_of_match_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .probe = iproc_pcie_pltfm_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .remove = iproc_pcie_pltfm_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .shutdown = iproc_pcie_pltfm_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) module_platform_driver(iproc_pcie_pltfm_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) MODULE_DESCRIPTION("Broadcom iPROC PCIe platform driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MODULE_LICENSE("GPL v2");