Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Allwinner sunXi SoCs Security ID support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/iopoll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /* Registers and special values for doing register-based SID readout on H3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define SUN8I_SID_PRCTL		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define SUN8I_SID_RDKEY		0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define SUN8I_SID_OFFSET_MASK	0x1FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define SUN8I_SID_OFFSET_SHIFT	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define SUN8I_SID_OP_LOCK	(0xAC << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define SUN8I_SID_READ		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) struct sunxi_sid_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	u32	value_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	u32	size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	bool	need_register_readout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) struct sunxi_sid {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	void __iomem		*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	u32			value_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int sunxi_sid_read(void *context, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 			  void *val, size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct sunxi_sid *sid = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	memcpy_fromio(val, sid->base + sid->value_offset + offset, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 				      const unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 				      u32 *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u32 reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	/* Set word, lock access, and set read command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	reg_val = (offset & SUN8I_SID_OFFSET_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		  << SUN8I_SID_OFFSET_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	writel(reg_val, sid->base + SUN8I_SID_PRCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 				 !(reg_val & SUN8I_SID_READ), 100, 250000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	if (out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		*out = readl(sid->base + SUN8I_SID_RDKEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	writel(0, sid->base + SUN8I_SID_PRCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * to be not reliable at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * Read by the registers instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 				 void *val, size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	struct sunxi_sid *sid = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	u32 word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* .stride = 4 so offset is guaranteed to be aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	while (bytes >= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		ret = sun8i_sid_register_readout(sid, offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		val += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		bytes -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	/* Handle any trailing bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	ret = sun8i_sid_register_readout(sid, offset, &word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	memcpy(val, &word, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int sunxi_sid_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct nvmem_config *nvmem_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct sunxi_sid *sid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	char *randomness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	const struct sunxi_sid_cfg *cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	if (!sid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	cfg = of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (!cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	sid->value_offset = cfg->value_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	sid->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (IS_ERR(sid->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return PTR_ERR(sid->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	size = cfg->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	nvmem_cfg = devm_kzalloc(dev, sizeof(*nvmem_cfg), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (!nvmem_cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	nvmem_cfg->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	nvmem_cfg->name = "sunxi-sid";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	nvmem_cfg->read_only = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	nvmem_cfg->size = cfg->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	nvmem_cfg->word_size = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	nvmem_cfg->stride = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	nvmem_cfg->priv = sid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (cfg->need_register_readout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		nvmem_cfg->reg_read = sun8i_sid_read_by_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		nvmem_cfg->reg_read = sunxi_sid_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	nvmem = devm_nvmem_register(dev, nvmem_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (IS_ERR(nvmem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return PTR_ERR(nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	randomness = kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (!randomness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	nvmem_cfg->reg_read(sid, 0, randomness, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	add_device_randomness(randomness, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	kfree(randomness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	platform_set_drvdata(pdev, nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const struct sunxi_sid_cfg sun4i_a10_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.size = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static const struct sunxi_sid_cfg sun7i_a20_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.size = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static const struct sunxi_sid_cfg sun8i_h3_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.value_offset = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.size = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.need_register_readout = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct sunxi_sid_cfg sun50i_a64_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.value_offset = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.size = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.need_register_readout = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static const struct sunxi_sid_cfg sun50i_h6_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.value_offset = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.size = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static const struct of_device_id sunxi_sid_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	{ .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	{ .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	{ .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	{/* sentinel */},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static struct platform_driver sunxi_sid_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.probe = sunxi_sid_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		.name = "eeprom-sunxi-sid",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		.of_match_table = sunxi_sid_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) module_platform_driver(sunxi_sid_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) MODULE_DESCRIPTION("Allwinner sunxi security id driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) MODULE_LICENSE("GPL");