^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Freescale MXS On-Chip OTP driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Stefan Wahren <stefan.wahren@i2se.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on the driver from Huang Shijie and Christoph G. Baumann
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/stmp_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* OCOTP registers and bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BM_OCOTP_CTRL_RD_BANK_OPEN BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BM_OCOTP_CTRL_ERROR BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BM_OCOTP_CTRL_BUSY BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define OCOTP_TIMEOUT 10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define OCOTP_DATA_OFFSET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct mxs_ocotp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int mxs_ocotp_wait(struct mxs_ocotp *otp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int timeout = OCOTP_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) while (timeout--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) status = readl(otp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (!(status & (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (status & BM_OCOTP_CTRL_BUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) else if (status & BM_OCOTP_CTRL_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int mxs_ocotp_read(void *context, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) void *val, size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct mxs_ocotp *otp = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ret = clk_enable(otp->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ret = mxs_ocotp_wait(otp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) goto disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* open OCOTP banks for read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* approximately wait 33 hclk cycles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ret = mxs_ocotp_wait(otp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) goto close_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) while (bytes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if ((offset < OCOTP_DATA_OFFSET) || (offset % 16)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* fill up non-data register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *buf++ = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *buf++ = readl(otp->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) bytes -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) offset += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) close_banks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* close banks for power saving */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) disable_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) clk_disable(otp->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static struct nvmem_config ocotp_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .name = "mxs-ocotp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .stride = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .word_size = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .reg_read = mxs_ocotp_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mxs_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static const struct mxs_data imx23_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .size = 0x220,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const struct mxs_data imx28_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .size = 0x2a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const struct of_device_id mxs_ocotp_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { .compatible = "fsl,imx23-ocotp", .data = &imx23_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { .compatible = "fsl,imx28-ocotp", .data = &imx28_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { /* sentinel */},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MODULE_DEVICE_TABLE(of, mxs_ocotp_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static void mxs_ocotp_action(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) clk_unprepare(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int mxs_ocotp_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) const struct mxs_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct mxs_ocotp *otp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) match = of_match_device(dev->driver->of_match_table, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (!match || !match->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) otp = devm_kzalloc(dev, sizeof(*otp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (!otp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) otp->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (IS_ERR(otp->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return PTR_ERR(otp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) otp->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (IS_ERR(otp->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return PTR_ERR(otp->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ret = clk_prepare(otp->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_err(dev, "failed to prepare clk: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ret = devm_add_action_or_reset(&pdev->dev, mxs_ocotp_action, otp->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) data = match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ocotp_config.size = data->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ocotp_config.priv = otp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ocotp_config.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) otp->nvmem = devm_nvmem_register(dev, &ocotp_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (IS_ERR(otp->nvmem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return PTR_ERR(otp->nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) platform_set_drvdata(pdev, otp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct platform_driver mxs_ocotp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .probe = mxs_ocotp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .name = "mxs-ocotp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .of_match_table = mxs_ocotp_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) module_platform_driver(mxs_ocotp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_AUTHOR("Stefan Wahren <wahrenst@gmx.net");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) MODULE_DESCRIPTION("driver for OCOTP in i.MX23/i.MX28");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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