Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2015 MediaTek Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct mtk_efuse_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int mtk_reg_read(void *context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 			unsigned int reg, void *_val, size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	struct mtk_efuse_priv *priv = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	u32 *val = _val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	int i = 0, words = bytes / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	while (words--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		*val++ = readl(priv->base + reg + (i++ * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int mtk_efuse_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	struct nvmem_config econfig = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct mtk_efuse_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	priv->base = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	if (IS_ERR(priv->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return PTR_ERR(priv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	econfig.stride = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	econfig.word_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	econfig.reg_read = mtk_reg_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	econfig.size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	econfig.priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	econfig.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	nvmem = devm_nvmem_register(dev, &econfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	return PTR_ERR_OR_ZERO(nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const struct of_device_id mtk_efuse_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	{ .compatible = "mediatek,mt8173-efuse",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	{ .compatible = "mediatek,efuse",},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	{/* sentinel */},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MODULE_DEVICE_TABLE(of, mtk_efuse_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct platform_driver mtk_efuse_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	.probe = mtk_efuse_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		.name = "mediatek,efuse",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		.of_match_table = mtk_efuse_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static int __init mtk_efuse_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	ret = platform_driver_register(&mtk_efuse_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 		pr_err("Failed to register efuse driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void __exit mtk_efuse_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 	return platform_driver_unregister(&mtk_efuse_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) subsys_initcall(mtk_efuse_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) module_exit(mtk_efuse_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MODULE_AUTHOR("Andrew-CT Chen <andrew-ct.chen@mediatek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MODULE_DESCRIPTION("Mediatek EFUSE driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MODULE_LICENSE("GPL v2");