^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * NXP LPC18xx/43xx OTP memory NVMEM driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016 Joachim Eastwood <manabian@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Based on the imx ocotp driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (c) 2015 Pengutronix, Philipp Zabel <p.zabel@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * TODO: add support for writing OTP register via API in boot ROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/nvmem-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * at offset 0 from the base.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Bank 0 contains the part ID for Flashless devices and is reseverd for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * devices with Flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Bank 1/2 is generale purpose or AES key storage for secure devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Bank 3 contains control data, USB ID and generale purpose words.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LPC18XX_OTP_NUM_BANKS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LPC18XX_OTP_WORDS_PER_BANK 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LPC18XX_OTP_WORD_SIZE sizeof(u32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LPC18XX_OTP_SIZE (LPC18XX_OTP_NUM_BANKS * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) LPC18XX_OTP_WORDS_PER_BANK * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) LPC18XX_OTP_WORD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct lpc18xx_otp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int lpc18xx_otp_read(void *context, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void *val, size_t bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct lpc18xx_otp *otp = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unsigned int count = bytes >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 index = offset >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 *buf = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (count > (LPC18XX_OTP_SIZE - index))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) count = LPC18XX_OTP_SIZE - index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) for (i = index; i < (index + count); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct nvmem_config lpc18xx_otp_nvmem_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .name = "lpc18xx-otp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .read_only = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .word_size = LPC18XX_OTP_WORD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .stride = LPC18XX_OTP_WORD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .reg_read = lpc18xx_otp_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int lpc18xx_otp_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct nvmem_device *nvmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct lpc18xx_otp *otp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!otp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) otp->base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (IS_ERR(otp->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return PTR_ERR(otp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) lpc18xx_otp_nvmem_config.size = LPC18XX_OTP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) lpc18xx_otp_nvmem_config.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) lpc18xx_otp_nvmem_config.priv = otp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) nvmem = devm_nvmem_register(&pdev->dev, &lpc18xx_otp_nvmem_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return PTR_ERR_OR_ZERO(nvmem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const struct of_device_id lpc18xx_otp_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { .compatible = "nxp,lpc1850-otp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MODULE_DEVICE_TABLE(of, lpc18xx_otp_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct platform_driver lpc18xx_otp_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .probe = lpc18xx_otp_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .name = "lpc18xx_otp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .of_match_table = lpc18xx_otp_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) module_platform_driver(lpc18xx_otp_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MODULE_AUTHOR("Joachim Eastwoood <manabian@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MODULE_DESCRIPTION("NXP LPC18xx OTP NVMEM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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