^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * I2C Link Layer for ST21NFCA HCI based Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2014 STMicroelectronics SAS. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/crc-ccitt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/nfc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <net/nfc/hci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <net/nfc/llc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <net/nfc/nfc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "st21nfca.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Every frame starts with ST21NFCA_SOF_EOF and ends with ST21NFCA_SOF_EOF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Because ST21NFCA_SOF_EOF is a possible data value, there is a mecanism
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * called byte stuffing has been introduced.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * - insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * - xor byte with ST21NFCA_BYTE_STUFFING_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ST21NFCA_SOF_EOF 0x7e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define ST21NFCA_BYTE_STUFFING_MASK 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define ST21NFCA_ESCAPE_BYTE_STUFFING 0x7d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* SOF + 00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ST21NFCA_FRAME_HEADROOM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* 2 bytes crc + EOF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ST21NFCA_FRAME_TAILROOM 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define IS_START_OF_FRAME(buf) (buf[0] == ST21NFCA_SOF_EOF && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) buf[1] == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ST21NFCA_HCI_DRIVER_NAME "st21nfca_hci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ST21NFCA_HCI_I2C_DRIVER_NAME "st21nfca_hci_i2c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct st21nfca_i2c_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct i2c_client *i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct nfc_hci_dev *hdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct gpio_desc *gpiod_ena;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct st21nfca_se_status se_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct sk_buff *pending_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int current_read_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * crc might have fail because i2c macro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * is disable due to other interface activity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int crc_trials;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int powered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int run_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * < 0 if hardware error occured (e.g. i2c err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * and prevents normal operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int hard_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct mutex phy_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static u8 len_seq[] = { 16, 24, 12, 29 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static u16 wait_tab[] = { 2, 3, 5, 15, 20, 40};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define I2C_DUMP_SKB(info, skb) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) pr_debug("%s:\n", info); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 16, 1, (skb)->data, (skb)->len, 0); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * In order to get the CLF in a known state we generate an internal reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * using a proprietary command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Once the reboot is completed, we expect to receive a ST21NFCA_SOF_EOF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * fill buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int st21nfca_hci_platform_init(struct st21nfca_i2c_phy *phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u16 wait_reboot[] = { 50, 300, 1000 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) char reboot_cmd[] = { 0x7E, 0x66, 0x48, 0xF6, 0x7E };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int i, r = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) r = i2c_master_send(phy->i2c_dev, reboot_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sizeof(reboot_cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) msleep(wait_reboot[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* CLF is spending about 20ms to do an internal reboot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) r = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) r = i2c_master_recv(phy->i2c_dev, tmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ST21NFCA_HCI_LLC_MAX_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) msleep(wait_reboot[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) for (i = 0; i < ST21NFCA_HCI_LLC_MAX_SIZE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) tmp[i] == ST21NFCA_SOF_EOF; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (r != ST21NFCA_HCI_LLC_MAX_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) usleep_range(1000, 1500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int st21nfca_hci_i2c_enable(void *phy_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct st21nfca_i2c_phy *phy = phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) gpiod_set_value(phy->gpiod_ena, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) phy->powered = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) phy->run_mode = ST21NFCA_HCI_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) usleep_range(10000, 15000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void st21nfca_hci_i2c_disable(void *phy_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct st21nfca_i2c_phy *phy = phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) gpiod_set_value(phy->gpiod_ena, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) phy->powered = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static void st21nfca_hci_add_len_crc(struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u16 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) *(u8 *)skb_push(skb, 1) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) crc = crc_ccitt(0xffff, skb->data, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) crc = ~crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) tmp = crc & 0x00ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) skb_put_u8(skb, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) tmp = (crc >> 8) & 0x00ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) skb_put_u8(skb, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static void st21nfca_hci_remove_len_crc(struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) skb_pull(skb, ST21NFCA_FRAME_HEADROOM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) skb_trim(skb, skb->len - ST21NFCA_FRAME_TAILROOM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * Writing a frame must not return the number of written bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * It must return either zero for success, or <0 for error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * In addition, it must not alter the skb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int st21nfca_hci_i2c_write(void *phy_id, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int r = -1, i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct st21nfca_i2c_phy *phy = phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct i2c_client *client = phy->i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE * 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) I2C_DUMP_SKB("st21nfca_hci_i2c_write", skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (phy->hard_fault != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return phy->hard_fault;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * Compute CRC before byte stuffing computation on frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * Note st21nfca_hci_add_len_crc is doing a byte stuffing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * on its own value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) st21nfca_hci_add_len_crc(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* add ST21NFCA_SOF_EOF on tail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) skb_put_u8(skb, ST21NFCA_SOF_EOF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* add ST21NFCA_SOF_EOF on head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) *(u8 *)skb_push(skb, 1) = ST21NFCA_SOF_EOF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * Compute byte stuffing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * xor byte with ST21NFCA_BYTE_STUFFING_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) tmp[0] = skb->data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) for (i = 1, j = 1; i < skb->len - 1; i++, j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (skb->data[i] == ST21NFCA_SOF_EOF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) || skb->data[i] == ST21NFCA_ESCAPE_BYTE_STUFFING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) tmp[j] = ST21NFCA_ESCAPE_BYTE_STUFFING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) tmp[j] = skb->data[i] ^ ST21NFCA_BYTE_STUFFING_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) tmp[j] = skb->data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) tmp[j] = skb->data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * Manage sleep mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * Try 3 times to send data with delay between each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) mutex_lock(&phy->phy_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) for (i = 0; i < ARRAY_SIZE(wait_tab) && r < 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) r = i2c_master_send(client, tmp, j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) msleep(wait_tab[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mutex_unlock(&phy->phy_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (r >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (r != j)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) r = -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) st21nfca_hci_remove_len_crc(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static int get_frame_size(u8 *buf, int buflen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (buf[len + 1] == ST21NFCA_SOF_EOF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) for (len = 1; len < buflen && buf[len] != ST21NFCA_SOF_EOF; len++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int check_crc(u8 *buf, int buflen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u16 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) crc = crc_ccitt(0xffff, buf, buflen - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) crc = ~crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (buf[buflen - 2] != (crc & 0xff) || buf[buflen - 1] != (crc >> 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pr_err(ST21NFCA_HCI_DRIVER_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ": CRC error 0x%x != 0x%x 0x%x\n", crc, buf[buflen - 1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) buf[buflen - 2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 16, 2, buf, buflen, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * Prepare received data for upper layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * Received data include byte stuffing, crc and sof/eof
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * which is not usable by hci part.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * frame size without sof/eof, header and byte stuffing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * -EBADMSG : frame was incorrect and discarded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int st21nfca_hci_i2c_repack(struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int i, j, r, size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (skb->len < 1 || (skb->len > 1 && skb->data[1] != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) size = get_frame_size(skb->data, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) skb_trim(skb, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* remove ST21NFCA byte stuffing for upper layer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) for (i = 1, j = 0; i < skb->len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (skb->data[i + j] ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) (u8) ST21NFCA_ESCAPE_BYTE_STUFFING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) skb->data[i] = skb->data[i + j + 1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) | ST21NFCA_BYTE_STUFFING_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) skb->data[i] = skb->data[i + j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* remove byte stuffing useless byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) skb_trim(skb, i - j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* remove ST21NFCA_SOF_EOF from head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) skb_pull(skb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) r = check_crc(skb->data, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (r != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* remove headbyte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) skb_pull(skb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* remove crc. Byte Stuffing is already removed here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) skb_trim(skb, skb->len - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * that i2c bus will be flushed and that next read will start on a new frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * returned skb contains only LLC header and payload.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * frame size : if received frame is complete (find ST21NFCA_SOF_EOF at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * end of read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * -EAGAIN : if received frame is incomplete (not find ST21NFCA_SOF_EOF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * at end of read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * -EREMOTEIO : i2c read error (fatal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * -EBADMSG : frame was incorrect and discarded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * (value returned from st21nfca_hci_i2c_repack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * -EIO : if no ST21NFCA_SOF_EOF is found after reaching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * the read length end sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static int st21nfca_hci_i2c_read(struct st21nfca_i2c_phy *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int r, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u8 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u8 buf[ST21NFCA_HCI_LLC_MAX_PAYLOAD];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct i2c_client *client = phy->i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (phy->current_read_len < ARRAY_SIZE(len_seq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) len = len_seq[phy->current_read_len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * Add retry mecanism
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * Operation on I2C interface may fail in case of operation on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * RF or SWP interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) r = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) mutex_lock(&phy->phy_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) for (i = 0; i < ARRAY_SIZE(wait_tab) && r <= 0; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) r = i2c_master_recv(client, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) msleep(wait_tab[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) mutex_unlock(&phy->phy_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (r != len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return -EREMOTEIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * The first read sequence does not start with SOF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * Data is corrupeted so we drop it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (!phy->current_read_len && !IS_START_OF_FRAME(buf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) skb_trim(skb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) } else if (phy->current_read_len && IS_START_OF_FRAME(buf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * Previous frame transmission was interrupted and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * the frame got repeated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * Received frame start with ST21NFCA_SOF_EOF + 00.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) skb_trim(skb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) skb_put_data(skb, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (skb->data[skb->len - 1] == ST21NFCA_SOF_EOF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return st21nfca_hci_i2c_repack(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) phy->current_read_len++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * Reads an shdlc frame from the chip. This is not as straightforward as it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * seems. The frame format is data-crc, and corruption can occur anywhere
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * while transiting on i2c bus, such that we could read an invalid data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * The tricky case is when we read a corrupted data or crc. We must detect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * this here in order to determine that data can be transmitted to the hci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * core. This is the reason why we check the crc here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * The CLF will repeat a frame until we send a RR on that frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * On ST21NFCA, IRQ goes in idle when read starts. As no size information are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * available in the incoming data, other IRQ might come. Every IRQ will trigger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * a read sequence with different length and will fill the current frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) * The reception is complete once we reach a ST21NFCA_SOF_EOF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static irqreturn_t st21nfca_hci_irq_thread_fn(int irq, void *phy_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct st21nfca_i2c_phy *phy = phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (!phy || irq != phy->i2c_dev->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) client = phy->i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) dev_dbg(&client->dev, "IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (phy->hard_fault != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) r = st21nfca_hci_i2c_read(phy, phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (r == -EREMOTEIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) phy->hard_fault = r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) nfc_hci_recv_frame(phy->hdev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) } else if (r == -EAGAIN || r == -EIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) } else if (r == -EBADMSG && phy->crc_trials < ARRAY_SIZE(wait_tab)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * With ST21NFCA, only one interface (I2C, RF or SWP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * may be active at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * Having incorrect crc is usually due to i2c macrocell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * deactivation in the middle of a transmission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * It may generate corrupted data on i2c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * We give sometime to get i2c back.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * The complete frame will be repeated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) msleep(wait_tab[phy->crc_trials]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) phy->crc_trials++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) kfree_skb(phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) } else if (r > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * We succeeded to read data from the CLF and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * data is valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * Reset counter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) nfc_hci_recv_frame(phy->hdev, phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) phy->crc_trials = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) kfree_skb(phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (phy->pending_skb == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) phy->hard_fault = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) nfc_hci_recv_frame(phy->hdev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static struct nfc_phy_ops i2c_phy_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .write = st21nfca_hci_i2c_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .enable = st21nfca_hci_i2c_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .disable = st21nfca_hci_i2c_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static const struct acpi_gpio_params enable_gpios = { 1, 0, false };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static const struct acpi_gpio_mapping acpi_st21nfca_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) { "enable-gpios", &enable_gpios, 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static int st21nfca_hci_i2c_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct st21nfca_i2c_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) dev_dbg(&client->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) nfc_err(&client->dev, "Need I2C_FUNC_I2C\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) phy = devm_kzalloc(&client->dev, sizeof(struct st21nfca_i2c_phy),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (!phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) phy->i2c_dev = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (phy->pending_skb == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) phy->current_read_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) phy->crc_trials = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) mutex_init(&phy->phy_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) i2c_set_clientdata(client, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) r = devm_acpi_dev_add_driver_gpios(dev, acpi_st21nfca_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) dev_dbg(dev, "Unable to add GPIO mapping table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* Get EN GPIO from resource provider */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) phy->gpiod_ena = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (IS_ERR(phy->gpiod_ena)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) nfc_err(dev, "Unable to get ENABLE GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) r = PTR_ERR(phy->gpiod_ena);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) phy->se_status.is_ese_present =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) device_property_read_bool(&client->dev, "ese-present");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) phy->se_status.is_uicc_present =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) device_property_read_bool(&client->dev, "uicc-present");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) r = st21nfca_hci_platform_init(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) nfc_err(&client->dev, "Unable to reboot st21nfca\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) r = devm_request_threaded_irq(&client->dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) st21nfca_hci_irq_thread_fn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ST21NFCA_HCI_DRIVER_NAME, phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) nfc_err(&client->dev, "Unable to register IRQ handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) r = st21nfca_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ST21NFCA_FRAME_HEADROOM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) ST21NFCA_FRAME_TAILROOM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ST21NFCA_HCI_LLC_MAX_PAYLOAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) &phy->hdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) &phy->se_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) kfree_skb(phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static int st21nfca_hci_i2c_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) dev_dbg(&client->dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) st21nfca_hci_remove(phy->hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (phy->powered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) st21nfca_hci_i2c_disable(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (phy->pending_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) kfree_skb(phy->pending_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static const struct i2c_device_id st21nfca_hci_i2c_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {ST21NFCA_HCI_DRIVER_NAME, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) MODULE_DEVICE_TABLE(i2c, st21nfca_hci_i2c_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static const struct acpi_device_id st21nfca_hci_i2c_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {"SMO2100", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) MODULE_DEVICE_TABLE(acpi, st21nfca_hci_i2c_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static const struct of_device_id of_st21nfca_i2c_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) { .compatible = "st,st21nfca-i2c", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) { .compatible = "st,st21nfca_i2c", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) MODULE_DEVICE_TABLE(of, of_st21nfca_i2c_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static struct i2c_driver st21nfca_hci_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .name = ST21NFCA_HCI_I2C_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .of_match_table = of_match_ptr(of_st21nfca_i2c_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) .acpi_match_table = ACPI_PTR(st21nfca_hci_i2c_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .probe = st21nfca_hci_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .id_table = st21nfca_hci_i2c_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .remove = st21nfca_hci_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) module_i2c_driver(st21nfca_hci_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) MODULE_DESCRIPTION(DRIVER_DESC);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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