^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for NXP PN533 NFC Chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2011 Instituto Nokia de Tecnologia
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012-2013 Tieto Poland
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define PN533_DEVICE_STD 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define PN533_DEVICE_PASORI 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PN533_DEVICE_ACR122U 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PN533_DEVICE_PN532 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PN533_DEVICE_PN532_AUTOPOLL 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PN533_ALL_PROTOCOLS (NFC_PROTO_JEWEL_MASK | NFC_PROTO_MIFARE_MASK |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) NFC_PROTO_FELICA_MASK | NFC_PROTO_ISO14443_MASK |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) NFC_PROTO_NFC_DEP_MASK |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) NFC_PROTO_ISO14443_B_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PN533_NO_TYPE_B_PROTOCOLS (NFC_PROTO_JEWEL_MASK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) NFC_PROTO_MIFARE_MASK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) NFC_PROTO_FELICA_MASK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) NFC_PROTO_ISO14443_MASK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) NFC_PROTO_NFC_DEP_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Standard pn533 frame definitions (standard and extended)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PN533_STD_FRAME_HEADER_LEN (sizeof(struct pn533_std_frame) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) + 2) /* data[0] TFI, data[1] CC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PN533_STD_FRAME_TAIL_LEN 2 /* data[len] DCS, data[len + 1] postamble*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PN533_EXT_FRAME_HEADER_LEN (sizeof(struct pn533_ext_frame) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) + 2) /* data[0] TFI, data[1] CC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PN533_CMD_DATAEXCH_HEAD_LEN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PN533_CMD_DATAEXCH_DATA_MAXLEN 262
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PN533_CMD_DATAFRAME_MAXLEN 240 /* max data length (send) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Max extended frame payload len, excluding TFI and CC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * which are already in PN533_FRAME_HEADER_LEN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PN533_STD_FRAME_MAX_PAYLOAD_LEN 263
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Preamble (1), SoPC (2), ACK Code (2), Postamble (1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PN533_STD_FRAME_ACK_SIZE 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Preamble (1), SoPC (2), Packet Length (1), Packet Length Checksum (1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Specific Application Level Error Code (1) , Postamble (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PN533_STD_ERROR_FRAME_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PN533_STD_FRAME_CHECKSUM(f) (f->data[f->datalen])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PN533_STD_FRAME_POSTAMBLE(f) (f->data[f->datalen + 1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Half start code (3), LEN (4) should be 0xffff for extended frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PN533_STD_IS_EXTENDED(hdr) ((hdr)->datalen == 0xFF \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) && (hdr)->datalen_checksum == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PN533_EXT_FRAME_CHECKSUM(f) (f->data[be16_to_cpu(f->datalen)])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* start of frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PN533_STD_FRAME_SOF 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* standard frame identifier: in/out/error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PN533_STD_FRAME_IDENTIFIER(f) (f->data[0]) /* TFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PN533_STD_FRAME_DIR_OUT 0xD4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PN533_STD_FRAME_DIR_IN 0xD5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* PN533 Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PN533_FRAME_CMD(f) (f->data[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PN533_CMD_GET_FIRMWARE_VERSION 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PN533_CMD_SAM_CONFIGURATION 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PN533_CMD_RF_CONFIGURATION 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define PN533_CMD_IN_DATA_EXCHANGE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define PN533_CMD_IN_COMM_THRU 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define PN533_CMD_IN_LIST_PASSIVE_TARGET 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PN533_CMD_IN_ATR 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PN533_CMD_IN_RELEASE 0x52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define PN533_CMD_IN_JUMP_FOR_DEP 0x56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PN533_CMD_IN_AUTOPOLL 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define PN533_CMD_TG_INIT_AS_TARGET 0x8c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define PN533_CMD_TG_GET_DATA 0x86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define PN533_CMD_TG_SET_DATA 0x8e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define PN533_CMD_TG_SET_META_DATA 0x94
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define PN533_CMD_UNDEF 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define PN533_CMD_RESPONSE(cmd) (cmd + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* PN533 Return codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define PN533_CMD_RET_MASK 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PN533_CMD_MI_MASK 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define PN533_CMD_RET_SUCCESS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define PN533_FRAME_DATALEN_ACK 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define PN533_FRAME_DATALEN_ERROR 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PN533_FRAME_DATALEN_EXTENDED 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) enum pn533_protocol_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) PN533_PROTO_REQ_ACK_RESP = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) PN533_PROTO_REQ_RESP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Poll modulations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) PN533_POLL_MOD_106KBPS_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) PN533_POLL_MOD_212KBPS_FELICA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) PN533_POLL_MOD_424KBPS_FELICA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PN533_POLL_MOD_106KBPS_JEWEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PN533_POLL_MOD_847KBPS_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) PN533_LISTEN_MOD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) __PN533_POLL_MOD_AFTER_LAST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define PN533_POLL_MOD_MAX (__PN533_POLL_MOD_AFTER_LAST - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct pn533_std_frame {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 preamble;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __be16 start_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 datalen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 datalen_checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u8 data[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct pn533_ext_frame { /* Extended Information frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 preamble;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) __be16 start_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) __be16 eif_flag; /* fixed to 0xFFFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) __be16 datalen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u8 datalen_checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 data[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct pn533 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct nfc_dev *nfc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) u32 device_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) enum pn533_protocol_type protocol_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct sk_buff_head resp_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct sk_buff_head fragment_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct workqueue_struct *wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct work_struct cmd_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct work_struct cmd_complete_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct delayed_work poll_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct work_struct mi_rx_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct work_struct mi_tx_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct work_struct mi_tm_rx_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct work_struct mi_tm_tx_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct work_struct tg_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct work_struct rf_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct list_head cmd_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct pn533_cmd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u8 cmd_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct mutex cmd_lock; /* protects cmd queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) void *cmd_complete_mi_arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) void *cmd_complete_dep_arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct pn533_poll_modulations *poll_mod_active[PN533_POLL_MOD_MAX + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 poll_mod_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u8 poll_mod_curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u8 poll_dep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) u32 poll_protocols;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 listen_protocols;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct timer_list listen_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int cancel_listen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) u8 *gb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) size_t gb_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) u8 tgt_available_prots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) u8 tgt_active_prot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u8 tgt_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct pn533_frame_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) void *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct pn533_phy_ops *phy_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) typedef int (*pn533_send_async_complete_t) (struct pn533 *dev, void *arg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct sk_buff *resp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct pn533_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct list_head queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u8 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct sk_buff *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct sk_buff *resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pn533_send_async_complete_t complete_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) void *complete_cb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct pn533_frame_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) void (*tx_frame_init)(void *frame, u8 cmd_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) void (*tx_frame_finish)(void *frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) void (*tx_update_payload_len)(void *frame, int len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int tx_header_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int tx_tail_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) bool (*rx_is_frame_valid)(void *frame, struct pn533 *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) bool (*rx_frame_is_ack)(void *frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int (*rx_frame_size)(void *frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) int rx_header_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int rx_tail_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int max_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) u8 (*get_cmd_code)(void *frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct pn533_phy_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int (*send_frame)(struct pn533 *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct sk_buff *out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int (*send_ack)(struct pn533 *dev, gfp_t flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) void (*abort_cmd)(struct pn533 *priv, gfp_t flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * dev_up and dev_down are optional.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * They are used to inform the phy layer that the nfc chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * is going to be really used very soon. The phy layer can then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * bring up it's interface to the chip and have it suspended for power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * saving reasons otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int (*dev_up)(struct pn533 *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int (*dev_down)(struct pn533 *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct pn533 *pn53x_common_init(u32 device_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) enum pn533_protocol_type protocol_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) void *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct pn533_phy_ops *phy_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct pn533_frame_ops *fops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) int pn533_finalize_setup(struct pn533 *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) void pn53x_common_clean(struct pn533 *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) void pn533_recv_frame(struct pn533 *dev, struct sk_buff *skb, int status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int pn532_i2c_nfc_alloc(struct pn533 *priv, u32 protocols,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct device *parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int pn53x_register_nfc(struct pn533 *priv, u32 protocols,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct device *parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) void pn53x_unregister_nfc(struct pn533 *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) bool pn533_rx_frame_is_cmd_response(struct pn533 *dev, void *frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) bool pn533_rx_frame_is_ack(void *_frame);