Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Marvell NFC-over-UART driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2015, Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This software file (the "File") is distributed by Marvell International
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * (the "License").  You may use, redistribute and/or modify this File in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * accordance with the terms and conditions of the License, a copy of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * is available on the worldwide web at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * this warranty disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <net/nfc/nci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <net/nfc/nci_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "nfcmrvl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static unsigned int hci_muxed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static unsigned int flow_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static unsigned int break_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static int reset_n_io = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) ** NFCMRVL NCI OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static int nfcmrvl_uart_nci_open(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int nfcmrvl_uart_nci_close(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int nfcmrvl_uart_nci_send(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 				 struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct nci_uart *nu = priv->drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return nu->ops.send(nu, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static void nfcmrvl_uart_nci_update_config(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 					   const void *param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct nci_uart *nu = priv->drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	const struct nfcmrvl_fw_uart_config *config = param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	nci_uart_set_config(nu, le32_to_cpu(config->baudrate),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 			    config->flow_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static struct nfcmrvl_if_ops uart_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.nci_open = nfcmrvl_uart_nci_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.nci_close = nfcmrvl_uart_nci_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.nci_send = nfcmrvl_uart_nci_send,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.nci_update_config = nfcmrvl_uart_nci_update_config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static int nfcmrvl_uart_parse_dt(struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 				 struct nfcmrvl_platform_data *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct device_node *matched_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	matched_node = of_get_compatible_child(node, "marvell,nfc-uart");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (!matched_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		matched_node = of_get_compatible_child(node, "mrvl,nfc-uart");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		if (!matched_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ret = nfcmrvl_parse_dt(matched_node, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		pr_err("Failed to get generic entries\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		of_node_put(matched_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (of_find_property(matched_node, "flow-control", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		pdata->flow_control = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		pdata->flow_control = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (of_find_property(matched_node, "break-control", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		pdata->break_control = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		pdata->break_control = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	of_node_put(matched_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ** NCI UART OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int nfcmrvl_nci_uart_open(struct nci_uart *nu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct nfcmrvl_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	struct nfcmrvl_platform_data *pdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct nfcmrvl_platform_data config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	struct device *dev = nu->tty->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	 * Platform data cannot be used here since usually it is already used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 * by low level serial driver. We can try to retrieve serial device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 * and check if DT entries were added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	if (dev && dev->parent && dev->parent->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (nfcmrvl_uart_parse_dt(dev->parent->of_node, &config) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			pdata = &config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		pr_info("No platform data / DT -> fallback to module params\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		config.hci_muxed = hci_muxed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		config.reset_n_io = reset_n_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		config.flow_control = flow_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		config.break_control = break_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		pdata = &config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	priv = nfcmrvl_nci_register_dev(NFCMRVL_PHY_UART, nu, &uart_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 					dev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (IS_ERR(priv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return PTR_ERR(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	priv->support_fw_dnld = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	nu->drv_data = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	nu->ndev = priv->ndev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static void nfcmrvl_nci_uart_close(struct nci_uart *nu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	nfcmrvl_nci_unregister_dev((struct nfcmrvl_private *)nu->drv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int nfcmrvl_nci_uart_recv(struct nci_uart *nu, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return nfcmrvl_nci_recv_frame((struct nfcmrvl_private *)nu->drv_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 				      skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static void nfcmrvl_nci_uart_tx_start(struct nci_uart *nu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	struct nfcmrvl_private *priv = (struct nfcmrvl_private *)nu->drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	if (priv->ndev->nfc_dev->fw_download_in_progress)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	/* Remove BREAK to wake up the NFCC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (priv->config.break_control && nu->tty->ops->break_ctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		nu->tty->ops->break_ctl(nu->tty, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		usleep_range(3000, 5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static void nfcmrvl_nci_uart_tx_done(struct nci_uart *nu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct nfcmrvl_private *priv = (struct nfcmrvl_private *)nu->drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	if (priv->ndev->nfc_dev->fw_download_in_progress)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	** To ensure that if the NFCC goes in DEEP SLEEP sate we can wake him
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	** up. we set BREAK. Once we will be ready to send again we will remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	** it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (priv->config.break_control && nu->tty->ops->break_ctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		nu->tty->ops->break_ctl(nu->tty, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		usleep_range(1000, 3000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct nci_uart nfcmrvl_nci_uart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.owner  = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.name   = "nfcmrvl_uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.driver = NCI_UART_DRIVER_MARVELL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.ops	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		.open		= nfcmrvl_nci_uart_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		.close		= nfcmrvl_nci_uart_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		.recv		= nfcmrvl_nci_uart_recv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		.tx_start	= nfcmrvl_nci_uart_tx_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		.tx_done	= nfcmrvl_nci_uart_tx_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ** Module init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int nfcmrvl_uart_init_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return nci_uart_register(&nfcmrvl_nci_uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void nfcmrvl_uart_exit_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	nci_uart_unregister(&nfcmrvl_nci_uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) module_init(nfcmrvl_uart_init_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) module_exit(nfcmrvl_uart_exit_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_AUTHOR("Marvell International Ltd.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_DESCRIPTION("Marvell NFC-over-UART");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) module_param(flow_control, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MODULE_PARM_DESC(flow_control, "Tell if UART needs flow control at init.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) module_param(break_control, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) MODULE_PARM_DESC(break_control, "Tell if UART driver must drive break signal.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) module_param(hci_muxed, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MODULE_PARM_DESC(hci_muxed, "Tell if transport is muxed in HCI one.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) module_param(reset_n_io, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MODULE_PARM_DESC(reset_n_io, "GPIO that is wired to RESET_N signal.");