Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Marvell NFC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2014-2015, Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This software file (the "File") is distributed by Marvell International
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Ltd. under the terms of the GNU General Public License Version 2, June 1991
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * (the "License").  You may use, redistribute and/or modify this File in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * accordance with the terms and conditions of the License, a copy of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * is available on the worldwide web at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * this warranty disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #ifndef _NFCMRVL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define _NFCMRVL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/platform_data/nfcmrvl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "fw_dnld.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) /* Define private flags: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define NFCMRVL_NCI_RUNNING			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define NFCMRVL_PHY_ERROR			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define NFCMRVL_EXT_COEX_ID			0xE0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define NFCMRVL_NOT_ALLOWED_ID			0xE1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define NFCMRVL_ACTIVE_ID			0xE2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define NFCMRVL_EXT_COEX_ENABLE			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define NFCMRVL_GPIO_PIN_NFC_NOT_ALLOWED	0xA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define NFCMRVL_GPIO_PIN_NFC_ACTIVE		0xB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define NFCMRVL_NCI_MAX_EVENT_SIZE		260
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) ** NCI FW Parmaters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define NFCMRVL_PB_BAIL_OUT			0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define NFCMRVL_PROP_REF_CLOCK			0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define NFCMRVL_PROP_SET_HI_CONFIG		0xF1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) ** HCI defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define NFCMRVL_HCI_EVENT_HEADER_SIZE		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define NFCMRVL_HCI_EVENT_CODE			0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define NFCMRVL_HCI_NFC_EVENT_CODE		0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define NFCMRVL_HCI_COMMAND_CODE		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define NFCMRVL_HCI_OGF				0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define NFCMRVL_HCI_OCF				0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) enum nfcmrvl_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	NFCMRVL_PHY_USB		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	NFCMRVL_PHY_UART	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	NFCMRVL_PHY_I2C		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	NFCMRVL_PHY_SPI		= 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct nfcmrvl_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	/* Platform configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct nfcmrvl_platform_data config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	/* Parent dev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct nci_dev *ndev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	/* FW download context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct nfcmrvl_fw_dnld fw_dnld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	/* FW download support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	bool support_fw_dnld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	** PHY related information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	/* PHY driver context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	void *drv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	/* PHY device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* PHY type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	enum nfcmrvl_phy phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	/* Low level driver ops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct nfcmrvl_if_ops *if_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) struct nfcmrvl_if_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int (*nci_open) (struct nfcmrvl_private *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int (*nci_close) (struct nfcmrvl_private *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int (*nci_send) (struct nfcmrvl_private *priv, struct sk_buff *skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	void (*nci_update_config)(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				  const void *param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int nfcmrvl_nci_recv_frame(struct nfcmrvl_private *priv, struct sk_buff *skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct nfcmrvl_private *nfcmrvl_nci_register_dev(enum nfcmrvl_phy phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				void *drv_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				struct nfcmrvl_if_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 				struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				struct nfcmrvl_platform_data *pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void nfcmrvl_chip_reset(struct nfcmrvl_private *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void nfcmrvl_chip_halt(struct nfcmrvl_private *priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int nfcmrvl_parse_dt(struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		     struct nfcmrvl_platform_data *pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #endif