^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Marvell NFC driver: Firmware downloader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2015, Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This software file (the "File") is distributed by Marvell International
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Ltd. under the terms of the GNU General Public License Version 2, June 1991
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (the "License"). You may use, redistribute and/or modify this File in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * accordance with the terms and conditions of the License, a copy of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * is available on the worldwide web at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * this warranty disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/nfc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <net/nfc/nci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <net/nfc/nci_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "nfcmrvl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FW_DNLD_TIMEOUT 15000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define NCI_OP_PROPRIETARY_BOOT_CMD nci_opcode_pack(NCI_GID_PROPRIETARY, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) NCI_OP_PROP_BOOT_CMD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* FW download states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) STATE_RESET = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) STATE_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) STATE_SET_REF_CLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) STATE_SET_HI_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) STATE_OPEN_LC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) STATE_FW_DNLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) STATE_CLOSE_LC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) STATE_BOOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) SUBSTATE_WAIT_COMMAND = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) SUBSTATE_WAIT_ACK_CREDIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) SUBSTATE_WAIT_NACK_CREDIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) SUBSTATE_WAIT_DATA_CREDIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ** Patterns for responses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static const uint8_t nci_pattern_core_reset_ntf[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0x60, 0x00, 0x02, 0xA0, 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const uint8_t nci_pattern_core_init_rsp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0x40, 0x01, 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static const uint8_t nci_pattern_core_set_config_rsp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 0x40, 0x02, 0x02, 0x00, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static const uint8_t nci_pattern_core_conn_create_rsp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 0x40, 0x04, 0x04, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static const uint8_t nci_pattern_core_conn_close_rsp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x40, 0x05, 0x01, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static const uint8_t nci_pattern_core_conn_credits_ntf[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 0x60, 0x06, 0x03, 0x01, NCI_CORE_LC_CONNID_PROP_FW_DL, 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static const uint8_t nci_pattern_proprietary_boot_rsp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 0x4F, 0x3A, 0x01, 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static struct sk_buff *alloc_lc_skb(struct nfcmrvl_private *priv, uint8_t plen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct nci_data_hdr *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) skb = nci_skb_alloc(priv->ndev, (NCI_DATA_HDR_SIZE + plen), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pr_err("no memory for data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) hdr = skb_put(skb, NCI_DATA_HDR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) hdr->conn_id = NCI_CORE_LC_CONNID_PROP_FW_DL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) hdr->rfu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) hdr->plen = plen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) nci_mt_set((__u8 *)hdr, NCI_MT_DATA_PKT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) nci_pbf_set((__u8 *)hdr, NCI_PBF_LAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static void fw_dnld_over(struct nfcmrvl_private *priv, u32 error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (priv->fw_dnld.fw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) release_firmware(priv->fw_dnld.fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) priv->fw_dnld.fw = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) priv->fw_dnld.header = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) priv->fw_dnld.binary_config = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) atomic_set(&priv->ndev->cmd_cnt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (timer_pending(&priv->ndev->cmd_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) del_timer_sync(&priv->ndev->cmd_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (timer_pending(&priv->fw_dnld.timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) del_timer_sync(&priv->fw_dnld.timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) nfc_info(priv->dev, "FW loading over (%d)]\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (error != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* failed, halt the chip to avoid power consumption */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) nfcmrvl_chip_halt(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) nfc_fw_download_done(priv->ndev->nfc_dev, priv->fw_dnld.name, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static void fw_dnld_timeout(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct nfcmrvl_private *priv = from_timer(priv, t, fw_dnld.timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) nfc_err(priv->dev, "FW loading timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) priv->fw_dnld.state = STATE_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) fw_dnld_over(priv, -ETIMEDOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int process_state_reset(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (sizeof(nci_pattern_core_reset_ntf) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) memcmp(skb->data, nci_pattern_core_reset_ntf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) sizeof(nci_pattern_core_reset_ntf)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) nfc_info(priv->dev, "BootROM reset, start fw download\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Start FW download state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) priv->fw_dnld.state = STATE_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) nci_send_cmd(priv->ndev, NCI_OP_CORE_INIT_CMD, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int process_state_init(struct nfcmrvl_private *priv, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct nci_core_set_config_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (sizeof(nci_pattern_core_init_rsp) >= skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) memcmp(skb->data, nci_pattern_core_init_rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) sizeof(nci_pattern_core_init_rsp)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cmd.num_params = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) cmd.param.id = NFCMRVL_PROP_REF_CLOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) cmd.param.len = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) memcpy(cmd.param.val, &priv->fw_dnld.header->ref_clock, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) nci_send_cmd(priv->ndev, NCI_OP_CORE_SET_CONFIG_CMD, 3 + cmd.param.len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) priv->fw_dnld.state = STATE_SET_REF_CLOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static void create_lc(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) uint8_t param[2] = { NCI_CORE_LC_PROP_FW_DL, 0x0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) priv->fw_dnld.state = STATE_OPEN_LC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) nci_send_cmd(priv->ndev, NCI_OP_CORE_CONN_CREATE_CMD, 2, param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int process_state_set_ref_clock(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct nci_core_set_config_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (sizeof(nci_pattern_core_set_config_rsp) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) memcmp(skb->data, nci_pattern_core_set_config_rsp, skb->len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) cmd.num_params = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) cmd.param.id = NFCMRVL_PROP_SET_HI_CONFIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) switch (priv->phy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case NFCMRVL_PHY_UART:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) cmd.param.len = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) memcpy(cmd.param.val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) &priv->fw_dnld.binary_config->uart.baudrate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) cmd.param.val[4] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) priv->fw_dnld.binary_config->uart.flow_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) case NFCMRVL_PHY_I2C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) cmd.param.len = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) memcpy(cmd.param.val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) &priv->fw_dnld.binary_config->i2c.clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cmd.param.val[4] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) case NFCMRVL_PHY_SPI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) cmd.param.len = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) memcpy(cmd.param.val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) &priv->fw_dnld.binary_config->spi.clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) cmd.param.val[4] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) create_lc(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) priv->fw_dnld.state = STATE_SET_HI_CONFIG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) nci_send_cmd(priv->ndev, NCI_OP_CORE_SET_CONFIG_CMD, 3 + cmd.param.len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int process_state_set_hi_config(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (sizeof(nci_pattern_core_set_config_rsp) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) memcmp(skb->data, nci_pattern_core_set_config_rsp, skb->len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) create_lc(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int process_state_open_lc(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (sizeof(nci_pattern_core_conn_create_rsp) >= skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) memcmp(skb->data, nci_pattern_core_conn_create_rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) sizeof(nci_pattern_core_conn_create_rsp)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) priv->fw_dnld.state = STATE_FW_DNLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) priv->fw_dnld.offset = priv->fw_dnld.binary_config->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int process_state_fw_dnld(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) uint16_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) uint16_t comp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct sk_buff *out_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) switch (priv->fw_dnld.substate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) case SUBSTATE_WAIT_COMMAND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * Command format:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * B0..2: NCI header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * B3 : Helper command (0xA5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * B4..5: le16 data size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * B6..7: le16 data size complement (~)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * B8..N: payload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Remove NCI HDR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) skb_pull(skb, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (skb->data[0] != HELPER_CMD_PACKET_FORMAT || skb->len != 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) nfc_err(priv->dev, "bad command");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) skb_pull(skb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) len = get_unaligned_le16(skb->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) skb_pull(skb, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) comp_len = get_unaligned_le16(skb->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) memcpy(&comp_len, skb->data, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) skb_pull(skb, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (((~len) & 0xFFFF) != comp_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) nfc_err(priv->dev, "bad len complement: %x %x %x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) len, comp_len, (~len & 0xFFFF));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) out_skb = alloc_lc_skb(priv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (!out_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) skb_put_u8(out_skb, 0xBF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) nci_send_frame(priv->ndev, out_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) priv->fw_dnld.substate = SUBSTATE_WAIT_NACK_CREDIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) priv->fw_dnld.chunk_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) out_skb = alloc_lc_skb(priv, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (!out_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) skb_put_u8(out_skb, HELPER_ACK_PACKET_FORMAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) nci_send_frame(priv->ndev, out_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) priv->fw_dnld.substate = SUBSTATE_WAIT_ACK_CREDIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) case SUBSTATE_WAIT_ACK_CREDIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) skb->len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) nfc_err(priv->dev, "bad packet: waiting for credit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (priv->fw_dnld.chunk_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* FW Loading is done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) uint8_t conn_id = NCI_CORE_LC_CONNID_PROP_FW_DL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) priv->fw_dnld.state = STATE_CLOSE_LC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) nci_send_cmd(priv->ndev, NCI_OP_CORE_CONN_CLOSE_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 1, &conn_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) out_skb = alloc_lc_skb(priv, priv->fw_dnld.chunk_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (!out_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) skb_put_data(out_skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ((uint8_t *)priv->fw_dnld.fw->data) + priv->fw_dnld.offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) priv->fw_dnld.chunk_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) nci_send_frame(priv->ndev, out_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) priv->fw_dnld.substate = SUBSTATE_WAIT_DATA_CREDIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) case SUBSTATE_WAIT_DATA_CREDIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) skb->len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) nfc_err(priv->dev, "bad packet: waiting for credit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) priv->fw_dnld.offset += priv->fw_dnld.chunk_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) priv->fw_dnld.chunk_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) case SUBSTATE_WAIT_NACK_CREDIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (sizeof(nci_pattern_core_conn_credits_ntf) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) memcmp(nci_pattern_core_conn_credits_ntf, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) skb->len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) nfc_err(priv->dev, "bad packet: waiting for credit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) priv->fw_dnld.substate = SUBSTATE_WAIT_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static int process_state_close_lc(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (sizeof(nci_pattern_core_conn_close_rsp) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) memcmp(skb->data, nci_pattern_core_conn_close_rsp, skb->len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) priv->fw_dnld.state = STATE_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) nci_send_cmd(priv->ndev, NCI_OP_PROPRIETARY_BOOT_CMD, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static int process_state_boot(struct nfcmrvl_private *priv, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (sizeof(nci_pattern_proprietary_boot_rsp) != skb->len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) memcmp(skb->data, nci_pattern_proprietary_boot_rsp, skb->len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * Update HI config to use the right configuration for the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * data exchanges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) priv->if_ops->nci_update_config(priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) &priv->fw_dnld.binary_config->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (priv->fw_dnld.binary_config == &priv->fw_dnld.header->helper) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * This is the case where an helper was needed and we have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * uploaded it. Now we have to wait the next RESET NTF to start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * FW download.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) priv->fw_dnld.state = STATE_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) priv->fw_dnld.binary_config = &priv->fw_dnld.header->firmware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) nfc_info(priv->dev, "FW loading: helper loaded");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) nfc_info(priv->dev, "FW loading: firmware loaded");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) fw_dnld_over(priv, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static void fw_dnld_rx_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct nfcmrvl_fw_dnld *fw_dnld = container_of(work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct nfcmrvl_fw_dnld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) rx_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct nfcmrvl_private *priv = container_of(fw_dnld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct nfcmrvl_private,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) fw_dnld);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) while ((skb = skb_dequeue(&fw_dnld->rx_q))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) nfc_send_to_raw_sock(priv->ndev->nfc_dev, skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) RAW_PAYLOAD_NCI, NFC_DIRECTION_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) switch (fw_dnld->state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) case STATE_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ret = process_state_reset(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) case STATE_INIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ret = process_state_init(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case STATE_SET_REF_CLOCK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ret = process_state_set_ref_clock(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) case STATE_SET_HI_CONFIG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) ret = process_state_set_hi_config(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) case STATE_OPEN_LC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ret = process_state_open_lc(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) case STATE_FW_DNLD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret = process_state_fw_dnld(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case STATE_CLOSE_LC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ret = process_state_close_lc(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) case STATE_BOOT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ret = process_state_boot(priv, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) nfc_err(priv->dev, "FW loading error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) fw_dnld_over(priv, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int nfcmrvl_fw_dnld_init(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) char name[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) INIT_WORK(&priv->fw_dnld.rx_work, fw_dnld_rx_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) snprintf(name, sizeof(name), "%s_nfcmrvl_fw_dnld_rx_wq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_name(&priv->ndev->nfc_dev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) priv->fw_dnld.rx_wq = create_singlethread_workqueue(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (!priv->fw_dnld.rx_wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) skb_queue_head_init(&priv->fw_dnld.rx_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) void nfcmrvl_fw_dnld_deinit(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) destroy_workqueue(priv->fw_dnld.rx_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) void nfcmrvl_fw_dnld_recv_frame(struct nfcmrvl_private *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* Discard command timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (timer_pending(&priv->ndev->cmd_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) del_timer_sync(&priv->ndev->cmd_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* Allow next command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) atomic_set(&priv->ndev->cmd_cnt, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /* Queue and trigger rx work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) skb_queue_tail(&priv->fw_dnld.rx_q, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) queue_work(priv->fw_dnld.rx_wq, &priv->fw_dnld.rx_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) void nfcmrvl_fw_dnld_abort(struct nfcmrvl_private *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) fw_dnld_over(priv, -EHOSTDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) int nfcmrvl_fw_dnld_start(struct nci_dev *ndev, const char *firmware_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) struct nfcmrvl_private *priv = nci_get_drvdata(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct nfcmrvl_fw_dnld *fw_dnld = &priv->fw_dnld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (!priv->support_fw_dnld)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (!firmware_name || !firmware_name[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) strcpy(fw_dnld->name, firmware_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * Retrieve FW binary file and parse it to initialize FW download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * state machine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /* Retrieve FW binary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) res = request_firmware(&fw_dnld->fw, firmware_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) &ndev->nfc_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (res < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) nfc_err(priv->dev, "failed to retrieve FW %s", firmware_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) fw_dnld->header = (const struct nfcmrvl_fw *) priv->fw_dnld.fw->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (fw_dnld->header->magic != NFCMRVL_FW_MAGIC ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) fw_dnld->header->phy != priv->phy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) nfc_err(priv->dev, "bad firmware binary %s magic=0x%x phy=%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) firmware_name, fw_dnld->header->magic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) fw_dnld->header->phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) release_firmware(fw_dnld->fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) fw_dnld->header = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (fw_dnld->header->helper.offset != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) nfc_info(priv->dev, "loading helper");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) fw_dnld->binary_config = &fw_dnld->header->helper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) nfc_info(priv->dev, "loading firmware");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) fw_dnld->binary_config = &fw_dnld->header->firmware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) /* Configure a timer for timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) timer_setup(&priv->fw_dnld.timer, fw_dnld_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) mod_timer(&priv->fw_dnld.timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) jiffies + msecs_to_jiffies(FW_DNLD_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* Ronfigure HI to be sure that it is the bootrom values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) priv->if_ops->nci_update_config(priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) &fw_dnld->header->bootrom.config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /* Allow first command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) atomic_set(&priv->ndev->cmd_cnt, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* First, reset the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) priv->fw_dnld.state = STATE_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) nfcmrvl_chip_reset(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* Now wait for CORE_RESET_NTF or timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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